CN212060953U - Timing logic controller circuit - Google Patents
Timing logic controller circuit Download PDFInfo
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- CN212060953U CN212060953U CN202020925322.8U CN202020925322U CN212060953U CN 212060953 U CN212060953 U CN 212060953U CN 202020925322 U CN202020925322 U CN 202020925322U CN 212060953 U CN212060953 U CN 212060953U
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- controller circuit
- timing logic
- bridge rectifier
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Abstract
The utility model discloses a timing logic controller circuit, which aims to overcome the technical problems that important load equipment can be broken according to expected time, economic loss and electric power safety accidents are avoided, the power supply reliability is ensured, and the stability is improved; the utility model discloses simple effectual realized timing logic controller function, circuit logic is simple, realizes with low costs, and the power supply is reliable, stable and the security is high.
Description
Technical Field
The utility model relates to a controller circuit, concretely relates to timing logic controller circuit.
Background
With the development of power industry systems, the power system is required to have higher stability, safety and self-healing performance, but in a multi-load system powered by three-phase mains electricity and standby UPS equipment in real life, the time-sharing UPS equipment can supply power to multiple loads by timing after the mains electricity is powered off frequently, so that three-phase electric energy is effectively distributed, important load equipment can be disconnected according to expected time, and economic loss and power safety accidents are avoided.
At present, a custom logic controller mainly comprises a PLC (programmable logic controller) and can also realize timing and time-sharing control, but the PLC needs programming, is complex to operate and is expensive in price.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at overcoming important load equipment and can be according to the anticipated time branch divide absolutely, avoid causing economic loss and electric power incident, guarantee the power supply reliability, improve the technical problem of stability, and provide a timing logic controller circuit.
In order to achieve the above purpose, the utility model adopts the technical scheme that:
a timing logic controller circuit, characterized by: the system comprises an external connector, a bridge rectifier, an optocoupler, a processor, a triode, a relay and a user operation terminal;
the input high end of the external connector is connected with the input high end of the bridge rectifier through a first resistor, and the input low end of the external connector is connected with the input low end of the bridge rectifier; a second resistor is connected in parallel between the input high end and the input low end of the bridge rectifier;
the output high end of the bridge rectifier is connected with the input high end of the optocoupler through a fifth resistor, and the output low end of the bridge rectifier is connected with the input low end of the optocoupler through a sixth resistor; a capacitor is connected in parallel between the output high end and the output low end of the bridge rectifier;
the output high end of the optical coupler is divided into two paths, wherein one path is connected with a power supply through an eighth resistor, and the other path is connected with a signal detection end of the processor; the output low end of the optical coupler is grounded;
when the signal detected by the signal detection end of the processor is high level, the control output end outputs low level; when the signal detected by the signal detection end of the processor is low level, the control output end outputs high level;
the control output end of the processor is connected with the base electrode of the triode through a fourteenth resistor;
the emitter of the triode is grounded, the collector of the triode is connected with one end of the relay coil, and the other end of the relay coil is connected with a power supply;
the main contact and the auxiliary contact of the relay are respectively connected with two output ends of the external connector;
the user operation terminal is connected with the processor.
Further, the bridge rectifier is a full bridge module MB 6S.
Further, the second resistor is a piezoresistor.
Furthermore, the resistance values of the first resistor, the fifth resistor and the sixth resistor are all 15K Ω, and the rated power of the first resistor, the fifth resistor and the sixth resistor is 2W.
Further, the base electrode and the emitter electrode of the triode are connected through a fifteenth resistor.
Further, the resistance values of the eighth resistor and the fifteenth resistor are 4.7K omega-10K omega.
Further, the resistance of the fourteenth resistor is 1K Ω.
Further, the coil of the relay is connected in parallel with a diode arranged in the reverse direction.
Further, the diode is a schottky diode.
The utility model has the advantages that:
the utility model discloses simple effectual realized timing logic controller function, circuit logic is simple, realizes with low costs, and the power supply is reliable, stable and the security is high.
Drawings
Fig. 1 is a schematic diagram of a timing logic controller circuit according to the present invention.
Reference numerals:
the circuit comprises a first resistor, a second resistor, a 3-bridge rectifier, a 4-capacitor, a fifth resistor, a sixth resistor, a 7-optocoupler, an eighth resistor, a power supply, a 10-ground signal, a relay, a 12-diode, a triode 13, a fourteenth resistor, a fifteenth resistor 15, a processor 16, an external connector 17 and a user operation terminal 18.
Detailed Description
The technical solution of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.
As shown in FIG. 1, a timing logic controller circuit comprises an external plug-in 17, wherein a pin 17-1 of the external plug-in 17 is connected with one end of a first resistor 1, the other end of the first resistor 1 is connected with one end of a second resistor 2 and a pin 3-2 of a bridge rectifier 3, a pin 3-4 of the bridge rectifier 3 is connected with the other end of the second resistor 2 and a pin 17-2 of the external plug-in 17, a pin 3-1 of the bridge rectifier 3 is connected with one end of a capacitor 4 and one end of a fifth resistor 5, a pin 3-3 of the bridge rectifier 3 is connected with the other end of the capacitor 4 and one end of a sixth resistor 6, the other end of the fifth resistor 5 is connected with a pin 7-1 of an optical coupler 7, the other end of the sixth resistor 6 is connected with a pin 7-2 of the optical coupler 7, a pin 7-3 of the optical coupler 7 is connected with one end of an eighth resistor 8 and a pin 16-1 of a processor 16, the other end of the eighth resistor 8 is connected with the power supply 9, a pin 7-4 of the optocoupler 7 is connected with a ground signal 10(GND), the processor 16 is connected with a user operation terminal 18, the user operation terminal 18 comprises a key and a display screen, a pin 16-2 of the processor 16 is connected with one end of a fourteenth resistor 14, the other end of the fourteenth resistor 14 is connected with one end of a fifteenth resistor 15 and a pin a of a triode 13, the other end of the fifteenth resistor 15 is connected with the ground signal 10(GND) and a pin b of a triode 13, a pin c of the triode 13 is connected with a pin p of a diode 12 and a pin 11-2 of a relay 11, a pin n of the diode 12 is connected with a pin 11-1 of the relay 11 and the power supply 9, a pin 11-4 of the relay 11 is connected with a pin 17-3 of an external plug-in 17, and a pin 11-4 of the relay 11 is connected with a pin 17-3 of; the bridge rectifier 3 in this embodiment is a full bridge module MB 6S.
The utility model discloses a theory of operation does: the AC220V utility power is connected to pins 17-1 and 17-2 of the add-on 17, and a UPS (uninterruptible power supply) supplies power to the load through pins 17-3 and 17-4 of the add-on 17. The user sets the power-down operating time of the product by operating the keys and display screen of the terminal 18 for controlling the UPS to supply power to the load.
When the AC220 mains supply exists, the current-limiting resistor of the external connector 17 is connected to the full-bridge module MB6S, alternating current is converted into direct current voltage through the full-bridge module MB6S and the filtering of the capacitor 4, the optical coupler 7 is conducted at the moment, and a pin 16-1 of the processor 16 detects the low level; the output of pin 16-2 of the processor 16 is low level, the triode 13 is cut off, and the pins 11-4 and 11-3 of the relay 11 are disconnected, namely the pins 17-3 and 17-4 of the external connector 17 are disconnected. The UPS is thus unable to provide load power, which is provided by the mains AC 220V.
When the AC220 mains supply is powered down, the full-bridge module MB6S has no dc voltage output, at this time, the optocoupler 7 is cut off, and the detection level of the pin 16-1 of the processor 16 changes from low to high; at this time, the output of pin 16-2 of the processor 16 is high level, the triode 13 is conducted, and pin 11-4 and pin 11-3 of the relay 11 are attracted, that is, pin 17-3 and pin 17-4 of the external connector 17 are attracted. Therefore, the UPS provides load power supply, a working time user sets the power failure working time of a product through a key and a display screen, and the time of the 16-2 pin output of the processor 16 changing to high and low level is set, so that the UPS is controlled to work for the load, the power supply is controlled in a time-sharing mode, and the stability of the system is guaranteed.
The product of the scheme is installed in a panel mode by adopting the cabinet and is provided with the keys and the display screen, so that a user can conveniently distribute electric energy to a load through the keys; compared with the PLC, the PLC is simple in setting and low in price, so that the PLC meets future requirements of the power industry, has the advantages of preventing/avoiding accidents, strengthening the internal energy assessment of enterprises, reducing equipment maintenance and overhaul time and the like, and provides a solid and reliable foundation for the modern management of enterprises and public institutions.
Claims (9)
1. A timing logic controller circuit, characterized by: the system comprises an external connector (17), a bridge rectifier (3), an optocoupler (7), a processor (16), a triode (13), a relay (11) and a user operation terminal (18);
the input high end of the external connector (17) is connected with the input high end of the bridge rectifier (3) through a first resistor (1), and the input low end of the external connector (17) is connected with the input low end of the bridge rectifier (3); a second resistor (2) is connected in parallel between the input high end and the input low end of the bridge rectifier (3);
the high output end of the bridge rectifier (3) is connected with the high input end of the optocoupler (7) through a fifth resistor (5), and the low output end of the bridge rectifier (3) is connected with the low input end of the optocoupler (7) through a sixth resistor (6); a capacitor (4) is connected in parallel between the output high end and the output low end of the bridge rectifier (3);
the output high end of the optical coupler (7) is divided into two paths, wherein one path is connected with a power supply (9) through an eighth resistor (8), and the other path is connected with a signal detection end of a processor (16); the output low end of the optical coupler (7) is grounded;
when the signal detected by the signal detection end of the processor (16) is at a high level, the control output end outputs a low level; when the signal detected by the signal detection end of the processor (16) is at a low level, the control output end outputs a high level;
the control output end of the processor (16) is connected with the base electrode of the triode (13) through a fourteenth resistor (14);
the emitter of the triode (13) is grounded, the collector of the triode is connected with one end of the coil of the relay (11), and the other end of the coil of the relay (11) is connected with a power supply;
the main contact and the auxiliary contact of the relay (11) are respectively connected with two output ends of the external connector (17);
the user operation terminal (18) is connected with the processor (16).
2. The timing logic controller circuit of claim 1, wherein:
the bridge rectifier (3) is a full bridge module MB 6S.
3. A timing logic controller circuit according to claim 1 or 2, wherein:
the second resistor (2) is a piezoresistor.
4. The timing logic controller circuit of claim 3, wherein:
the resistance values of the first resistor (1), the fifth resistor (5) and the sixth resistor (6) are all 15K omega, and the rated power of the resistors is 2W.
5. The timing logic controller circuit of claim 4, wherein:
and the base electrode and the emitter electrode of the triode (13) are connected through a fifteenth resistor (15).
6. The timing logic controller circuit of claim 5, wherein:
the resistance values of the eighth resistor (8) and the fifteenth resistor (15) are 4.7K omega-10K omega.
7. The timing logic controller circuit of claim 6, wherein:
the resistance value of the fourteenth resistor (14) is 1K omega.
8. The timing logic controller circuit of claim 7, wherein:
and the coil of the relay (11) is connected with a diode (12) which is arranged in the reverse direction in parallel.
9. The timing logic controller circuit of claim 8, wherein:
the diode (12) is a Schottky diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020925322.8U CN212060953U (en) | 2020-05-27 | 2020-05-27 | Timing logic controller circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020925322.8U CN212060953U (en) | 2020-05-27 | 2020-05-27 | Timing logic controller circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212060953U true CN212060953U (en) | 2020-12-01 |
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ID=73520773
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020925322.8U Active CN212060953U (en) | 2020-05-27 | 2020-05-27 | Timing logic controller circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212060953U (en) |
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2020
- 2020-05-27 CN CN202020925322.8U patent/CN212060953U/en active Active
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