CN211959256U

CN211959256U - LORA protocol conversion device

Info

Publication number: CN211959256U
Application number: CN202020616454.2U
Authority: CN
Inventors: 潘申银
Original assignee: Individual
Current assignee: Individual
Priority date: 2020-04-22
Filing date: 2020-04-22
Publication date: 2020-11-17
Anticipated expiration: 2030-04-22

Abstract

The utility model provides a LORA protocol conversion device, which comprises a CPU, an Ethernet communication interface, a LORA data receiving and transmitting core, a 4G/5G data receiving and transmitting chip and a FPGA data conversion chip; the CPU is connected with the Ethernet communication interface through an MII interface and is connected with the FPGA data conversion chip through an asynchronous receiving and transmitting transmitter of a serial port; the FPGA data conversion chip is connected with the 4G/5G data transceiver chip through the asynchronous transceiver transmitter and is connected with the LORA data transceiver chip module through the universal SPI interface. The LORA protocol conversion device can establish routing channels of any two channels of LORA wireless data, 4G/5G data and Ethernet data through configuration, and adopts FPGA hardware to realize conversion and intercommunication of the routing channel data and realize the gateway protocol conversion function of the wireless channel of the Internet of things through the Ethernet.

Description

LORA protocol conversion device

Technical Field

The utility model relates to a conversion equipment especially relates to a LORA protocol conversion equipment.

Background

There are many wireless technologies in the application of the internet of things, and a local area network or a wide area network can be formed. The wireless technologies forming the local area network mainly include 2.4GHz WiFi, Bluetooth, Zigbee and the like, and the wireless technologies forming the wide area network mainly include 2G/3G/4G and the like. The advantages and the disadvantages of the wireless technologies are obvious.

Before the Low Power Wide Area Network (LPWAN) was produced, it appeared that there was only one alternative between long distance and Low Power consumption. After adopting the LPWAN technology, designers can realize both the LPWAN technology and the LPWAN technology, realize longer-distance communication and lower power consumption to the maximum extent, and simultaneously save the cost of an additional repeater.

The LoRa is one of LPWAN communication technologies, and is an ultra-long-distance wireless transmission scheme based on spread spectrum technology adopted and popularized by Semtech corporation in the united states. The scheme changes the prior compromise consideration mode of transmission distance and power consumption, provides a simple system which can realize long distance, long battery life and large capacity for users, and further expands the sensing network. Currently, the LoRa mainly operates in global free frequency bands including 433, 868, 915MHz, and the like.

The LoRa combines digital spread spectrum, digital signal processing and forward error correction coding technology, and has unprecedented performance indexes. A Low Power Wide Area Network (LPWAN) is an indispensable part of the internet of things, has the characteristics of Low Power consumption, Wide coverage range and strong penetrability, and is suitable for application conditions of sending and receiving a small amount of data every few minutes, such as water transportation positioning, street lamp monitoring, parking space monitoring and the like. The LoRa alliance of LPWAN related organization currently has 145 members in the world, and its luxurious ecosystem enables strong interoperability of devices following the LoRaWAN protocol. A communication gateway completely conforming to LoRaWAN standards can be accessed to tens of thousands of wireless sensor nodes within 5 to 10 kilometers, the efficiency of the communication gateway is far higher than that of a traditional point-to-point polling communication mode, and the communication power consumption of the nodes can be greatly reduced.

The LORA wireless technology, the 4G/5G wireless technology and the Ethernet technology all adopt different data transmission modes, and the translation and conversion of data protocols among the wide area network gateway routes of the cross-wireless technology need to be solved according to the networking requirements of the Internet of things network.

SUMMERY OF THE UTILITY MODEL

The utility model provides a LORA protocol conversion equipment for solve the data protocol translation conversion problem of LORA wireless technology, 4G 5G wireless technology and ethernet technique, its technical scheme is as follows:

a LORA protocol conversion device comprises a CPU, an Ethernet communication interface, a LORA data receiving and transmitting core, a 4G/5G data receiving and transmitting chip and an FPGA data conversion chip; the CPU is connected with the Ethernet communication interface through an MII interface and is connected with the FPGA data conversion chip through an asynchronous receiving and transmitting transmitter of a serial port; the FPGA data conversion chip is connected with the 4G/5G data transceiver chip through the asynchronous transceiver transmitter and is connected with the LORA data transceiver chip module through the universal SPI interface.

The CPU processor adopts ARM9 as an iMAX28X chip.

The MII interface of the iMAX28X chip is 85/86/88/89/90 pins.

The LORA data transceiver chip adopts an SL1278 chip LORA wireless module.

The SPI interface of the SL1278 chip is pin 16/17/18/19.

The 4G/5G data transceiver chip adopts an EC204G/5G wireless module.

The FPGA data conversion chip adopts an LM3S6916 chip.

The Ethernet communication interface adopts a DP8384 chip.

The LORA protocol conversion device can establish routing channels of any two channels of LORA wireless data, 4G/5G data and Ethernet data through configuration, and adopts FPGA hardware to realize conversion and intercommunication of the routing channel data and realize the gateway protocol conversion function of the wireless channel of the Internet of things through the Ethernet.

Drawings

Fig. 1 is a schematic structural diagram of the LORA protocol conversion apparatus;

FIG. 2 is a schematic diagram of the Ethernet transceiver circuitry;

FIG. 3 is a schematic diagram of the network cable interface circuit;

FIG. 4 is a schematic diagram of the LORA wireless data transceiver circuitry;

FIG. 5 is a schematic diagram of the wireless module;

FIG. 6 is a pin connection diagram of the LM3S6916 chip.

Detailed Description

As shown in fig. 1, the LORA protocol conversion device includes a CPU processor 101, an ethernet communication interface 102, a LORA data transceiver chip 103, a 4G/5G data transceiver chip 104, and an FPGA data conversion chip 105.

The CPU 101 is connected with the Ethernet communication interface 102 through an MII interface, and downloads data through the Ethernet communication interface 102; the CPU processor 101 is connected with the FPGA data conversion chip 105 through an asynchronous receiving and transmitting transmitter of a serial port to perform data interactive transmission; the FPGA data conversion chip 105 is connected with the 4G/5G data transceiver chip 104 through a universal serial port asynchronous transceiver transmitter and is connected with the LORA data transceiver chip module 103 through a universal SPI interface for data interactive transmission.

The CPU processor 101 adopts a core board with an ARM9 as a core and a CPU-iMAX 28X of freescale corporation as a core, and is a CPU system supporting a linux operating system, and can form a minimum core system of the technical scheme, and the CPU processor is connected with the ethernet communication interface 102(36/37/3/4/5 pins) through an MII interface (85/86/88/89/90 pin) and an external PHY chip (DP8384 chip) ethernet interface chip, and has a digital interface with a level of 3.3V.

In connection with the ethernet transceiver circuit shown in fig. 2, the following is a connection table for the ARM9 iMAX 28X-ethernet MII interface pins:

as shown in fig. 3, the CPU processor 101 implements configuration of the LORA wireless/4G/5G module and analysis of the data protocol. According to the networking data transmission requirement, a LORA-4G/5G, LORA-Ethernet and 4G/5G-Ethernet gateway channel is established to complete the functions of relevant protocol conversion, transparent data transmission and the like.

As shown in fig. 4, the LORA data transceiver chip 103 adopts a LORA wireless module of a SL1278 chip to implement the functions of sending and receiving LORA wireless data (21/22, 27/28 pins, analog interface, 1V). The LORA data transceiver chip 103 performs parameter configuration according to service requirements by the protocol translation conversion and ethernet gateway module, and performs data interaction with the protocol translation conversion and ethernet gateway module through the SPI interface (16/17/18/19 pin, digital interface 3.3V).

As shown in fig. 5, the 4G/5G data transceiver chip 104 employs an EC204G/5G wireless module to implement a 4G/5G wireless data transceiving function (pin 49, analog signal, level 500 mv). The protocol translation conversion and Ethernet gateway module carries out parameter configuration according to service requirements, and carries out data interaction with the protocol translation conversion and Ethernet gateway module through a serial port (67/66 pin, digital signal and level 3.3V) and an interface.

As shown in fig. 6, the FPGA data conversion chip 105 employs an LM3S6916 chip, and the transparent transmission conversion of the data protocol of the hardware is realized by the FPGA, so as to realize the hardware conversion of the LORA data (pin 23/24/25/26 of SPI data interface, level 3.3V) and/4G/5G data (pin 11/12 of serial data interface, level 3.3V) and the data of the MCU core board serial port (pin 18/19 of serial data interface, level 3.3V).

The Ethernet communication interface 102(DP8384) chip adopts an MII interface type, and performs Ethernet data interaction with the CPU chip according to a protocol to realize the interaction of the Ethernet data.

Claims

1. An LORA protocol conversion apparatus, characterized in that: the system comprises a CPU, an Ethernet communication interface, an LORA data transceiver core, a 4G/5G data transceiver chip and an FPGA data conversion chip; the CPU is connected with the Ethernet communication interface through an MII interface and is connected with the FPGA data conversion chip through an asynchronous receiving and transmitting transmitter of a serial port; the FPGA data conversion chip is connected with the 4G/5G data transceiver chip through the asynchronous transceiver transmitter and is connected with the LORA data transceiver chip module through the universal SPI interface.

2. The LORA protocol conversion device of claim 1, wherein: the CPU processor adopts ARM9 as an iMAX28X chip.

3. The LORA protocol conversion device of claim 2, wherein: the MII interface of the iMAX28X chip is 85/86/88/89/90 pins.

4. The LORA protocol conversion device of claim 1, wherein: the LORA data transceiver chip adopts an SL1278 chip LORA wireless module.

5. The LORA protocol conversion device of claim 4, wherein: the SPI interface of the SL1278 chip is pin 16/17/18/19.

6. The LORA protocol conversion device of claim 1, wherein: the 4G/5G data transceiver chip adopts an EC204G/5G wireless module.

7. The LORA protocol conversion device of claim 1, wherein: the FPGA data conversion chip adopts an LM3S6916 chip.

8. The LORA protocol conversion device of claim 1, wherein: the Ethernet communication interface adopts a DP8384 chip.