CN211929480U - Packaging structure - Google Patents
Packaging structure Download PDFInfo
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- CN211929480U CN211929480U CN202020704315.5U CN202020704315U CN211929480U CN 211929480 U CN211929480 U CN 211929480U CN 202020704315 U CN202020704315 U CN 202020704315U CN 211929480 U CN211929480 U CN 211929480U
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- Prior art keywords
- boss
- component
- substrate
- solder
- package structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
Abstract
The utility model provides a packaging structure. The bosses are arranged on the substrate, so that when the solder is used for welding the element, the solder can be uniformly distributed between the element and the substrate under the limitation of the bosses, the thickness uniformity of the solder is improved, and the improvement of the yield of the whole welding process and the reliability of a final product are facilitated.
Description
Technical Field
The utility model relates to the field of packaging technology, in particular to packaging structure.
Background
In the process of packaging the component on the substrate, solder is usually disposed between the substrate and the component, and the solder undergoes a solid-liquid-solid phase transition to solder the component on the substrate. However, due to differences in welding parameters, tooling structures, fitting structures, and the like, the thickness uniformity of the solder cannot be guaranteed after the solder is melted and solidified at a high temperature.
Fig. 1 is a schematic diagram of a conventional package structure, and as shown in fig. 1, a component 20 is packaged on a substrate 10 by using solder 30 between the component 20 and the substrate 10. Based on the existing welding process, the problem of uneven thickness of the solder is easy to occur after the solder is solidified, so that the yield of the device is influenced, and meanwhile, the risk of failure of the packaging process is increased.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a packaging structure to solve the inhomogeneous problem of solder thickness between component and the base plate among the current packaging structure.
In order to solve the above technical problem, the utility model provides an encapsulation structure, include:
the substrate comprises a conductive metal layer, and a boss is formed on the conductive metal layer; and the number of the first and second groups,
a component disposed on the boss of the substrate and filled with solder between the component and the substrate to solder the component on the substrate.
Optionally, at least two bosses are provided on the substrate for each component, so that the component is mounted on the at least two bosses.
Optionally, the plurality of bosses below the element are arranged in an array.
Optionally, the height of the plurality of bosses below the same element is uniform.
Optionally, the height of the boss is 0.04mm to 0.3 mm.
Optionally, the boss is a cylinder, and the radius of the top surface of the cylinder of the boss is 0.5mm to 1.5 mm; or the boss is a rectangular cylinder, and the side length of the top surface of the rectangular cylinder of the boss is 0.5-1.5 mm.
Optionally, the material of the boss includes at least one of copper and gold.
Optionally, the substrate includes a ceramic insulating layer, a lower metal layer located on a lower surface of the ceramic insulating layer, and an upper metal layer located on an upper surface of the ceramic insulating layer, and the boss is formed on the upper metal layer.
Optionally, the boss and the conductive metal layer are of an integrated structure.
Optionally, the element comprises a power device.
Optionally, the substrate has at least one functional area, each functional area is provided with the boss, and each functional area is welded with an element.
The utility model provides an among the packaging structure, because be provided with the boss on the base plate to when utilizing solder welding component, the solder can be based on evenly distributed improves the thickness homogeneity of solder between component and base plate under the restriction of boss, and then is favorable to improving the yield of whole welding process and the reliability of final product.
Drawings
Fig. 1 is a schematic diagram of a conventional package structure;
fig. 2 is a top view of a package structure according to an embodiment of the present invention;
fig. 3 is a side view of a package structure according to an embodiment of the invention;
fig. 4a to 4c are schematic structural views illustrating a method for manufacturing a substrate according to an embodiment of the present invention;
fig. 5a to 5b are schematic structural views illustrating another method for manufacturing a substrate according to an embodiment of the present invention.
Wherein the reference numbers are as follows:
10/100-a substrate;
100 a-boss;
110 — a lower metal layer;
120-an intermediate carrier plate;
130-upper metal layer;
20/200-element;
30/300-solder.
Detailed Description
The following provides a package structure according to the present invention with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in simplified form and are not to precise scale, and are provided for convenience and clarity in order to facilitate the description of the embodiments of the present invention.
Fig. 2 is a top view of a package structure according to an embodiment of the present invention, and fig. 3 is a side view of the package structure according to an embodiment of the present invention. As shown in fig. 2 and fig. 3, the package structure includes: a substrate 100 and a component 200 soldered on the substrate 100.
Specifically, a boss 100a is formed on the substrate 100, and the element 200 is mounted on the boss 100a when the element 200 is soldered to the substrate 100. That is, the component 200 is disposed on the boss 100a of the substrate 100, and solder 300 is further filled between the component 200 and the substrate 100 to solder the component 200 on the substrate 100.
The element 200 is, for example, a semiconductor chip. The element 200 may further include a power device, such as a power transistor device. Specifically, the power transistor device may include an Insulated Gate Bipolar Transistor (IGBT), a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), or the like.
It should be noted that, because the substrate 100 is provided with the boss 100a, when the component 200 is soldered on the substrate 100 by the solder 300, the thickness of the solder 300 between the component 200 and the substrate 100 can be more uniform under the limitation of the boss 100a, which is favorable for improving the yield of the whole soldering process and the reliability of the final product.
Wherein, the mesa of the boss 100a is a flat mesa to realize the stable support to the component 200 and improve the levelness of the component 200 welded on the substrate 100. And, the height of the boss 100a may be flush with the height of the solder 300, or the height of the boss 100a may be lower than the height of the solder 300. In this embodiment, the solder 300 is higher than the bump 100a, so that the solder 300 not only solders the bottom surface of the component 200, but also further spreads upward to the sidewall of the component 200, thereby effectively improving the soldering strength to the component 200.
It should be noted that the height of the boss 100a can be adjusted according to the thickness of the solder 300. Specifically, when the thickness of the solder 300 is set, on one hand, the thermal conductivity of the solder with the corresponding thickness needs to be considered, and on the other hand, the solder which is melted at a high temperature and further solidified does not have a large number of pores, and for example, the thickness of the solder 300 may be set to be 0.04mm to 0.3 mm. And, after the thickness of the solder 300 is determined, the height of the boss 100a may be equal to or slightly lower than the thickness of the solder 300, for example, the height of the boss 100a is correspondingly between 0.04mm and 0.3 mm.
In addition, the shape and the sectional size of the boss 100a may be adjusted according to actual conditions. For example, the boss 100a may be a cylinder, or may be a rectangular cylinder, etc. And, when the boss 100a is a cylinder, the radius of the cylinder top surface of the boss 100a may be 0.5mm to 1.5mm, specifically, the size of the cylinder top surface of the boss 100a is, for example, 1 mm; or, when the boss 100a is a rectangular cylinder, the length of the top surface of the rectangular cylinder of the boss 100a may be 0.5mm to 1.5mm, and specifically, the top surface of the rectangular cylinder of the boss 100a is, for example, 1mm × 1 mm.
Referring to fig. 2 and 3, the substrate 100 may be provided with at least two bosses 100a for each component 200, so that the component 200 is disposed on the at least two bosses 100a, and the component 200 may be mounted on the at least two bosses 100 a.
Further, the heights of the respective bosses 100a are uniform among the plurality of bosses 100a under the same element 200. That is, the mesas of the respective bosses 100a under the same component 200 are located at the same height position, so that the component 200 can be carried at the same height position, and the problem that the component 200 soldered on the substrate 100 is inclined and the like is avoided.
In this embodiment, at least a part of the plurality of bosses 100a under the element 200 may be arranged in a shape matching the shape of the outer peripheral contour of the element 200. For example, if the peripheral contour of the element 200 is rectangular, at least a part of the bosses 100a may be arranged in a rectangular shape. Since the arrangement shape of the plurality of bosses 100a is matched with the shape of the element 200, on one hand, the bearing stability of the element 200 can be improved, and on the other hand, the thickness uniformity of the solder 300 filled between the element 200 and the substrate 100 can be further improved.
Further, a space may be correspondingly surrounded by at least a portion of the projection 100a under the component 200, and based on this, the solder 300 may be filled in the space surrounded by the at least a portion of the projection 100a and may further spread to the outside of the at least a portion of the projection 100 a. That is, the solder 300 is located at least at the center of the component 200 and spreads from the center to the peripheral lands 100 a. For example, the component 200 is rectangular, and a rectangular space can be correspondingly surrounded by at least a part of the projection 100a under the component 200, and the solder 300 is at least filled in the rectangular space.
In this embodiment, the solder 300 is filled in the space surrounded by the at least part of the boss 100a, and further laterally spreads to the outside of the at least part of the boss 100a to cover the sidewall of the at least part of the boss 100a, and the solder 300 also spreads upward to the sidewall of the component 200 to cover a part of the sidewall of the component 200.
With continued reference to fig. 2 and fig. 3, in the present embodiment, the substrate 100 is explained as an example in which 4 bosses 100a are provided for a part of the element 200. That is, in the present embodiment, the 4 bosses 100a provided for the component are provided at, for example, four corner positions of the component 200, respectively, to support the component 200 at the four corner positions of the component 200. Of course, in other embodiments, the 4 bosses 100a provided for the element may be provided at the two long side positions of the element 200, respectively.
It should be appreciated that a predetermined number of bosses may be provided for a particular element. In the present embodiment, 4 bosses are provided for the element, but in other embodiments, for example, only 3 bosses may be provided, and the 3 bosses are arranged below the element in a triangular distribution, for example. Alternatively, in other alternatives, a greater number of bosses may be provided for the element, for example, more than or equal to 5 bosses may be provided.
In addition, in the present embodiment, the plurality of bosses 100a below the element 200 are disposed at positions near the edges of the element 200. However, in other embodiments, other bosses may be disposed in the space surrounded by the edge boss, that is, in the plurality of bosses below the element, part of the bosses may be distributed correspondingly according to the shape of the element, and another part of the bosses may be disposed in the space surrounded by the part of the bosses, for example, the another part of the bosses may be uniformly distributed in the surrounded space. Alternatively, in alternative embodiments, the plurality of bosses 100a under the element 200 may be arranged in an array, for example, the plurality of bosses 100a under the element 200 may be arranged in a 3 × 3 or 4 × 4 array.
Further, the material of the boss 100a is generally a solderable material, and the melting point thereof is higher than that of the solder 300. And, the boss 100a may also be formed using a conductive material. Specifically, by soldering the element 200 to the substrate 100, for example, electrical connection between the element 200 and a wiring in the substrate 100 is further achieved. At this time, since the bump 100a is formed of a conductive material, the electrical connection between the device 200 and the circuit in the substrate 100 can be achieved by the bump 100 a. In this embodiment, the material of the solder 300 may include tin-lead alloy and/or tin-silver alloy, etc., and the material of the solderable lands 100a having conductive property may include at least one of copper and gold.
Alternatively, the substrate 100 includes a conductive metal layer, and the boss 100a is disposed on the conductive metal layer of the substrate 100, in which case, the material of the boss 100a may be the same as that of the conductive metal layer of the substrate 100. That is, the material of the bump 100a may be selected according to the material of the conductive metal layer of the substrate 100.
Specifically, in the present embodiment, the substrate 100 includes a middle carrier 120, a lower metal layer 110 located on a lower surface of the middle carrier 120, and an upper metal layer 130 (a conductive metal layer in the present embodiment) located on an upper surface of the middle carrier 120. The intermediate carrier 120 is, for example, a ceramic insulating layer. And, the boss 100a is disposed on the upper metal layer 130, in which case, the boss 100a may be formed using the same material as the upper metal layer 130. For example, the material of the upper metal layer 130 and the boss 100a each include copper.
Further, the boss 100a may be integrated with the upper metal layer 130. Alternatively, in other aspects, the boss 100a may also be formed on the upper metal layer 130 using a printing process.
With continued reference to fig. 2 and 3, the substrate 100 may have at least one functional region thereon, and each functional region may be provided with a boss 100a, so that a component 200 may be soldered on each functional region.
Based on the package structure described above, a method of forming a substrate having a bump will be described below. Fig. 4a to 4c are schematic structural views illustrating a method for manufacturing a substrate according to an embodiment of the present invention. As shown in fig. 4a to 4c, the method for forming the substrate 100 includes:
a first step, specifically referring to fig. 4a, of forming a lower metal layer 110 on a lower surface of an intermediate carrier 120 and forming an upper metal material layer 130a on an upper surface of the intermediate carrier 120; wherein the upper metal material layer 130a has a larger thickness for further forming an upper metal layer and a boss in a subsequent process;
a second step, referring to fig. 4b specifically, performing a first etching process on the upper metal material layer 130a to segment the upper metal material layer 130a into at least two functional regions;
and a third step, specifically referring to fig. 4c, performing a second etching process on the upper metal material layer 130a to pattern an upper layer portion of the upper metal material layer to form a boss 100a, thereby forming an integrated structure of the boss 100a and the upper metal layer 130.
In addition, in another alternative, the method for forming the substrate 100 may also refer to fig. 5b and 5 a. Specifically, referring to fig. 5b, first, an upper metal layer 130 is formed on the upper surface of the intermediate carrier 120 by using an etching process or a printing process, wherein the upper metal layer 130 may have at least two functional regions; next, a bump 100a is formed on the upper metal layer 130 using a printing process.
In summary, in the package structure of the embodiment, the substrate is provided with the boss, so that when the component is soldered, the component can be mounted on the boss, and the solder between the component and the substrate can be uniformly distributed under the limitation of the boss, thereby improving the thickness uniformity of the solder, and further effectively improving the levelness of the component soldered on the substrate.
It should be noted that although the present invention has been described with reference to the preferred embodiments, the above embodiments are not intended to limit the present invention. To anyone skilled in the art, without departing from the scope of the present invention, the technical solution disclosed above can be used to make many possible variations and modifications to the technical solution of the present invention, or to modify equivalent embodiments with equivalent variations. Therefore, any simple modification, equivalent change and modification made to the above embodiments by the technical entity of the present invention all still belong to the protection scope of the technical solution of the present invention, where the technical entity does not depart from the content of the technical solution of the present invention.
It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. For example, reference to "a step" or "an apparatus" means a reference to one or more steps or apparatuses and may include sub-steps as well as sub-apparatuses. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have the definition of a logical "or" rather than the definition of a logical "exclusive or" unless the context clearly dictates otherwise. Further, implementation of the methods and/or apparatus of embodiments of the present invention may include performing the selected task manually, automatically, or in combination.
Claims (11)
1. A package structure, comprising:
the substrate comprises a conductive metal layer, and a boss is formed on the conductive metal layer; and the number of the first and second groups,
a component disposed on the boss of the substrate and filled with solder between the component and the substrate to solder the component on the substrate.
2. The package structure according to claim 1, wherein at least two bosses are provided on the substrate for each component so that the component is mounted on the at least two bosses.
3. The package structure of claim 2, wherein the plurality of bumps under the component are arranged in an array.
4. The package structure of claim 2 wherein the plurality of bumps are of uniform height beneath the same component.
5. The package structure of claim 1, wherein the height of the boss is between 0.04mm and 0.3 mm.
6. The package structure of claim 1, wherein the boss is a cylinder, and a radius of a top surface of the cylinder of the boss is between 0.5mm and 1.5 mm; or the boss is a rectangular cylinder, and the side length of the top surface of the rectangular cylinder of the boss is 0.5-1.5 mm.
7. The package structure of claim 1, wherein the material of the boss comprises copper or gold.
8. The package structure of claim 1, wherein the substrate comprises a ceramic insulating layer, a lower metal layer on a lower surface of the ceramic insulating layer, and an upper metal layer on an upper surface of the ceramic insulating layer, the boss being formed on the upper metal layer.
9. The package structure of claim 8, wherein the boss and the upper metal layer are a unitary structure.
10. The package structure of claim 1, wherein the component comprises a power device.
11. The package structure of claim 1, wherein the substrate has at least one functional region, each of the functional regions has the bump disposed thereon, and each of the functional regions has a component soldered thereon.
Priority Applications (1)
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CN202020704315.5U CN211929480U (en) | 2020-04-30 | 2020-04-30 | Packaging structure |
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CN202020704315.5U CN211929480U (en) | 2020-04-30 | 2020-04-30 | Packaging structure |
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CN211929480U true CN211929480U (en) | 2020-11-13 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115070157A (en) * | 2022-05-27 | 2022-09-20 | 北京萃锦科技有限公司 | Bottom plate structure beneficial to improving thermal resistance |
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2020
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115070157A (en) * | 2022-05-27 | 2022-09-20 | 北京萃锦科技有限公司 | Bottom plate structure beneficial to improving thermal resistance |
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Address after: 518 Shaoxing Road, Zhejiang Province Patentee after: Shaoxing SMIC integrated circuit manufacturing Co.,Ltd. Address before: 518 Shaoxing Road, Zhejiang Province Patentee before: SMIC manufacturing (Shaoxing) Co.,Ltd. |
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