CN211908675U - Novel synchronous rectification circuit of switching power supply - Google Patents

Abstract

The utility model discloses a switching power supply's novel synchronous rectifier circuit, including connecting in the synchronous rectifier chip U1 between switching power supply primary side transformer T4's secondary coil and the secondary power supply output module, synchronous rectifier chip U1 include logic control module, respectively with logic control module electric connection's switch tube Q4 and awaken the module up to and be used for the power module for synchronous rectifier chip U1 power supply. The utility model discloses a switch tube Q4 directly produces the dither signal, and then does not need special high resistance power tube of additional design to realize this function, and the quantity of the resistance components and parts of reducible peripheral circuit, and then reduce chip layout area, reduce cost, reasonable in design, the principle is simple, be convenient for the encapsulation, the power rectification loss is low, the practicality is strong.

Description

Novel synchronous rectification circuit of switching power supply

Technical Field

The utility model relates to a switching power supply technical field especially relates to a switching power supply's novel synchronous rectification circuit.

Background

In the flyback switching power supply, two main secondary rectification modes are provided, the first mode is to use a rectifier diode for rectification, but the power loss is serious because the conduction voltage drop of the rectifier diode is high, and the second mode is to use an MOS (metal oxide semiconductor) tube with low conduction resistance to replace a diode for rectification, so that the power conversion efficiency can be obviously improved, the rectification loss of the power output is reduced, and the dead zone voltage of the diode does not exist.

Referring to fig. 1, in the conventional circuit for rectifying a secondary power supply by using a MOS transistor, in the circuit, U1 is a synchronous rectification chip integrated with the MOS transistor, when a drain terminal of a chip U1 changes from a high level to a negative voltage, that is, reaches a turn-on threshold of a chip U1, a Logic module (Logic processing module) outputs the high level to turn on the MOS transistor Q2, and at this time, the circuit charges a load resistor RL3 and a capacitor C3 through a secondary coil of a transformer; after the MOS tube Q2 is turned on, the drain terminal voltage of the chip U1 gradually rises, and when the preset time is reached, the pre-turn-off function of the chip U1 starts working, and the grid voltage of the MOS tube Q2 is reduced; when the drain terminal voltage of the chip U1 rises to the turn-off threshold of the chip U1, the gate of the MOS transistor Q2 will be pulled low, and the MOS transistor Q2 is turned off, so as to sum up, the rectification of the secondary power supply can be realized by controlling the switching state of the MOS transistor Q2; in addition, when the chip U1 detects that the output voltage Vout terminal drops to a certain threshold (preset), the chip U1 generates a pulse (a jitter signal or a wake-up signal) with a fixed frequency by controlling the MOS transistor Q3, and induces the pulse into the primary coil through the secondary coil of the transformer to control the primary power transistor to turn on, thereby recharging the secondary power supply (the load resistor RL3 and the capacitor C3); the resistance of the MOS transistor Q3 is relatively large, and the purpose of the MOS transistor Q3 is to reduce the energy of the output capacitor C3 consumed when generating the dither signal, and to prevent the output voltage from being reduced to a lower value; meanwhile, the chip U1 adopts a self-powered mode, and the internal LDO module can generate 5V power to supply to internal circuits.

The synchronous rectification circuit has the following defects:

1) in order to generate a wake-up signal, the chip U1 mainly uses a high-voltage power MOS transistor Q3 and a current-limiting resistor R2, so that the area of the chip U1 is increased, the cost is increased, the chip U1 needs to control two power transistors (a MOS transistor Q2 and a MOS transistor Q3) respectively, and the control mode is more complicated;

2) in order to use the function of the MOS tube Q3, the chip U1 needs to be packaged with one more det pin in a binding manner, so that the binding packaging cost of the chip U1 is increased;

3) for a customer using the synchronous rectification chip U1, a current limiting resistor R1 is also needed externally, so that the component cost of the customer is increased, and the layout area of a PCB is also increased.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a switching power supply's novel synchronous rectification circuit, this circuit directly produce the shake signal through switch tube Q4, and then do not need special high resistance power tube of additional design to realize this function, the quantity of the resistance components and parts of reducible peripheral circuit, and then reduce chip layout area, reduce cost, reasonable in design, the principle is simple, be convenient for encapsulate, the power rectification loss is low, the practicality is strong.

In order to realize the purpose, the following technical scheme is adopted:

a novel synchronous rectification circuit of a switching power supply comprises a synchronous rectification chip U1 connected between a secondary coil of a primary transformer T4 of the switching power supply and a secondary power supply output module, wherein the synchronous rectification chip U1 comprises a logic control module, a switching tube Q4 and a wake-up module which are respectively and electrically connected with the logic control module, and a power supply module used for supplying power to the synchronous rectification chip U1; the logic control module is used for controlling the switching state of the switching tube Q4 to achieve rectification of the secondary power supply output module, the wake-up module is used for detecting the output voltage of the secondary power supply output module, and when the voltage is lower than a preset threshold value, the logic control module controls the switching tube Q4 to generate a jitter signal and transmit the jitter signal to the primary side coil of the primary side transformer T4 so as to control the primary side power tube of the switching power supply to be turned on and further charge the secondary power supply output module.

Further, the synchronous rectification chip U1 further includes an oscillation circuit module connected between the wake-up module and the logic control module, and a gate driving module connected between the logic control module and the gate of the switching tube Q4.

Further, the drain of the switching tube Q4 is connected to the second dotted terminal of the secondary coil of the primary transformer T4 through the drain pin of the synchronous rectification chip U1, and the source of the switching tube Q4 is grounded.

Further, the secondary power output module comprises an energy storage capacitor C5 and a load resistor RL 4; one end of the energy storage capacitor C5 is connected with the second synonym end of the secondary coil of the primary transformer T4, and the other end of the energy storage capacitor C5 is connected with the source electrode of the switching tube Q4; the load resistor RL4 is connected in parallel with the energy storage capacitor C5 and is grounded.

Furthermore, the novel synchronous rectification circuit of the switching power supply further comprises an energy storage capacitor C6, and the power supply module is grounded through the energy storage capacitor C6.

Furthermore, the novel synchronous rectification circuit of the switching power supply also comprises a voltage division resistor R3 and a voltage division resistor R4 which are connected in series; the dotted terminal of the secondary coil of the primary transformer T4 is grounded through a voltage dividing resistor R3 and a voltage dividing resistor R4 in sequence, and the wake-up module is connected with the common connecting end of the voltage dividing resistor R3 and the voltage dividing resistor R4 through a vref pin of a synchronous rectification chip U1.

Adopt above-mentioned scheme, the beneficial effects of the utility model are that:

through the direct dither signal that produces of switch tube Q4, and then need not design a high resistance power tube in addition specially and realize this function, reducible peripheral circuit's resistance components and parts's quantity, and then reduce chip layout area, reduce cost, reasonable in design, the principle is simple, be convenient for encapsulate, the power rectification loss is low, the practicality is strong.

Drawings

FIG. 1 is a prior art synchronous rectification circuit diagram;

FIG. 2 is a diagram of a synchronous rectification circuit of the present invention;

fig. 3 is a schematic block diagram of the synchronous rectification chip of the present invention;

fig. 4 is a diagram showing various waveform changes generated by each module of the circuit according to one embodiment of the present invention (the waveform change after the primary side power tube is turned on is not shown);

fig. 5 is a diagram showing various waveform changes generated by each module of the circuit (showing the waveform changes after the primary power tube is turned on) according to one embodiment of the present invention;

fig. 6 is a simplified circuit diagram of one embodiment of the present invention.

Wherein the figures identify the description:

1-synchronous rectification chip; 2-secondary power supply output module;

11-a logic control module; 12-a wake-up module;

13-a power supply module; 14-an oscillating circuit module;

15-gate drive module.

Detailed Description

The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

Referring to fig. 2 to 6, the utility model provides a novel synchronous rectification circuit of switching power supply, including connecting to the synchronous rectification chip U1 between the secondary coil of the primary transformer T4 of switching power supply and the secondary power supply output module 2, the synchronous rectification chip U1 includes logic control module 11, respectively with logic control module 11 electric connection's switch tube Q4 and awaken up module 12, and be used for the power module 13 for the power supply of synchronous rectification chip U1; the logic control module 11 is configured to control a switching state of the switching tube Q4 to implement rectification of the secondary power output module 2, and the wake-up module 12 is configured to detect an output voltage of the secondary power output module 2, and when the voltage is lower than a preset threshold, the logic control module 11 controls the switching tube Q4 to generate a dither signal and transmit the dither signal to the primary winding of the primary transformer T4, so as to control a primary power tube of the switching power supply to be turned on to charge the secondary power output module 2.

The synchronous rectification chip U1 further includes an oscillation circuit module 14 connected between the wake-up module 12 and the logic control module 11, and a gate driving module 15 connected between the logic control module 11 and the gate of the switching tube Q4; the drain of the switching tube Q4 is connected with the secondary dotted terminal of the secondary coil of the primary transformer T4 through the drain pin of the synchronous rectification chip U1, and the source of the switching tube Q4 is grounded; the secondary power output module 2 comprises an energy storage capacitor C5 and a load resistor RL 4; one end of the energy storage capacitor C5 is connected with the second synonym end of the secondary coil of the primary transformer T4, and the other end of the energy storage capacitor C5 is connected with the source electrode of the switching tube Q4; the load resistor RL4 is connected with the energy storage capacitor C5 in parallel and is grounded; the novel synchronous rectification circuit of the switching power supply further comprises an energy storage capacitor C6, and the power supply module 13 is grounded through the energy storage capacitor C6; the novel synchronous rectification circuit of the switching power supply also comprises a voltage division resistor R3 and a voltage division resistor R4 which are connected in series; the dotted terminal of the secondary coil of the primary transformer T4 is grounded through a voltage dividing resistor R3 and a voltage dividing resistor R4 in sequence, and the wake-up module 12 is connected with the common connection end of the voltage dividing resistor R3 and the voltage dividing resistor R4 through a vref pin of the synchronous rectification chip U1.

The utility model discloses the theory of operation:

as shown in fig. 2 to 6, in operation, a primary side signal of the switching power supply is transmitted to a secondary side coil of the switching power supply through a primary side coil of the primary side transformer T4, and the synchronous rectification chip U1 directly controls the switching state of the switching tube Q4, thereby realizing rectification of the secondary power supply output module 2; specifically, when a primary power tube of the switching power supply is turned off, a current flows through a body diode of the switching tube Q4, a drain terminal (drain pin) of the synchronous rectification chip U1 detects a negative voltage, when the negative voltage reaches a turn-on threshold value set inside the synchronous rectification chip U1, a gate of the switching tube Q4 is pulled high, and at the moment, the switching tube Q4 is turned on; as the voltage at the drain terminal of the synchronous rectification chip U1 gradually increases, when the turn-off threshold of the synchronous rectification chip U1 is reached, the gate of the switching tube Q4 is pulled low, and the switching tube Q4 is turned off; in summary, the rectification of the secondary power output module 2 can be realized by controlling the switching state of the switching tube Q4; when the wake-up module 12 detects that the output voltage of the secondary power output module 2 is lower than a preset threshold (preset voltage), a pulse with a fixed frequency is generated, so as to control the switching tube Q4 to generate a jitter signal, which is transmitted to the primary coil of the primary transformer T4 through the secondary coil, and further control the primary power tube to be turned on to charge the secondary power output module 2.

Specifically, the synchronous rectification chip U1 mainly includes a logic control module 11, a switching tube Q4, a wake-up module 12, a power module 13, an oscillation circuit module 14, and a gate driving module 15; the power module 13 is externally connected with a filter capacitor C6 through an svcc pin of the synchronous rectification chip U1, and mainly supplies power to the chip, and if the synchronous rectification chip U1 is detected not to reach a starting voltage or under-voltage in a working process, an under-voltage locking signal is generated; the built-in oscillating circuit module 14 does not need to be set by a peripheral circuit, and can generate a fixed frequency signal under a certain condition (when the wake-up module 12 detects that the output voltage of the secondary power output module 2 is lower than a preset threshold), and the logic control module 11 controls the switching tube Q4 to generate a jitter signal and transmit the jitter signal to the primary coil of the primary transformer T4; the logic control module 11 is configured to process signals generated by modules in the synchronous rectification chip U1, generate a signal for controlling the switching transistor Q4 to be turned on or off, and transmit the signal to the gate driving module 15, where the gate driving module 15 is configured to amplify the signal, so as to control the switching transistor Q4 to be turned on or off.

Specifically, referring to fig. 4-5 (the waveform change after the primary power tube is turned on is not shown in fig. 4, the waveform on the right of the dotted line in fig. 4 is not processed, and the waveform on the right of the dotted line is specifically shown in fig. 5), when the wake-up module 12 detects that the output voltage of the secondary power output module 2 is lower than the preset threshold, and when no output is provided at the gate of the synchronous rectification chip U1, the oscillating circuit module 14 is controlled to generate a signal with a fixed frequency and a fixed pulse width (e.g., WK waveform in fig. 4), the synchronous rectification power switch Q4 is turned on (e.g., driver waveform in fig. 4), thereby generating a dither signal (e.g., drain waveform in fig. 4), which is transferred to its primary winding through the secondary winding of the primary transformer T4 (e.g., primaryfeed back waveform in fig. 4), when the Primary side detects the jitter signal, a Primary side power tube (such as a Primary MOS waveform in fig. 4) is turned on, and the secondary power output module 2 is charged.

As shown in fig. 5, after the primary power transistor is turned on (e.g., the PrimaryMOS waveform in fig. 5), the signal at the drain terminal in the waveform changes accordingly (e.g., the drain waveform in fig. 5), and after the primary power transistor (PrimaryMOS) is turned off, the body diode of the switching transistor Q4 is turned on, and at this time, the synchronous rectifier chip U1 detects the negative voltage at the drain terminal, and further turns on the switching transistor Q4 (e.g., the driver waveform in fig. 5).

As shown in fig. 1, in the prior art switching power supply synchronous rectification circuit, another MOS transistor Q3 is used to generate a dither signal, in order to prevent that when the MOS transistor Q2 is directly turned on, too much energy is absorbed from the energy storage capacitor C3, so that the output voltage at the Vout terminal is lower, therefore, an additional MOS transistor Q3 is added, and then a resistor R2 is connected in series and connected to the drain terminal through the det pin of the chip, so as to reduce the energy loss on the energy storage capacitor C3 when the dither signal is generated; and in the utility model discloses in, through strict theoretical calculation and test verification, successfully use same MOS pipe, switching tube Q4 produces the shake signal promptly to need not additionally to increase the power tube again, reach the purpose of simplifying the circuit. The theoretical calculation process is as follows, and the simplified circuit is shown in fig. 6, in which the switching tube Q4 is simplified into a resistor R according to its on-resistance, the secondary coil of the primary transformer T4 is simplified into an inductor L, the energy storage capacitor C5 of the secondary power output module 2 is simplified into C, and the consumption current of the resistor R is:

the energy consumed by the resistor R during the time t1 is:

according to the formula, the energy loss in the fixed time is not only related to the internal resistance of the switching tube Q4, but also related to the coil parameter of the primary transformer T4, in the design, the internal resistance of the switching tube Q4 and the coil parameter of the primary transformer T4 are fixed, in order to reduce the energy loss, the minimum effective T1 time mode is used, the opening time of the switching tube Q4 used in the design is 800ns, the opening period is 60 mus, the loss is reduced by controlling the conducting time of the switching tube Q4, the circuit is further simpler and more convenient, the using number of components is reduced, and the cost is reduced.

The above description is only exemplary of the present invention and should not be construed as limiting the present invention, and any modifications, equivalents and improvements made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims (6)

1. A novel synchronous rectification circuit of a switching power supply comprises a synchronous rectification chip U1 connected between a secondary coil of a primary transformer T4 of the switching power supply and a secondary power supply output module, and is characterized in that the synchronous rectification chip U1 comprises a logic control module, a switching tube Q4 and a wake-up module which are respectively and electrically connected with the logic control module, and a power supply module used for supplying power to the synchronous rectification chip U1; the logic control module is used for controlling the switching state of the switching tube Q4 to achieve rectification of the secondary power supply output module, the wake-up module is used for detecting the output voltage of the secondary power supply output module, and when the voltage is lower than a preset threshold value, the logic control module controls the switching tube Q4 to generate a jitter signal and transmit the jitter signal to the primary side coil of the primary side transformer T4 so as to control the primary side power tube of the switching power supply to be turned on and further charge the secondary power supply output module.

2. The novel synchronous rectification circuit of the switching power supply as claimed in claim 1, wherein the synchronous rectification chip U1 further comprises an oscillation circuit module connected between the wake-up module and the logic control module, and a gate driving module connected between the logic control module and the gate of the switching tube Q4.

3. The novel synchronous rectification circuit of the switching power supply as claimed in claim 2, wherein the drain of the switching tube Q4 is connected with the second dotted terminal of the secondary coil of the primary transformer T4 through the drain pin of the synchronous rectification chip U1, and the source of the switching tube Q4 is grounded.

4. The novel synchronous rectification circuit of the switching power supply as claimed in claim 3, wherein the secondary power output module comprises an energy storage capacitor C5, a load resistor RL 4; one end of the energy storage capacitor C5 is connected with the second synonym end of the secondary coil of the primary transformer T4, and the other end of the energy storage capacitor C5 is connected with the source electrode of the switching tube Q4; the load resistor RL4 is connected in parallel with the energy storage capacitor C5 and is grounded.

5. The novel synchronous rectification circuit of the switching power supply as claimed in claim 4, further comprising an energy storage capacitor C6, wherein the power module is grounded via the energy storage capacitor C6.

6. The novel synchronous rectification circuit of the switching power supply as claimed in claim 1, further comprising a voltage dividing resistor R3 and a voltage dividing resistor R4 connected in series; the dotted terminal of the secondary coil of the primary transformer T4 is grounded through a voltage dividing resistor R3 and a voltage dividing resistor R4 in sequence, and the wake-up module is connected with the common connecting end of the voltage dividing resistor R3 and the voltage dividing resistor R4 through a vref pin of a synchronous rectification chip U1.

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