CN211860503U - Earphone interface circuit and display device - Google Patents
Earphone interface circuit and display device Download PDFInfo
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- CN211860503U CN211860503U CN202020761551.0U CN202020761551U CN211860503U CN 211860503 U CN211860503 U CN 211860503U CN 202020761551 U CN202020761551 U CN 202020761551U CN 211860503 U CN211860503 U CN 211860503U
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Abstract
The utility model discloses an earphone interface circuit and a display device, wherein the interface circuit comprises an earphone seat, a control chip, a first switch unit, a second switch unit, a third switch unit and a fourth switch unit; the first switch unit is electrically connected with the earphone seat and the control chip respectively; the second switch unit is electrically connected with the earphone seat and the control chip respectively; the third switch unit is electrically connected with the earphone seat and the control chip respectively; the fourth switch unit is electrically connected with the earphone seat and the control chip respectively. The utility model discloses a plurality of switch units are connected with the earphone seat, can realize the compatibility to the headphone plug of different standards, and it is convenient to use and select for the user.
Description
Technical Field
The utility model relates to an earphone interface technical field especially relates to an earphone interface circuit and display device.
Background
3.5mm headphone plugs on the market at present are divided into 3 types, namely 3-section headphones, 4-section OMTP standard headphones and 4-section CTIA standard headphones, while for headphone plugs of different standards, the structures and definitions of inner seats are different, when unmatched seats and plugs are used, the problems of distortion, crosstalk and the like can be caused, and inconvenience is brought to users in use and selection.
Accordingly, the prior art is yet to be improved and developed.
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned prior art not enough, the utility model aims to provide an earphone interface circuit and display device to solve the problem that the headphone plug of different standards brings inconvenience for user's use and selection.
The technical scheme of the utility model as follows:
an earphone interface circuit comprises an earphone seat, a control chip, a first switch unit, a second switch unit, a third switch unit and a fourth switch unit; the first switch unit is electrically connected with the earphone seat and the control chip respectively; the second switch unit is electrically connected with the earphone seat and the control chip respectively; the third switch unit is electrically connected with the earphone seat and the control chip respectively; the fourth switch unit is electrically connected with the earphone seat and the control chip respectively.
According to a further configuration of the present invention, the first switch unit includes a first MOS transistor, a gate of the first MOS transistor is connected to a first switch pin of the control chip, a source of the first MOS transistor is connected to pin 1 of the earphone holder, and a drain of the first MOS transistor is grounded;
the second switch unit comprises a second MOS tube, the grid electrode of the second MOS tube is connected with a second switch pin of the control chip, the source electrode of the second MOS tube is connected with the 1 st pin of the earphone holder, and the drain electrode of the second MOS tube is connected with a microphone signal pin of the control chip;
the third switch unit comprises a third MOS tube, the grid electrode of the third MOS tube is connected with the first switch pin of the control chip, the source electrode of the third MOS tube is connected with the 4 th pin of the earphone holder, and the drain electrode of the third MOS tube is connected with the microphone signal pin of the control chip;
the fourth switch unit comprises a fourth MOS tube, the grid electrode of the fourth MOS tube is connected with the second switch pin of the control chip, the source electrode of the fourth MOS tube is connected with the 4 th pin of the earphone holder, and the grid electrode of the fourth MOS tube is grounded.
In a further configuration of the present invention, the 2 nd pin of the earphone holder is connected to the left channel output signal pin of the control chip; the 3 rd pin of the earphone seat and the right sound channel output signal pin of the control chip.
The utility model discloses a further setting, this interface circuit still include a first resistance, pull-up resistance's one end with control chip with the 5 th pin of earphone seat is connected.
The utility model discloses a further setting, first resistance is pull-up resistance, pull-up resistance with control chip's earphone is listened the pin and is connected for whether detect headphone plug inserts the earphone seat.
The utility model discloses a further setting, earphone seat includes first shell fragment, second shell fragment, third shell fragment and fourth shell fragment, the 2 nd pin of earphone seat is connected to the first shell fragment, the 3 rd pin of earphone seat is connected to the second shell fragment, the 1 st pin of earphone seat is connected to the third shell fragment, the 4 th pin of earphone seat is connected to the fourth shell fragment; wherein the 5 th pin and the 2 nd pin of the earphone holder are connected together.
The utility model discloses a further set up, first shell fragment, second shell fragment, third shell fragment and fourth shell fragment correspond with headphone plug's left sound channel, right sound channel, ground connection and microphone respectively and are connected, perhaps first shell fragment, second shell fragment, third shell fragment and fourth shell fragment correspond with headphone plug's left sound channel, right sound channel, microphone and ground connection respectively and are connected, perhaps first shell fragment, second shell fragment, third shell fragment correspond with headphone plug's left sound channel, right sound channel and ground connection respectively and are connected.
In a further arrangement, the control chip is HI3751ARBCV5600N 0N.
A display device comprises the earphone interface circuit.
The utility model provides an earphone interface circuit and display device, interface circuit include earphone seat, control chip, first switch unit, second switch unit, third switch unit and fourth switch unit; the first switch unit is electrically connected with the earphone seat and the control chip respectively; the second switch unit is electrically connected with the earphone seat and the control chip respectively; the third switch unit is electrically connected with the earphone seat and the control chip respectively; the fourth switch unit is electrically connected with the earphone seat and the control chip respectively. The utility model discloses a plurality of switch units are connected with the earphone seat, can realize the compatibility to the headphone plug of different standards, and it is convenient to use and select for the user.
Drawings
In order to clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a plug diagram of a 3-segment headphone interface.
Fig. 2 is a schematic diagram of a plug of the 4-segment CTIA interface standard.
Fig. 3 is a schematic diagram of a plug of the 4-segment OMTP interface standard.
Fig. 4 is a block diagram of the earphone interface circuit of the present invention.
Fig. 5 is a schematic connection diagram of the earphone socket of the present invention corresponding to the earphone plug.
Fig. 6 is a schematic circuit diagram of the interface circuit of the present invention.
Detailed Description
The utility model provides an earphone interface circuit and display device is applicable to the equipment that has the earphone interface, for example, TV set, computer and cell-phone etc.. The utility model discloses can be under the prerequisite that does not increase earphone terminal quantity, the 3.5mm headphone plug of compatible different models (3 section formulas and 4 section formulas 3.5mm headphone plug) has reduced the hardware cost, has strengthened the commonality of hardware. In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention will be described in further detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In the embodiments and claims, the terms "a" and "an" can mean "one or more" unless the article is specifically limited.
In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
Fig. 1 is a plug schematic diagram of a 3-segment headphone interface, in which the headphone wiring sequence is (from the headphone head inward): left channel 1-right channel 2-ground 3. Fig. 2 is a plug diagram of the 4-segment CTIA interface standard, in which the earphone line sequence is (from the earphone head to the inside): left channel 1-right channel 2-ground 3-microphone line 4. Fig. 3 is a schematic diagram of a plug of the 4-segment OMTP interface standard. The earphone line sequence is (from the earphone head to the inside): left channel 1-right channel 2-ground 4-microphone line 3.
Referring to fig. 4 to fig. 6, the present invention provides a preferred embodiment of an earphone interface circuit.
As shown in fig. 4, the present invention provides an earphone interface circuit, which includes an earphone holder 10, a control chip 20, a first switch unit 30, a second switch unit 40, a third switch unit 50, and a fourth switch unit 60. Specifically, the first switch unit 30 is electrically connected to the earphone holder 10 and the control chip 20, the second switch unit 40 is electrically connected to the earphone holder 10 and the control chip 20, the third switch unit 50 is electrically connected to the earphone holder 10 and the control chip 20, and the fourth switch unit 60 is electrically connected to the earphone holder 10 and the control chip 20. The model of the control chip 20 is HI3751ARBCV5600N 0N. When the control chip 20 controls the first switch unit 30, the second switch unit 40, the third switch unit 50 and the fourth switch unit 60 to be switched on, the earphone holder 10 is suitable for a 3-segment earphone plug, when the control chip 20 controls the first switch unit 30 and the third switch unit 50 to be switched off and controls the second switch unit 40 and the fourth switch unit 60 to be switched on, the earphone holder 10 is suitable for a 4-segment OMTP standard earphone plug, and when the control chip 20 controls the first switch unit 30 and the third switch unit 50 to be switched on and controls the second switch unit 40 and the fourth switch unit 60 to be switched off, the earphone holder 10 is suitable for a 4-segment ctita standard earphone plug. Therefore, the utility model discloses can be under the prerequisite that does not increase earphone terminal quantity, the 3.5mm headphone plug of compatible different models can realize the compatibility to the headphone plug of different standards promptly to use and select for the user and brought the convenience, and reduced the hardware cost, strengthened the commonality of hardware.
Referring to fig. 4 and 5, in a further implementation of an embodiment, the earphone holder 10 is a 4-segment 3.5mm earphone holder. The earphone holder 10 comprises a first elastic sheet, a second elastic sheet, a third elastic sheet and a fourth elastic sheet, the first elastic sheet is connected with the No. 2 pin of the earphone holder 10, the second elastic sheet is connected with the No. 3 pin of the earphone holder 10, the third elastic sheet is connected with the No. 1 pin of the earphone holder 10, and the fourth elastic sheet is connected with the No. 4 pin of the earphone holder 10; wherein, the 5 th pin and the 2 nd pin of the earphone holder 10 are connected together.
In a further implementation manner of an embodiment, the first elastic sheet, the second elastic sheet, the third elastic sheet, and the fourth elastic sheet are respectively and correspondingly connected to a left channel, a right channel, a ground, and a microphone of the headset plug, or the first elastic sheet, the second elastic sheet, the third elastic sheet, and the fourth elastic sheet are respectively and correspondingly connected to a left channel, a right channel, a microphone, and a ground of the headset plug, or the first elastic sheet, the second elastic sheet, and the third elastic sheet are respectively and correspondingly connected to a left channel, a right channel, and a ground of the headset plug.
Referring to fig. 4 and 6, in a further implementation manner of an embodiment, the first switching unit 30 includes a first MOS transistor Q1, a gate of the first MOS transistor Q1 is connected to the 1 st pin (first switching pin) of the control chip 20, a source of the first MOS transistor Q1 is connected to the 1 st pin of the earphone holder 10, and a drain of the first MOS transistor Q1 is grounded. When the control chip 20 is set high on the first MOS transistor Q1, the first MOS transistor Q1 is turned on, and the 1 st pin of the earphone holder 10 is grounded.
Furthermore, the second switch unit 40 includes a second MOS transistor Q2, a gate of the second MOS transistor Q2 is connected to the 2 nd pin (second switch pin) of the control chip 20, a source of the second MOS transistor Q2 is connected to the 1 st pin of the earphone holder 10, and a drain of the second MOS transistor Q2 is connected to the microphone signal pin of the control chip 20. When the control chip 20 is set high the second MOS transistor Q2, the second MOS transistor Q2 is turned on, and the 1 st pin of the earphone holder 10 is connected to the 4 th pin (microphone signal pin) of the control chip 20.
Further, the third switching unit 50 includes a third MOS transistor Q3, a gate of the third MOS transistor Q3 is connected to the 1 st pin (the first switching pin) of the control chip 20, a source of the third MOS transistor Q3 is connected to the 4 th pin of the earphone holder 10, and a drain of the third MOS transistor Q3 is connected to the microphone signal pin of the control chip 20. When the control chip 20 is set high the third MOS transistor Q3, the third MOS transistor Q3 is turned on, and the 4 th pin of the earphone holder 10 is connected to the 4 th pin (microphone signal pin) of the control chip 20.
Furthermore, the fourth switching unit 60 includes a fourth MOS transistor Q4, a gate of the fourth MOS transistor Q4 is connected to the 2 nd pin (second switching pin) of the control chip 20, a source of the fourth MOS transistor Q4 is connected to the 4 th pin of the earphone holder 10, and a gate of the fourth MOS transistor Q4 is grounded. When the control chip 20 is set high the fourth MOS transistor Q4, the fourth MOS transistor Q4 is turned on, and the 4 th pin of the earphone holder 10 is grounded. It should be noted that the MOS transistor mentioned in the above embodiments is an N-type MOS transistor, and in some embodiments, a P-type MOS transistor may also be used.
In a further implementation manner of an embodiment, the 2 nd pin of the earphone holder 10 is connected to the left channel output signal pin of the control chip 20, the 3 rd pin of the earphone holder 10 and the right channel output signal pin of the control chip 20. That is, when the earphone plug is inserted into the earphone socket, the 5 th pin (left channel output signal pin) of the control chip 20 is connected to the 2 nd pin of the earphone holder 10, and the 6 th pin (right channel output signal pin) of the control chip 20 is connected to the 3 rd pin of the earphone holder 10.
In a further implementation manner of an embodiment, the interface circuit further includes a first resistor, and one end of the first resistor is connected to the 5 th pin of the earphone holder 10 and the control chip 20. Specifically, the first resistor is a pull-up resistor R1, and the pull-up resistor R1 is connected to the 2 nd pin (earphone detection pin) of the control chip 20 to detect whether an earphone plug is inserted into the earphone holder 10. When the earphone plug is inserted into the earphone holder 10, the earphone plug and the first elastic sheet of the earphone holder 10 are squeezed, so that the 5 th pin and the 2 nd pin of the earphone holder are disconnected, then the 2 nd pin (earphone detection pin) of the control chip 20 is pulled up by 3.3V voltage through the pull-up resistor R1, and accordingly, the jump from the low level to the high level is realized, so that software interruption is triggered, the equipment confirms that the earphone is inserted, and pops up an interface menu through a screen to prompt a user to select the earphone plug of the corresponding model.
In specific implementation, when it is detected that the headphone plug is inserted into the headphone jack 10 in the device, the 2 nd pin of the control chip 20 is pulled high by the pull-up resistor R1 to trigger an interrupt, and the user selects the headphone plug of the corresponding model. If the user selects the 3-segment earphone plug, the control chip 20 controls the 1 st pin and the 2 nd pin to be set at a high level, the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4 are turned on, the 1 st pin of the earphone holder 10 is grounded through the first MOS transistor Q1, the 4 th pin of the earphone holder 10 is grounded through the fourth MOS transistor Q4, meanwhile, the 2 nd pin of the earphone holder 10 is connected with the 5 th pin of the control chip 20, and the 3 rd pin of the earphone holder 10 is connected with the 6 th pin of the control chip 20, so as to meet the connection requirement of the 3-segment earphone plug.
When a user selects a 4-segment OMTP standard earphone plug, the control chip 20 controls the 1 st pin to be set at a low level and controls the 2 nd pin to be set at a high level, so that the first MOS tube Q1 and the third MOS tube Q3 are closed, and the second MOS tube Q2 and the fourth MOS tube Q4 are conducted, so that the 1 st pin of the earphone holder is connected with the 4 th pin of the control chip and disconnected with the 1 st pin of the control chip 20, the 4 th pin of the earphone holder 10 is disconnected with the 4 th pin of the control chip 20 and grounded through the fourth MOS tube Q4, meanwhile, the 2 nd pin of the earphone holder 10 is connected with the 5 th pin of the control chip 20, and the 3 rd pin of the earphone holder 10 is connected with the 6 th pin of the control chip 20, so as to meet the connection requirement of the 4-segment OMTP standard earphone plug.
When a user selects the 4-segment CTIA standard earphone plug, the control chip 20 controls the 1 st pin to be set at a high level and controls the 2 nd pin to be set at a low level, so that the first MOS tube Q1 and the third MOS tube Q3 are conducted, the second MOS tube Q2 and the fourth MOS tube Q4 are closed, the 1 st pin of the earphone holder 10 is disconnected with the 4 th pin of the control chip 20 and is grounded through the first MOS tube Q1, the 4 th pin of the earphone holder 10 is disconnected with the 3 rd pin of the control chip 20 and is connected with the 3 rd pin of the control chip 20 through the third MOS tube Q3, meanwhile, the 2 nd pin of the earphone holder 10 is connected with the 5 th pin of the control chip 20, and the 3 rd pin of the earphone holder 10 is connected with the 6 th pin of the control chip 20, so as to meet the connection requirement of the 4-segment CTIA standard earphone plug.
The present invention will be further explained by applying the above-mentioned earphone interface circuit to a television.
After the TV is powered on and started, software interruption is triggered by a detection pin of the earphone seat 10 to judge whether the earphone is inserted. And when the earphone is inserted, popping up an interface prompt box on a screen, and prompting a user to select the type of the earphone with the currently inserted plug. When a 3-segment earphone is selected, the control chip 20 controls the 1 st pin and the 2 nd pin to be set at high levels, the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4 are turned on, the 1 st pin of the earphone holder 10 is grounded through the first MOS transistor Q1, and the 4 th pin of the earphone holder 10 is grounded through the fourth MOS transistor Q4, so that the first segment (the third elastic piece) and the fourth segment (the fourth elastic piece) of the earphone holder 10 are grounded simultaneously. When the 4-segment OMTP standard earphone is selected, the control chip 20 controls the 1 st pin to set at a low level and controls the 2 nd pin to set at a high level, so that the first MOS transistor and the third MOS transistor are turned off, and the second MOS transistor and the fourth MOS transistor are turned on, so that the 1 st pin of the earphone holder is connected with the 4 th pin of the control chip and is disconnected from the 1 st pin of the control chip 20, while the 4 th pin of the earphone holder 10 is disconnected from the 4 th pin of the control chip 20 and is grounded through the fourth MOS transistor Q4, that is, the fourth segment (fourth elastic sheet) of the earphone holder 10 is grounded, and the pin of the first segment is connected with the microphone signal pin. When the 4-segment CTIA standard earphone is selected, the control chip 20 controls the 1 st pin to be set at a high level and controls the 2 nd pin to be set at a low level, so that the first MOS transistor Q1 and the third MOS transistor Q3 are turned on, the second MOS transistor Q2 and the fourth MOS transistor Q4 are turned off, the 1 st pin of the earphone holder 10 is disconnected from the 4 th pin of the control chip 20 and grounded through the first MOS transistor Q1, the 4 th pin of the earphone holder 10 is disconnected from the 3 rd pin of the control chip 20 and connected with the 3 rd pin of the control chip 20 through the third MOS transistor Q3, that is, the fourth segment (fourth elastic piece) of the earphone holder 10 is connected with the microphone signal pin, and the pin of the first segment (third elastic piece) is grounded.
According to the above application embodiment, the utility model discloses an use a 3.5mm earphone seat can realize 3 section formulas and 4 section formulas 3.5mm headphone plug's compatibility, through switching interface menu, open and close by control chip cooperation switch MOS pipe, realize different pin ground and microphone circuit's switching to reach the compatibility without the model plug, realize the purpose that corresponds the function.
The utility model also provides a display device, this display device can be that TV set, computer and cell-phone etc. have display device, this display device includes earphone interface circuit. The interface circuit comprises an earphone seat, a control chip, a first switch unit, a second switch unit, a third switch unit and a fourth switch unit; the first switch unit is electrically connected with the earphone seat and the control chip respectively; the second switch unit is electrically connected with the earphone seat and the control chip respectively; the third switch unit is electrically connected with the earphone seat and the control chip respectively; the fourth switch unit is electrically connected with the earphone seat and the control chip respectively. As described above, the details are not repeated herein.
To sum up, the utility model provides an earphone interface circuit and display device, interface circuit includes earphone seat, control chip, first switch unit, second switch unit, third switch unit and fourth switch unit; the first switch unit is electrically connected with the earphone seat and the control chip respectively; the second switch unit is electrically connected with the earphone seat and the control chip respectively; the third switch unit is electrically connected with the earphone seat and the control chip respectively; the fourth switch unit is electrically connected with the earphone seat and the control chip respectively. The utility model discloses a plurality of switch units are connected with the earphone seat, can realize the compatibility to the headphone plug of different standards, and it is convenient to use and select for the user.
It is to be understood that the invention is not limited to the above-described embodiments, and that modifications and variations may be made by those skilled in the art in light of the above teachings, and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.
Claims (9)
1. An earphone interface circuit is characterized by comprising an earphone seat, a control chip, a first switch unit, a second switch unit, a third switch unit and a fourth switch unit; the first switch unit is electrically connected with the earphone seat and the control chip respectively; the second switch unit is electrically connected with the earphone seat and the control chip respectively; the third switch unit is electrically connected with the earphone seat and the control chip respectively; the fourth switch unit is electrically connected with the earphone seat and the control chip respectively.
2. The earphone interface circuit according to claim 1, wherein the first switching unit comprises a first MOS transistor, a gate of the first MOS transistor is connected to a first switching pin of the control chip, a source of the first MOS transistor is connected to a 1 st pin of the earphone holder, and a drain of the first MOS transistor is grounded;
the second switch unit comprises a second MOS tube, the grid electrode of the second MOS tube is connected with a second switch pin of the control chip, the source electrode of the second MOS tube is connected with the 1 st pin of the earphone holder, and the drain electrode of the second MOS tube is connected with a microphone signal pin of the control chip;
the third switch unit comprises a third MOS tube, the grid electrode of the third MOS tube is connected with the first switch pin of the control chip, the source electrode of the third MOS tube is connected with the 4 th pin of the earphone holder, and the drain electrode of the third MOS tube is connected with the microphone signal pin of the control chip;
the fourth switch unit comprises a fourth MOS tube, the grid electrode of the fourth MOS tube is connected with the second switch pin of the control chip, the source electrode of the fourth MOS tube is connected with the 4 th pin of the earphone holder, and the grid electrode of the fourth MOS tube is grounded.
3. The headphone interface circuit according to claim 2, wherein pin 2 of the headphone jack is connected to a left channel output signal pin of the control chip; the 3 rd pin of the earphone seat and the right sound channel output signal pin of the control chip.
4. The headset interface circuit of claim 2, further comprising a first resistor, one end of the first resistor being connected to the control chip and the 5 th pin of the headset holder.
5. The headphone interface circuit as claimed in claim 4, wherein the first resistor is a pull-up resistor, and the pull-up resistor is connected to a headphone detection pin of the control chip for detecting whether a headphone plug is inserted into the headphone jack.
6. The headset interface circuit of claim 1, wherein the headset holder comprises a first resilient tab, a second resilient tab, a third resilient tab, and a fourth resilient tab, the first resilient tab is connected to pin 2 of the headset holder, the second resilient tab is connected to pin 3 of the headset holder, the third resilient tab is connected to pin 1 of the headset holder, and the fourth resilient tab is connected to pin 4 of the headset holder; wherein the 5 th pin and the 2 nd pin of the earphone holder are connected together.
7. The headset interface circuit of claim 6, wherein the first, second, third and fourth resilient tabs are respectively connected to the left channel, the right channel, the ground and the microphone of the headset plug, or the first, second, third and fourth resilient tabs are respectively connected to the left channel, the right channel, the microphone and the ground of the headset plug, or the first, second and third resilient tabs are respectively connected to the left channel, the right channel and the ground of the headset plug.
8. The interface circuit of claim 1, wherein the control chip is of type HI3751ARBCV5600N 0N.
9. A display device comprising the headphone interface circuit of any one of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020761551.0U CN211860503U (en) | 2020-05-09 | 2020-05-09 | Earphone interface circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020761551.0U CN211860503U (en) | 2020-05-09 | 2020-05-09 | Earphone interface circuit and display device |
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| Publication Number | Publication Date |
|---|---|
| CN211860503U true CN211860503U (en) | 2020-11-03 |
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|---|---|---|---|
| CN202020761551.0U Expired - Fee Related CN211860503U (en) | 2020-05-09 | 2020-05-09 | Earphone interface circuit and display device |
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| Country | Link |
|---|---|
| CN (1) | CN211860503U (en) |
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2020
- 2020-05-09 CN CN202020761551.0U patent/CN211860503U/en not_active Expired - Fee Related
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