CN2118313U - Same frequently asynchronous jamming pulse inhibition device - Google Patents
Same frequently asynchronous jamming pulse inhibition device Download PDFInfo
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- CN2118313U CN2118313U CN 91230127 CN91230127U CN2118313U CN 2118313 U CN2118313 U CN 2118313U CN 91230127 CN91230127 CN 91230127 CN 91230127 U CN91230127 U CN 91230127U CN 2118313 U CN2118313 U CN 2118313U
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Abstract
The utility model relates to a same frequency asynchronous jamming pulse inhibition device, which is composed of a delay unit and a circuit for selecting small values, wherein the circuit for selecting small values is composed of a comparator and a gating unit which can be controlled by output signals of the comparator after an output signal xk and a delay signal x<k-t> of a radar receiver are input into the comparator by two routes to make the gating unit output the smaller value of the signal xk and the signal x<k-t> all the time. The utility model effectively inhibits same frequency asynchronous jamming pulses in a meteorological radar or an airborne radar, and the signal loss is minimum simultaneously. The signal loss brought by adaptive processing method and inherent convergence procedure does not exist, and the utility model can be used by being simply inserted into the center of the radar receiver and a display without refitting the radar receiver or a transmitter.
Description
The utility model relates to a kind of signal processing apparatus, relates in particular to a kind of signal processing apparatus that suppresses with the frequency asynchronous interference pulse signals.
No matter military still at civil area, the purpose that all needs the multi-section radar to work simultaneously and accurately obtain target information to reach comprehensively sometimes is as weather radar or carry out airborne radar of aerial formation flight or the like.But when the multi-section radar is operated in same wave band even same channel, will disturb each other.Because this is a kind of Active Jamming, even thereby the space length between the radar much larger than the radar EFFECTIVE RANGE, enter receiver even interference wave is a secondary lobe from radar work antenna, its jamming power also is very big.This interference is owing to different being called as with the frequency asynchronous interference of pulse repetition rate of each radar.When being subjected to this interference, radar can on b display, form the radial interference decorative pattern of a kind of bending, serious monitoring and the tracking that hinders useful signal.Adopt to offset simply or processing mode such as linear filtering both all is difficult to reach this interference eliminated, and the purpose that keeps useful signal not sustain damage.
That. people such as prestige Zhuo once proposed respectively respectively to offset or adaptive beam forms and carries out the scheme that the space region grading mode disturbs this class weakening with adaptive noise in volume in " electrical equipment and Electronic Engineering Association " proceedings Dec the 63rd 1692 pages " adaptive noise offsets: principle and application " in 1975 and the paper of this proceedings September " antenna and radio wave propagation " the 224th volume in 1976 " certainly should a battle array special edition ", but because its processing means complexity, equipment is huge, and general weather radar or airborne radar are difficult to be suitable for.
The purpose of this utility model is to design a kind made from the frequency asynchronous interference and is effectively suppressed, and the minimum same frequency asynchronous interference pulse rejector of the loss of useful signal, and there is not the loss of signal that brings because of the intrinsic convergence process of self-adaptive processing mode in this rejector.
Invention main points of the present utility model are that it can be made of the delay cell and the circuit that gets the small value.Describe the present invention in detail below in conjunction with embodiment and accompanying drawing.
Figure 1 shows that the utility model schematic diagram.
Figure 2 shows that the circuit theory diagrams that get the small value.
Figure 3 shows that the get the small value enforcement figure of circuit of n position.
Figure 4 shows that the location drawing of the utility model in radar receiver.
If the output signal of radar receiver is XK，X
KCan postpone a radar pulse repetition period T in delayed unit (5), become inhibit signal XK－T。X
KAnd XK－TOutput signal Y can be added in simultaneously on the circuit that gets the small value (6) at moment KKWhen moment K, equal XKOr XK－TIn littler one; Work as XK＝X
K－T, Y thenKWherein any one of output. Concerning some radar system; If radar receiver itself can provide XK－TSignal, then delay cell can directly replace with radar receiver itself.
If the utility model adopts the Digital Signal Processing mode to realize, the circuit that then gets the small value can be made of comparator (7) and gate (8). XKAnd XK－TBehind the two paths of signals input comparator (7), A that can comparator (7)＜B end output signal is as the control signal of the gate (8) that is made up of controlled switch, when A＜when B end was exported high level, controlled switch K placed " 1 ", namely allows XKOutput; When A＜B end output low level, controlled switch K places " 0 " position, namely allows XK－TOutput.
Comparer (7) can be made of digital integrated circuit, and gate (8) can be made of some NAND gate circuit.If input end A, the B of comparer import n bit binary number signal respectively, as represent X
KA
0, a
1, a
2A
N-1, represent X
K-TThe b of signal
0, b
1, b
2B
N-1, the number that then constitutes the gate NAND gate circuit may be 3n+1.Represent X
KAnd X
K-TN position binary code digital signal when the A that sends into comparer (9) respectively, B input end, also send into two groups of NAND gate circuit respectively.Wherein, signal X
KWith the output signal acting in conjunction of the A＜B output terminal of comparer (9) after one group of n NAND gate circuit; Each NAND gate circuit can be exported binary digital signal C respectively
0, C
1, C
2C
N-1The A of comparer (9)＜B end output signal is after the phase inverter that a NAND gate circuit is formed is anti-phase, with signal X
K-TActing in conjunction is exported d respectively in n NAND gate circuit of another group
0, d
1, d
2D
N-1The output signal C of above-mentioned Sheffer stroke gate
iAnd d
i(i=0,1,2 ... n-1) can distinguish the 3rd group of n NAND gate circuit of common feed-in, this group NAND gate circuit is then exported n bit binary number signal e respectively
0, e
1, e
2E
N-1The Y of the last output of representative
KSignal.
In the embodiment that Fig. 3 provides, establish n=4, according to above-mentioned circuit structure, represent X
KInput signal be respectively a
0, a
1, a
2, a
3,, represent X
K-TInput signal be respectively b
0, b
1, b
2, b
3,, comparer can adopt integrated circuit four bit comparators, as 74L,S85 four bit comparators etc.X
KSignal and comparer A＜coefficient 4 NAND gate circuit of B end output signal are (11), (12), (13) and (14), can export C respectively
0, C
1, C
2, and C
3X
K-TSignal is then exported d with the A＜B end output signal acting in conjunction of comparer after phase inverter (10) is anti-phase in second group 4 NAND gate circuit (15), (16), (17) and (18)
0, d
1, d
2, and d
3c
iAdd d
iThe 3rd group 4 NAND gate circuit (19) are sent in (i=0,1,2,3) common feed-in, and (20), after (21) and (22), the Y of output
KSignal is e
0, e
1, e
2, e
3
Clearly, the foregoing description only shows four circuit that get the small value, but also can directly extend to 8,12,16 and even most significant digit, also can directly adopt some four bit comparator integrated circuit to form the multidigit comparer.The A/D transducer figure place of the figure place n value of circuit of getting the small value during with the radar video signal digitizing is relevant; It generally is that the consideration to dynamic range claims during by the work of concrete radar, and representative value is 8～16.For the logic function that guarantees that the utility model is realized, the Sheffer stroke gate integrated circuit should have enough little simple gate time delay.
Through existing field boundary experimental result, the utility model has not only effectively suppressed with the frequency asynchronous interference pulse, and the useful signal loss is minimum.It is simple to produce the utility model equipment needed thereby, Project Realization is easy, need not make change to existing radar transmitter and radar receiver, and only need to export directly insertion between the display to, can make with the frequency asynchronous interference to be effectively suppressed at the radar receiver video.
Claims (5)
1, a kind of with frequency asynchronous interference pulse rejector, comprise input signal X
KThe delay cell (5) that postpones a radar pulse repetition period, it is characterized in that also being included in constantly, K adds input signal X simultaneously
KAnd inhibit signal X
K-TAnd output X
KAnd X
K-TMiddle smaller's the electricity that gets the small value (6) road.
2, as claimed in claim 1 with frequency asynchronous interference pulse rejector, it is characterized in that the described circuit that gets the small value comprises having X
KAnd X
K-TThe comparer of two-way input signal (7) comprises that also A＜B end the output signal with comparer (7) is control signal and makes output terminal output X
KAnd X
K-TMiddle smaller's gate (8).
3, as claim 1 or the described frequency together of claim 2 asynchronous interference pulse rejector, it is characterized in that described comparer (7) is a digital integrated circuit, described gate (8) is made of some NAND gate circuit.
4, described with asynchronous interference pulse rejector frequently as claim 1 or claim 3, when the binary digital signal figure place that it is characterized in that the described circuit that gets the small value was n, the number of this NAND gate circuit was 3n+1.
5, as claimed in claim 3 with frequency asynchronous interference pulse rejector, it is characterized in that described digital integrated circuit comparer adopts four bit comparators.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 91230127 CN2118313U (en) | 1991-10-28 | 1991-10-28 | Same frequently asynchronous jamming pulse inhibition device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 91230127 CN2118313U (en) | 1991-10-28 | 1991-10-28 | Same frequently asynchronous jamming pulse inhibition device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2118313U true CN2118313U (en) | 1992-10-07 |
Family
ID=4935492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 91230127 Granted CN2118313U (en) | 1991-10-28 | 1991-10-28 | Same frequently asynchronous jamming pulse inhibition device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2118313U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1924608B (en) * | 2006-09-15 | 2010-04-21 | 中国舰船研究设计中心 | Radar antenna electromagnetic interference suppressor and shielding device |
| CN101839975A (en) * | 2010-04-21 | 2010-09-22 | 清华大学 | Anti-homotypic interference method for warning radars |
| CN101881822A (en) * | 2010-06-07 | 2010-11-10 | 电子科技大学 | Method for inhibiting same frequency interference of shared-spectrum radars |
| CN103076597A (en) * | 2012-12-28 | 2013-05-01 | 成都天奥信息科技有限公司 | Same-frequency interference inhibiting module and same-frequency interference inhibiting method based on statistical data detection |
| CN111480146A (en) * | 2017-12-14 | 2020-07-31 | 赛峰电子与防务公司 | Method for processing a signal comprising detection of disturbances caused by lightning strikes |
-
1991
- 1991-10-28 CN CN 91230127 patent/CN2118313U/en active Granted
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1924608B (en) * | 2006-09-15 | 2010-04-21 | 中国舰船研究设计中心 | Radar antenna electromagnetic interference suppressor and shielding device |
| CN101839975A (en) * | 2010-04-21 | 2010-09-22 | 清华大学 | Anti-homotypic interference method for warning radars |
| CN101839975B (en) * | 2010-04-21 | 2012-07-25 | 清华大学 | Anti-homotypic interference method for warning radars |
| CN101881822A (en) * | 2010-06-07 | 2010-11-10 | 电子科技大学 | Method for inhibiting same frequency interference of shared-spectrum radars |
| CN101881822B (en) * | 2010-06-07 | 2012-11-07 | 电子科技大学 | Method for inhibiting same frequency interference of shared-spectrum radars |
| CN103076597A (en) * | 2012-12-28 | 2013-05-01 | 成都天奥信息科技有限公司 | Same-frequency interference inhibiting module and same-frequency interference inhibiting method based on statistical data detection |
| CN111480146A (en) * | 2017-12-14 | 2020-07-31 | 赛峰电子与防务公司 | Method for processing a signal comprising detection of disturbances caused by lightning strikes |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |