CN211831031U - Network switching circuit - Google Patents

Network switching circuit Download PDF

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Publication number
CN211831031U
CN211831031U CN202020743303.3U CN202020743303U CN211831031U CN 211831031 U CN211831031 U CN 211831031U CN 202020743303 U CN202020743303 U CN 202020743303U CN 211831031 U CN211831031 U CN 211831031U
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pin
control circuit
power supply
network
module
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王东锋
邓惠华
阮水生
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Shenzhen Qianhai Zhongdian Huian Technology Co ltd
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Shenzhen Qianhai Zhongdian Huian Technology Co ltd
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Abstract

The embodiment of the utility model discloses network switching circuit, include: the single-network-interface chip, the signal indicating circuit, the first network connector and the second network connector are all connected with the control circuit, and the control circuit is used for connecting the single-network-interface chip with the first network connector or the second network connector according to the indicating signal output by the signal indicating circuit. The embodiment of the utility model provides a realize that single net gape chip carries out the switching of different networks, hardware equipment only needs a net twine can realize connecting the function of different networks, has reduced hardware equipment and has carried out the cost that the network switches, has improved the response speed that the network switches.

Description

Network switching circuit
Technical Field
The embodiment of the utility model provides a relate to network transmission technical field, especially relate to a network switching circuit.
Background
Ethernet (Ethernet) refers to the baseband lan specification created by Xerox corporation and jointly developed by Xerox, Intel and DEC corporation, and is the most common communication protocol standard used in local area networks today, and Ethernet is already an important transport means for communication between many hardware devices.
When the existing hardware equipment is networked, one network port is usually connected with one network correspondingly, if one equipment needs to be connected with a plurality of different networks, the equipment needs to be provided with a plurality of network ports, and when the network is switched, a network line currently connected by using the network port needs to be closed first, and then the network line connected by another network port needs to be switched. The multi-network-port chip not only has higher cost, but also occupies more software resources, and has slow response speed of network switching.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a network switching circuit to the switching that the realization used single net gape chip to carry out different networks reduces the cost that hardware equipment carries out the network switching, improves the response speed that the network switches.
An embodiment of the utility model provides a network switching circuit, include: the single-network-interface chip, the signal indicating circuit, the first network connector and the second network connector are all connected with the control circuit, and the control circuit is used for connecting the single-network-interface chip with the first network connector or the second network connector according to the indicating signal output by the signal indicating circuit.
Furthermore, the control circuit comprises a function control end, an input module, a first output module and a second output module, wherein the function control end is connected with the signal output end of the signal indicating circuit, the input module is connected with the single-network-port chip, the first output module is connected with a first network connector, and the second output module is connected with a second network connector;
when the signal output end of the signal indicating circuit outputs a high-level signal, the input module of the control circuit is connected with the first output module, so that the single-interface chip is connected to the first network connector;
when the signal output end of the signal indicating circuit outputs a low-level signal, the input module of the control circuit is connected with the second output module, so that the single-interface chip is connected to the second network connector.
Further, the signal indication circuit includes: power input end, resistance R1, resistance R2, field effect transistor and internal power supply, the grid and the drain electrode of field effect transistor are all connected power input end, the source electrode of field effect transistor with internal power supply connects, resistance R1's one end is connected power input end, resistance R1's the other end is connected ground connection behind the resistance R2, wherein, resistance R1 with resistance R2's public link is established to signal output part for output indicator.
Further, the signal indication circuit further comprises a diode, wherein the anode of the diode is connected with the grid electrode of the field effect transistor, the cathode of the diode is connected with the drain electrode of the field effect transistor, the drain electrode of the field effect transistor is set as a power output end, and the diode is used for preventing the power supply of the internal power supply from reversely flowing into the power input end.
Further, the power input terminal of the signal indicating circuit is connected in parallel with a ground capacitor C6 and a ground capacitor C7, and the internal power supply is connected in parallel with a ground capacitor C8 and a ground capacitor C9.
Furthermore, the power supply module is further included, a power supply input end of the power supply module is connected with a power supply output end of the signal indicating circuit so as to receive a first voltage input from the power supply output end, and the power supply module converts the first voltage into a second voltage and then supplies power to the single-network-port chip and the control circuit through a power supply output end.
Further, the input module of the control circuit comprises a pin A0, a pin A1, a pin A2, a pin A3, a pin A4, a pin A5, a pin A6 and a pin A7, the TRD1+ of the single-network-port chip is connected with the A0 of the control circuit, the TRD 1-of the single-network-port chip is connected with the A1 of the control circuit, the TRD2+ of the single-network-port chip is connected with the A2 of the control circuit, the TRD 2-of the single-network-port chip is connected with the A3 of the control circuit, the TRD3+ of the single-network-port chip is connected with the A4 of the control circuit, the TRD 3-of the single-network-port chip is connected with the A5 of the control circuit, the pin TRD4+ of the single-network-port chip is connected with the pin A6 of the control circuit, and the pin TRD 4-of the single-network-port chip is connected with the pin A7 of the control circuit.
Further, the first output module of the control circuit includes pin 0B2, pin 1B2, pin 2B2, pin 3B2, pin 4B2, pin 5B2, pin 6B2 and pin 7B2, pin 0B2 of the control circuit is connected to pin TRD1+ of the first network connector, pin 1B2 of the control circuit is connected to pin TRD1 of the first network connector, pin 2B2 of the control circuit is connected to pin TRD2+ of the first network connector, pin 3B2 of the control circuit is connected to pin TRD2 of the first network connector, pin 4B2 of the control circuit is connected to pin TRD3+ of the first network connector, pin 5B2 of the control circuit is connected to pin TRD3 of the first network connector, pin 6B2 of the control circuit is connected to pin TRD 53954 +/4 of the first network connector, and pin 3B 3626 of the control circuit is connected to pin TRD 3626 of the first network connector, pin 7B2 of the control circuit is connected to pin TRD 4-of the first network connector.
Further, the second output module of the control circuit includes pin 0B1, pin 1B1, pin 2B1, pin 3B1, pin 4B1, pin 5B1, pin 6B1, and pin 7B1, pin 0B1 of the control circuit is connected to pin TRD1+ of the second network connector, pin 1B1 of the control circuit is connected to pin TRD1 "of the second network connector, pin 2B1 of the control circuit is connected to pin TRD2+ of the second network connector, pin 3B1 of the control circuit is connected to pin TRD 2" of the second network connector, pin 4B1 of the control circuit is connected to pin TRD3+ of the second network connector, pin 5B1 of the control circuit is connected to pin TRD3 "of the second network connector, pin 6B1 of the control circuit is connected to pin TRD3+ of the second network connector, pin TRD4+, pin 7B1 of the control circuit is connected to pin TRD 4-of the second network connector.
Furthermore, the control circuit further comprises a power module and a grounding module;
the power supply module comprises a pin VDD0, a pin VDD1, a pin VDD2, a pin VDD3 and a pin VDD4, the pin VDD0 of the power supply module is connected with a power supply output end of the power supply module and a grounding capacitor C1, the pin VDD1 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C2, the pin VDD2 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C3, the pin VDD3 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C4, and the pin VDD4 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C5;
the grounding module comprises pins GND 0-GND 16, and the pins GND 0-GND 16 of the grounding module are grounded.
The embodiment of the utility model provides a pair of network switching circuit has realized that single net gape chip carries out the switching of different networks, and hardware equipment only needs a net twine can realize connecting the function of different networks, has reduced hardware equipment and has carried out the cost that the network switches, has improved the response speed that the network switches.
Drawings
Fig. 1 is a schematic structural diagram of a network switching circuit according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a network switching circuit according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of a network switching circuit according to a third embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a schematic structural diagram of a network switching circuit according to an embodiment of the present invention, which can perform network switching when the device is networked. As shown in fig. 1, a network switching circuit according to a first embodiment of the present invention includes: the single-network-interface chip 100 is connected with the control circuit 300, the signal indicating circuit 200 is connected with the control circuit 300, and the first network connector 400 and the second network connector 500 are both connected with the control circuit 300. The single-socket chip 100 refers to a chip having a socket, for example, an MCU (Micro Control Unit) having a socket, which can be disposed on a hardware device that needs to be networked, for example, a computer device, and a device on which the single-socket chip 100 is disposed is referred to as a master device. The control circuit 300 is a chip or a circuit that switches the connection between the input and the different outputs according to the control signal.
The indication signal output by the signal indication circuit 200 is used for network switching, and the control circuit 300 connects the single-port chip 100 to the first network connector 400 or the second network connector 500 according to the indication signal output by the signal indication circuit 200. When the single-portal chip 100 is connected to the first network connector 400, it means that the device in which the single-portal chip 100 is located is connected to the first network to which the first network connector 400 is connected; when the single socket chip 100 is connected to the second network connector 500, it means that the device in which the single socket chip 100 is located is connected to the second network to which the second network connector 500 is connected, thereby implementing the function of connecting the chip of one socket to different networks.
Optionally, the device in which the first network connector 400 is located and the main control device in which the single-port chip 100 is located are not the same hardware device, the device in which the second network connector 500 is located and the main control device in which the single-port chip 100 is located are also not the same hardware device, the device in which the first network connector 400 is located is referred to as a first hardware device, and the device in which the second network connector 500 is located is referred to as a second hardware device, so that the first hardware device and the second hardware device may be the same hardware device, or may be different hardware devices.
The embodiment of the utility model provides a pair of network switching circuit has realized that single net gape chip carries out the switching of different networks, and hardware equipment only needs a net twine can realize connecting the function of different networks, has reduced hardware equipment and has carried out the cost that the network switches, has improved the response speed that the network switches.
Example two
Fig. 2 is a schematic structural diagram of a network switching circuit according to a second embodiment of the present invention, which is further detailed in the present embodiment. As shown in fig. 2, a network switching circuit provided by the second embodiment of the present invention includes: the single-network-interface chip comprises a single-network-interface chip 100, a signal indicating circuit 200, a control circuit 300, a first network connector 400 and a second network connector 500, wherein the control circuit 300 comprises a function control end 310, an input module 320, a first output module 330 and a second output module 340, the function control end 310 is connected with a signal output end 210 of the signal indicating circuit 200, the input module 320 is connected with the single-network-interface chip 100, the first output module 330 is connected with the first network connector 400, and the second output module 340 is connected with the second network connector 500.
The signal indicating circuit 200 is connected to an external power source and receives power from the external power source. When the external power source normally supplies power to the signal indicating circuit 200, the signal output end 210 of the signal indicating circuit 200 outputs a high level signal, and at this time, the function control end 310 of the control circuit 300 receives the high level signal and connects the input module 320 with the first output module 330, so that the single socket chip 100 is connected to the first network connector 400, and the device where the single socket chip 100 is located is connected to the first network.
When the external power supply is abnormal, the signal output end of the signal indicating circuit outputs a high level signal, and at this time, the function control end 310 of the control circuit 300 receives a low level signal and connects the input module 320 with the second output module 340, so that the single-port chip 100 is connected to the second network connector 500, and the device where the single-port chip 100 is located is connected to the second network.
The embodiment of the utility model provides a two switching circuits of network have realized that single net gape chip carries out the switching of different networks, and hardware equipment only needs a net twine can realize connecting the function of different networks, has reduced hardware equipment and has carried out the cost that the network switches, has improved the response speed that the network switches.
EXAMPLE III
Fig. 3 is a schematic structural diagram of a network switching circuit according to a third embodiment of the present invention, which is further detailed in this embodiment. As shown in fig. 3, a network switching circuit provided by the third embodiment of the present invention includes: the single-interface chip 100, the signal indication circuit 200, the control circuit 300, the first network connector 400, the second network connector 500 and the power supply module 600.
The signal indication circuit 200 includes: signal output terminal 210, power input terminal 220, resistor R1, resistor R2, field effect transistor Q, diode D, internal power supply BAT, and power output terminal 230. The power input terminal 220 is connected to an external power source so that the signal indicating circuit 200 receives power supplied from the external power source, and in addition, a ground capacitor C6 and a ground capacitor C7 are connected in parallel to the power input terminal 220, which may play a role of filtering a voltage inputted to the power input terminal 220, so that the voltage inputted to the signal indicating circuit 200 is more stable. One end of the resistor R1 is connected to the power input terminal 220, and the other end of the resistor R1 is connected to the resistor R2 and then grounded. The grid G and the drain D of the field effect transistor Q are both connected with the power input end 220, the source S of the field effect transistor Q is connected with the internal power supply BAT, and the internal power supply E is connected with the ground capacitor C8 and the ground capacitor C9 in parallel. In addition, a diode D is further disposed between the gate G and the drain D of the fet Q, the anode of the diode D is connected to the gate G of the fet Q, the cathode of the diode D is connected to the drain D of the fet Q, and the diode D prevents the power supplied by the internal power source E from flowing backward into the power input terminal 220. The common connection end of the resistor R1 and the resistor R2 is set as a signal output end 210 for outputting the indication signal CHECK, and the drain D of the fet Q is set as a power output end 230.
The power supply module 600 includes a power supply input terminal 610 and a power supply output terminal 620, wherein the power supply input terminal 610 is connected to the power supply output terminal 230 of the signal indication circuit 200, and the power supply output terminal 620 is connected to the single-interface chip 100 and the control circuit 300.
The control circuit 300 includes: a function control end, an input module, a first output module, a second output module, a power supply module and a grounding module, the functional control terminal is a pin SEL, the input module is composed of a pin a0, a pin a1, a pin a2, a pin A3, a pin A4, a pin A5, a pin a6 and a pin a7 (abbreviated as pins a0 to a7), the first output module is composed of a pin 0B2, a pin 1B2, a pin 2B2, a pin 3B2, a pin 4B2, a pin 5B2, a pin 6B2 and a pin 7B2 (abbreviated as pins 0B2 to 7B2), the second output module is composed of a pin 0B1, a pin 1B1, a pin 2B1, a pin 3B1, a pin 4B1, a pin 5B1, a pin 6B1 and a pin 7B1 (abbreviated as pins 0B1 to 367B 1), and the power module is composed of a pin 1, a pin VDD, a pin 1, a pin VDD and a pin GND1 and a pin 1 (abbreviated as pin GND 1) and a GND1, and a ground module 1 and a pin 36. Preferably, the control circuit 300 is a TS3L301DGG chip.
In the control circuit 300, the pins VDD 0-VDD 4 of the power module are all connected with the power supply output terminal 620 of the power module 600, and each pin is connected with a ground capacitor in parallel, that is, the pin VDD0 is connected with the power supply output terminal 620 and the ground capacitor C1, the pin VDD1 is connected with the power supply output terminal 620 and the ground capacitor C2, the pin VDD2 is connected with the power supply output terminal 620 and the ground capacitor C3, the pin VDD3 is connected with the power supply output terminal 620 and the ground capacitor C4, and the pin VDD4 is connected with the power supply output terminal 620 and the ground capacitor C5. All pins GND 0-GND 16 of the grounding module are grounded. The input module is connected to the single-interface chip 100, the first output module is connected to the first network connector 400, and the second output module is connected to the second network connector 500.
The hardware interface (abbreviated as network port) or the network connector of the network usually has 8 pins (or called contacts), and each two pins are grouped into one group, one is positive and the other is negative, so that the single network port chip 100, the first network connector 400 and the second network connector 500 each include 4 groups of pins, and these 4 groups of pins are: TRD1+ and TRD1-, TRD2+ and TRD2-, TRD3+ and TRD3-, and TRD4+ and TRD 4-.
The input module is connected to the single-socket chip 100, that is, the TRD1+ of the single-socket chip 100 is connected to the pin a0 of the control circuit 300, the TRD 1-of the single-socket chip 100 is connected to the pin a1 of the control circuit 300, the TRD2+ of the single-socket chip 100 is connected to the pin a2 of the control circuit 300, the TRD 2-of the single-socket chip 100 is connected to the pin A3 of the control circuit 300, the TRD3+ of the single-socket chip 100 is connected to the pin a4 of the control circuit 300, the TRD 3-of the single-socket chip 100 is connected to the pin a5 of the control circuit 300, the TRD4+ of the single-socket chip 100 is connected to the pin A6 of the control circuit 300, and the TRD 4-of the single-socket chip 100 is connected to the pin a7 of the control circuit 300.
The first output module is connected to the first network connector 400, that is, pin 0B2 of the control circuit 300 is connected to pin TRD1+ of the first network connector 400, pin 1B2 of the control circuit 300 is connected to pin TRD1+ of the first network connector 400, pin 2B2 of the control circuit 300 is connected to pin TRD2+ of the first network connector 400, pin 3B2 of the control circuit 300 is connected to pin TRD2+ of the first network connector 400, pin 4B2 of the control circuit 300 is connected to pin TRD3+ of the first network connector 400, pin 5B2 of the control circuit 300 is connected to pin TRD3+ of the first network connector 400, pin 6B2 of the control circuit 300 is connected to pin TRD4+ of the first network connector 400, and pin 7B2 of the control circuit 300 is connected to pin TRD 4-of the first network connector 400.
The second output module is connected to the second network connector 500, that is, pin 0B1 of the control circuit 300 is connected to pin TRD1+ of the second network connector 500, pin 1B1 of the control circuit 300 is connected to pin TRD1+ of the second network connector 500, pin 2B1 of the control circuit 300 is connected to pin TRD2+ of the second network connector 500, pin 3B1 of the control circuit 300 is connected to pin TRD2+ of the second network connector 500, pin 4B1 of the control circuit 300 is connected to pin TRD3+ of the second network connector 500, pin 5B1 of the control circuit 300 is connected to pin TRD3+ of the second network connector 500, pin 6B1 of the control circuit 300 is connected to pin TRD4+ of the second network connector 500, and pin 7B1 of the control circuit 300 is connected to pin TRD 4-of the second network connector 500.
In this embodiment, the working principle of the network switching circuit is as follows:
when the external power supply normally supplies power to the signal indicating circuit 200, the power input end 220 of the signal indicating circuit 200 receives 12V direct current, and the output voltage of the internal power supply BAT is also 12V direct current, wherein the field effect transistor Q is a P-channel MOS transistor, at this time, the voltage between the gate and the source of the field effect transistor Q is 0V, the field effect transistor Q is in an off state and is not turned on, the diode D is turned on in the forward direction, the output voltage of the power output end 230 is 12V direct current received by the power input end 220, and the power supply input end 610 of the power supply module 600 receives 12V direct current output by the power output end 230 and converts the 12V direct current into 3.3V direct current to supply power to the single-port chip 100 and the control circuit 300. Meanwhile, the voltage of the signal output terminal 210 is the voltage of the resistor R2, which is the wind pressure of the voltage of the power input terminal 220 on the resistor R2, so that the indicating signal CHECK output by the signal output terminal 210 is at a high level, the functional control terminal of the control circuit 300 receives a high level signal, and the input module is connected to the first output module, that is, the pin a0 is connected to the pin 0B2, the pin a1 is connected to the pin 1B2, the pin a2 is connected to the pin 2B2, the pin A3 is connected to the pin 3B2, the pin a4 is connected to the pin 4B2, the pin a5 is connected to the pin 5B2, the pin A6 is connected to the pin 6B2, and the pin a7 is connected to the pin 7B2, so that the single-port chip 100 is connected to the first network connector 400.
When the external power supply is abnormal, it cannot supply power to the signal indicating circuit 200, at this time, the gate voltage of the field effect transistor Q is 0, the internal power supply BAT still supplies power normally, the output voltage of the field effect transistor Q is 12V direct current, at this time, the voltage between the gate and the source of the field effect transistor Q is-12V, the field effect transistor Q is in a conducting state, the diode D is turned off in the reverse direction, the output voltage of the power supply output terminal 230 is 12V direct current output by the internal power supply BAT, the power supply input terminal 610 of the power supply module 600 receives the 12V direct current output by the power supply output terminal 230, converts the 12V direct current into 3.3V direct current, and supplies power to the single-port chip 100 and the. Meanwhile, the voltage of the signal output end 210 is the voltage of the resistor R2, which is the wind pressure of the voltage of the power input end 220 on the resistor R2, since the voltage of the power input end 220 is 0, the indication signal CHECK output by the signal output end 210 is at a low level, the functional control end of the control circuit 300 receives a low level signal, and connects the input module with the second output module, that is, the pin a0 is connected with the pin 0B1, the pin a1 is connected with the pin 1B1, the pin a2 is connected with the pin 2B1, the pin A3 is connected with the pin 3B1, the pin a4 is connected with the pin 4B1, the pin a5 is connected with the pin 5B1, the pin A6 is connected with the pin 6B1, and the pin a7 is connected with the pin 7B1, so that the single-port chip 100 is connected with the second network connector 500.
The embodiment of the utility model provides a three switching circuit that provide has realized that single net gape chip carries out the switching of different networks, and hardware equipment only needs a net twine can realize connecting the function of different networks, has reduced hardware equipment and has carried out the cost that the network switches, has improved the response speed that the network switches.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.

Claims (10)

1. A network switching circuit, comprising: the single-network-interface chip, the signal indicating circuit, the first network connector and the second network connector are all connected with the control circuit, and the control circuit is used for connecting the single-network-interface chip with the first network connector or the second network connector according to the indicating signal output by the signal indicating circuit.
2. The circuit of claim 1, wherein the control circuit comprises a function control terminal, an input module, a first output module and a second output module, the function control terminal is connected to the signal output terminal of the signal indication circuit, the input module is connected to the single-port chip, the first output module is connected to a first network connector, and the second output module is connected to a second network connector;
when the signal output end of the signal indicating circuit outputs a high-level signal, the input module of the control circuit is connected with the first output module, so that the single-interface chip is connected to the first network connector;
when the signal output end of the signal indicating circuit outputs a low-level signal, the input module of the control circuit is connected with the second output module, so that the single-interface chip is connected to the second network connector.
3. The circuit of claim 2, wherein the signal indication circuit comprises: power input end, resistance R1, resistance R2, field effect transistor and internal power supply, the grid and the drain electrode of field effect transistor are all connected power input end, the source electrode of field effect transistor with internal power supply connects, resistance R1's one end is connected power input end, resistance R1's the other end is connected ground connection behind the resistance R2, wherein, resistance R1 with resistance R2's public link is established to signal output part for output indicator.
4. The circuit of claim 3, wherein the signal indicating circuit further comprises a diode, an anode of the diode is connected to a gate of the field effect transistor, a cathode of the diode is connected to a drain of the field effect transistor, the drain of the field effect transistor is provided as a power supply output terminal, and the diode is used for preventing the power supply of the internal power supply from flowing backward to the power supply input terminal.
5. The circuit of claim 3 wherein the power supply input of the signal indicating circuit is coupled in parallel with a capacitance of ground C6 and a capacitance of ground C7, and the internal power supply is coupled in parallel with a capacitance of ground C8 and a capacitance of ground C9.
6. The circuit of claim 4, further comprising a power supply module, wherein a power supply input terminal of the power supply module is connected to the power supply output terminal of the signal indication circuit to receive a first voltage input from the power supply output terminal, and the power supply module converts the first voltage into a second voltage and then supplies power to the single-port chip and the control circuit through the power supply output terminal.
7. The circuit of claim 6, wherein the input module of the control circuit comprises pin A0, pin A1, pin A2, pin A3, pin A4, pin A5, pin A6, and pin A7, the TRD1+ of the single-network-port chip is connected with the A0 of the control circuit, the TRD 1-of the single-network-port chip is connected with the A1 of the control circuit, the TRD2+ of the single-network-port chip is connected with the A2 of the control circuit, the TRD 2-of the single-network-port chip is connected with the A3 of the control circuit, the TRD3+ of the single-network-port chip is connected with the A4 of the control circuit, the TRD 3-of the single-network-port chip is connected with the A5 of the control circuit, the pin TRD4+ of the single-network-port chip is connected with the pin A6 of the control circuit, and the pin TRD 4-of the single-network-port chip is connected with the pin A7 of the control circuit.
8. The circuit of claim 6, wherein the first output module of the control circuit comprises pin 0B2, pin 1B2, pin 2B2, pin 3B2, pin 4B2, pin 5B2, pin 6B2, and pin 7B2, pin 0B2 of the control circuit connects pin TRD1+ of the first network connector, pin 1B2 of the control circuit connects pin TRD1 of the first network connector, pin 2B2 of the control circuit connects pin TRD2+ of the first network connector, pin 3B2 of the control circuit connects pin D2 of the first network connector, pin 4B2 of the control circuit connects pin TRD3+ of the first network connector, pin 5B2 of the control circuit connects pin TRD 5 + of the first network connector, pin 6B2 of the control circuit connects pin TRD 57324 + of the first network connector, pin 4 of the control circuit connects pin TRD 573 + of the first network connector, pin 7B2 of the control circuit is connected to pin TRD 4-of the first network connector.
9. The circuit of claim 6, wherein the second output module of the control circuit comprises pin 0B1, pin 1B1, pin 2B1, pin 3B1, pin 4B1, pin 5B1, pin 6B1, and pin 7B1, pin 0B1 of the control circuit connects pin TRD1+ of the second network connector, pin 1B1 of the control circuit connects pin TRD1 of the second network connector, pin 2B1 of the control circuit connects pin TRD2+ of the second network connector, pin 3B1 of the control circuit connects pin D2 of the second network connector, pin 4B1 of the control circuit connects pin TRD3+ of the second network connector, pin 5B1 of the control circuit connects pin TRD 5 + of the second network connector, pin 4+ of the control circuit connects pin TRD4+ of the second network connector, pin 4, 573, and TRD 9, pin 7B1 of the control circuit is connected to pin TRD 4-of the second network connector.
10. The circuit of claim 6, wherein the control circuit further comprises a power module and a ground module;
the power supply module comprises a pin VDD0, a pin VDD1, a pin VDD2, a pin VDD3 and a pin VDD4, the pin VDD0 of the power supply module is connected with a power supply output end of the power supply module and a grounding capacitor C1, the pin VDD1 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C2, the pin VDD2 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C3, the pin VDD3 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C4, and the pin VDD4 of the power supply module is connected with the power supply output end of the power supply module and the grounding capacitor C5;
the grounding module comprises pins GND 0-GND 16, and the pins GND 0-GND 16 of the grounding module are grounded.
CN202020743303.3U 2020-05-08 2020-05-08 Network switching circuit Active CN211831031U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114285885A (en) * 2021-12-22 2022-04-05 深圳微步信息股份有限公司 Control system based on intelligent cloud box

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114285885A (en) * 2021-12-22 2022-04-05 深圳微步信息股份有限公司 Control system based on intelligent cloud box
CN114285885B (en) * 2021-12-22 2024-04-23 深圳微步信息股份有限公司 Control system based on intelligent cloud box

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