CN211826531U - Anti-interference array antenna - Google Patents
Anti-interference array antenna Download PDFInfo
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- CN211826531U CN211826531U CN202020374266.3U CN202020374266U CN211826531U CN 211826531 U CN211826531 U CN 211826531U CN 202020374266 U CN202020374266 U CN 202020374266U CN 211826531 U CN211826531 U CN 211826531U
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Abstract
The utility model discloses an anti-interference array antenna, the direction signal of interference that microprocessor module detected according to the intensity signal of the interference that interference source intensity detection module detected and interference source direction detection module carries out analysis processes, reachs intensity signal value and the direction when the interference source is strongest, transmits feed amplitude phase controller. The utility model discloses interference source direction detection module drives antenna E1 and rotates a direction by the drive pulse drive stepper motor of singlechip IO mouth output, and trigger unijunction pipe T2 and switch on, thyristor VT1 switches on, the intensity signal that allows interference source intensity detection module to gather the interference source signal after the direction of rotation to get into the singlechip, and trigger unijunction pipe T1 and switch on, thyristor VT2 switches on, the drive pulse of allowing singlechip IO mouth output, with the interference source intensity signal of this institute's orientation of deriving, the inside strongest interference source intensity signal that reachs the orientation through the comparison of singlechip, the intensity that can guarantee the interference source and the degree of accuracy that the orientation was judged.
Description
Technical Field
The utility model relates to a satellite navigation antenna technical field, especially an anti-interference array antenna.
Background
The anti-interference array antenna is used for replacing an existing common satellite navigation antenna, so that a receiver can normally receive satellite navigation signals in a complex electromagnetic interference environment, particularly in a man-made interference environment, the anti-interference array antenna detects the strength and the direction of an interference source and feeds the strength and the direction information of the interference source back to a feed amplitude phase controller, the feed amplitude phase controller adjusts and processes the amplitude and the phase of signals received by each array of the antenna, the direction of an antenna beam is adjusted, the zero point of the antenna beam is finally aligned to the interference source, the function of spatial filtering is achieved, interference is inhibited or even eliminated, and the accuracy of judging the strength and the direction of the interference source is one of main technologies for determining the improvement of anti-interference performance of the anti-interference array antenna.
In the prior art, an electromagnetic interference detection antenna or an electromagnetic field sensor is usually adopted to judge the strength of a high-power interference source, but the strength of the interference source in the direction in which the high-power interference source is located can only be detected, the direction detection strength cannot be changed according to a complex interference source, and the value and the direction of a strength signal of the strongest interference source cannot be determined.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing an anti-interference array antenna, the intensity that can guarantee the interference source and the degree of accuracy that the direction was judged to prior art not enough.
The technical scheme for solving the problem is that the power feed amplitude phase controller comprises an interference source strength detection module, an interference source direction detection module, a micro-processing module and a feed amplitude phase controller, and is characterized in that the micro-processing module analyzes and processes the interference strength signal detected by the interference source strength detection module and the interference direction signal detected by the interference source direction detection module to obtain the strength signal value and the direction when the interference source is strongest, and transmits the strength signal value and the direction to the feed amplitude phase controller.
Preferably, the antenna comprises an antenna E1, a signal received by the antenna E1 is respectively connected to the upper end of a variable capacitor CP1 and one end of a primary coil of a high-frequency transformer B1 through a capacitor C1, the lower end of the variable capacitor CP1 is connected to the other end of the primary coil of a high-frequency transformer B1, one end of a secondary coil of the high-frequency transformer B1 is connected to the negative electrode of a diode D1, the positive electrode of a diode D1 is respectively connected to one end of a capacitor C2 and the anode of a thyristor VT1, the other end of the secondary coil of the high-frequency transformer B1 and the other end of a capacitor C2 are connected to ground, the cathode of a thyristor VT1 is connected to one end of a capacitor C3, the other end of a capacitor C3 is respectively connected to one end of a resistor R1, one end of a capacitor C4 and the anode of a diode D4, the other end of the capacitor C4 is respectively connected to one end of an inductor L4 and the anode of a diode D4, the other, the other end of the capacitor C6 is connected to one end of the resistor R5 and one end of the capacitor C8 respectively, the other end of the resistor R5 is connected to one end of the capacitor C9 and one end of the resistor R3 respectively, the other end of the capacitor C8 is connected to one end of the capacitor C10 and one end of the resistor R6 respectively, the other end of the resistor R3 is connected to one end of the capacitor C10 and a non-inverting input end of the operational amplifier AR1, an inverting input end of the operational amplifier AR1 is connected to one end of the ground resistor R4, a left end and an adjustable end of the potentiometer RP1 respectively, an output end of the operational amplifier AR1 is connected to a right end of the potentiometer RP1, the other end of the capacitor C9, the other end of the resistor R6, one end of the resistor R6 and one end of the resistor R6 respectively, an output end of the operational amplifier AR 6 is further connected to an I/O port of the single-chip microcomputer, the other end of the resistor R6 is connected to one end of the ground capacitor C36, the first base electrode of the unijunction transistor T1 is respectively connected with one end of a grounding resistor R9 and the control electrode of a thyristor VT2, the anode of the thyristor VT2 is connected with a power supply +5V through a resistor R10, and the cathode of the thyristor VT2 is connected with a PSEN port of the single chip microcomputer.
To sum up, the utility model discloses there is following advantage: the interference source direction detection module drives the stepping motor to drive the antenna E1 to rotate in one direction by the driving pulse output by the I/O port of the single chip microcomputer, triggers the unijunction tube T2 to be conducted and the thyristor VT1 to be conducted, allows the interference source strength detection module to collect the strength signal of the interference source signal in the rotating direction to enter the single chip microcomputer, triggers the unijunction tube T1 to be conducted and the thyristor VT2 to be conducted, and allows the driving pulse output by the I/O port of the single chip microcomputer to obtain the interference source strength signal in the direction in which the stepping motor drives the antenna E1 to rotate, and obtains the strongest interference source strength signal in the direction through comparison inside the single chip microcomputer, so that the strength and direction judgment accuracy of the interference source can be ensured.
Drawings
Fig. 1 upper portion is the utility model discloses an interference source intensity detection module schematic diagram, lower part are the utility model discloses an interference source direction detection module schematic diagram.
Detailed Description
The foregoing and other technical and scientific aspects, features and advantages of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying fig. 1. The structural contents mentioned in the following embodiments are all referred to the attached drawings of the specification.
A micro-processing module analyzes and processes an interference intensity signal detected by an interference source intensity detection module and an interference direction signal detected by an interference source direction detection module to obtain an intensity signal value and a direction when an interference source is strongest, the intensity signal value and the direction are transmitted to a feed amplitude phase controller, the amplitude and the phase of signals received by each array of the array antenna are automatically adjusted, the zero point of an antenna beam is aligned to the interference source, and interference is suppressed;
in the optimized embodiment of the present invention, the interference source intensity detection module is used to receive the detected interference source through an antenna E1 (it is stated that the antenna E1 does not refer to an array antenna), then couple the detected interference source to a variable capacitor CP1 through a capacitor C1, and form a fast selection loop with two ends of a primary coil of a high-frequency transformer B1 to select a high-frequency signal, output a frequency-reduced signal through a secondary coil of the high-frequency transformer B1, then detect the frequency-reduced signal through a diode D1, smooth filter the frequency-reduced signal through a capacitor C1, and when the thyristor VT1 is turned on (i.e. after the stepping motor drives the antenna to rotate in one direction), enter a pi-type diode attenuator composed of a capacitor C3-a capacitor C7, a resistor R1, a resistor R2, a PIN diode D2-D4, and an inductor L1 to attenuate the high-power interference source signal (since the interference source signal power is very large, the working voltage range of the back-stage circuit is 0-5, then, a satellite navigation frequency signal received by the array antenna is subjected to trap amplification through a double-T trap filter consisting of a resistor R3-a resistor R6, a capacitor C8-a capacitor C10, a potentiometer RP1 and an operational amplifier AR1, namely, signals except the satellite navigation frequency signal are amplified, so that the accuracy of the detected signal intensity of an interference source is further improved, one path of the signal intensity of the interference source enters an I/O port of a single chip microcomputer with the model number IT8751, the single chip microcomputer reads and stores the intensity signal of the interference source signal, wherein the single chip microcomputer with the model number IT8751 is a core element of a microprocessing module, the single chip microcomputer further comprises a clock circuit and a reset circuit of the minimum system of the single chip microcomputer, the other path of the trigger resistor R7-a resistor R9, the capacitor C11 and a unijunction tube T1 are conducted, so that a thyristor VT2 is triggered to be conducted, a +5V power supply is connected to a PSEN port of the single chip microcomputer, and, the single chip microcomputer is enabled to output driving pulses, a stepping motor in the interference source direction detection module executes one step, so that an antenna E1 is driven to rotate in one direction, a trigger resistor R14-a resistor R16, a capacitor C14 and a unijunction tube T2 are enabled to be conducted, a thyristor VT1 is triggered to be conducted, the interference source strength detection module acquires the strength signal of an interference source signal in the rotation direction again, the interference source strength detection module comprises an antenna E1, the signal received by the antenna E1 is connected to the upper end of a variable capacitor CP1D and one end of a primary coil of a high-frequency transformer B1 through a capacitor C1, the lower end of the variable capacitor CP1 is connected with the other end of the primary coil of the high-frequency transformer B1, one end of a secondary coil of the high-frequency transformer B1 is connected with the negative electrode of a diode D1, the positive electrode of a diode D1 is connected with one end of a capacitor C2 and the anode of a thyristor VT1, the cathode of the thyristor VT1 is connected to one end of a capacitor C3, the other end of the capacitor C3 is connected to one end of a resistor R1, one end of a capacitor C4, and the anode of a diode D2, the other end of the capacitor C4 is connected to one end of an inductor L1 and the anode of a diode D4, the other end of a resistor R1, the other end of an inductor L1, and one end of a capacitor C5 are all connected to +5V, the other end of the capacitor C5 is connected to ground, the other end of a capacitor C6 is connected to one end of a resistor R5 and one end of a capacitor C8, the other end of the resistor R8 is connected to one end of a capacitor C8 and one end of a resistor R8, the other end of the resistor R8 is connected to one end of a capacitor C8 and the non-inverting input end of an operational amplifier AR 8, the inverting input end of the operational amplifier AR 8 is connected to one end of a ground resistor R8, the left end of a potential adjuster R8 and the inverting input, the output end of the operational amplifier AR1 is respectively connected with the right end of the potentiometer RP1, the other end of the capacitor C9, the other end of the resistor R6, one end of the resistor R7 and one end of the resistor R8, the output end of the operational amplifier AR1 is also connected with an I/O port of the single chip microcomputer, the other end of the resistor R7 is respectively connected with one end of the grounding capacitor C11 and the emitter of the unijunction transistor T1, the other end of the resistor R8 is connected with the second base of the unijunction transistor T1, the first base of the unijunction transistor T1 is respectively connected with one end of the grounding resistor R9 and the control electrode of the thyristor VT2, the anode of the thyristor VT2 is connected with a power supply +5V through the resistor R10, and the cathode of the thyristor VT 2;
the utility model discloses an in the optimization embodiment, interference source direction detection module accepts the drive pulse of singlechip IO mouth output, the drive pulse number of singlechip record output simultaneously, it is 36 step motor (can be selected for 36 step motor, according to the on-the-spot needs), and then obtain the direction of array antenna, drive step motor all the way after later through optoelectronic coupler U1 isolation and triode Q1 improvement driving force, make step motor drive antenna E1 rotate a direction (specifically antenna E1 arranges in on the platform, the platform is driven by step motor, this is prior art, do not describe in detail here), add step motor by optoelectronic coupler U1 output signal, so have very strong noise interference suppression ability, play the strong electricity of isolation, can prevent the electromagnetic interference, triode Q1 mainly plays power amplification effect, and make trigger resistance R14-resistance R16, The interference suppression circuit comprises a resistor R11, one end of a resistor R11 is connected with a driving pulse output by an I/O port of the singlechip, the other end of the resistor R11 is respectively connected with one end of a grounding capacitor C12 and a pin 1 of a photoelectric coupler U1, a pin 2 of the photoelectric coupler U1 is connected with the ground, a pin 3 of the photoelectric coupler U1 is respectively connected with one end of a grounding resistor R12, and the other end of the grounding capacitor C12 and the pin 1 of the photoelectric coupler U1, The base of a triode Q1, the other end of a pin 4 of a photoelectric coupler U1 and the other end of a resistor R13 are both connected with a +5V power supply, the emitter of a triode Q1 is connected with the ground, the collector of a triode Q1 is respectively connected with one end of a resistor R13 and one end of a capacitor C13, the other end of a resistor R12 and the other end of a capacitor C13 are respectively connected with one end of a resistor R14 and one end of a resistor R15, the other end of a capacitor C13 is also connected with a stepping motor, the other end of a resistor R14 is respectively connected with one end of a grounded capacitor C14 and the emitter of a unijunction tube T2, the other end of a resistor R15 is connected with the second base of a unijunction tube T2, and the first base of a unijunction tube T2 is respectively connected with one end of.
When the utility model is used, the interference source to be detected is received by the antenna E1, a high-frequency signal is selected by the quick selection loop, then after detection and smooth filtering, the signal enters the pi-type diode attenuator to attenuate a high-power interference source signal when the thyristor VT1 is conducted, then the satellite navigation frequency signal received by the array antenna is trapped and amplified by the double-T trap filter, so as to further improve the accuracy of the detected interference source signal intensity, the interference source signal intensity enters the I/O port of the single chip microcomputer with the model IT8751 all the way, the intensity signal of the interference source signal is read in and stored by the single chip microcomputer, the delay trigger circuit composed of another trigger resistor R7-resistor R9, a capacitor C11 and a single junction tube T1 is conducted, and then the thyristor VT2 is triggered to conduct, the +5V power supply is connected to the PSEN port of the single chip microcomputer, so that the single chip microcomputer outputs a drive pulse, and the drive pulse number output is recorded, the step number of the stepping motor is obtained, the direction of the array antenna is obtained, the driving capability is improved through a photoelectric coupler U1 and a triode Q1, then the stepping motor is driven all the way, the stepping motor drives the antenna E1 to rotate in one direction, a time delay trigger circuit consisting of a trigger resistor R14, a resistor R16, a capacitor C14 and a unijunction tube T2 is conducted, a thyristor VT1 is triggered to be conducted, so that an interference source strength signal in the direction in which the stepping motor drives the antenna E1 to rotate is obtained, the strongest interference source strength signal in the direction is obtained through comparison in the single chip microcomputer and is transmitted to a feed amplitude phase controller, the amplitude and the phase of the signal received by each array of the array antenna are automatically adjusted, the zero point of the antenna is aligned with an interference source, and the purpose of interference suppression is achieved.
Claims (4)
1. An anti-interference array antenna comprises an interference source strength detection module, an interference source direction detection module, a micro-processing module and a feed amplitude phase controller, and is characterized in that the micro-processing module analyzes and processes an interference strength signal detected by the interference source strength detection module and an interference direction signal detected by the interference source direction detection module to obtain a strength signal value and a direction when an interference source is strongest, and transmits the strength signal value and the direction to the feed amplitude phase controller.
2. The anti-interference array antenna according to claim 1, wherein the interference source strength detection module comprises an antenna E1, signals received by the antenna E1 are respectively connected to the upper end of a variable capacitor CP1 and one end of a primary coil of a high-frequency transformer B1 through a capacitor C1, the lower end of the variable capacitor CP1 is connected to the other end of the primary coil of the high-frequency transformer B1, one end of a secondary coil of a high-frequency transformer B1 is connected to the negative electrode of a diode D1, the positive electrode of a diode D1 is respectively connected to one end of the capacitor C2 and the anode of a thyristor VT1, the other end of the secondary coil of the high-frequency transformer B1 and the other end of the capacitor C2 are connected to ground, the cathode of the thyristor VT1 is connected to one end of a capacitor C3, the other end of the capacitor C3 is respectively connected to one end of a resistor R1, one end of a capacitor C4 and the positive electrode of a diode D2, the other, the other end of the resistor R1, the other end of the inductor L1 and one end of the capacitor C5 are all connected with +5V, the other end of the capacitor C5 is connected with ground, the other end of the capacitor C6 is respectively connected with one end of the resistor R5 and one end of the capacitor C8, the other end of the resistor R5 is respectively connected with one end of the capacitor C9 and one end of the resistor R3, the other end of the capacitor C8 is respectively connected with one end of the capacitor C10 and one end of the resistor R6, the other end of the resistor R3 is respectively connected with one end of the capacitor C10 and the non-inverting input end of the operational amplifier AR1, the inverting input end of the operational amplifier AR1 is respectively connected with one end of the grounding resistor R4, the left end of the potentiometer RP1 and the adjustable end, the output end of the operational amplifier AR1 is respectively connected with the right end of the potentiometer RP1, the other end of the capacitor C9, the other end of the resistor R9, the other end of the resistor, the other end of the resistor R7 is respectively connected with one end of a grounding capacitor C11 and an emitter of a unijunction tube T1, the other end of the resistor R8 is connected with a second base electrode of the unijunction tube T1, a first base electrode of the unijunction tube T1 is respectively connected with one end of a grounding resistor R9 and a control electrode of a thyristor VT2, the anode of the thyristor VT2 is connected with a power supply +5V through a resistor R10, and the cathode of the thyristor VT2 is connected with a PSEN port of the single chip microcomputer.
3. The anti-interference array antenna of claim 1, wherein the interference source direction detection module comprises a resistor R11, one end of the resistor R11 is connected to a driving pulse output from an I/O port of the single chip microcomputer, the other end of the resistor R11 is connected to one end of a ground capacitor C12 and a pin 1 of a photocoupler U1, a pin 2 of a photocoupler U1 is connected to ground, a pin 3 of a photocoupler U1 is connected to one end of a ground resistor R12 and a base of a triode Q1, the pin 4 of the photocoupler U1 and the other end of the resistor R13 are both connected to +5V, an emitter of the triode Q1 is connected to ground, a collector of the triode Q1 is connected to one end of a resistor R13 and one end of a capacitor C13, the other end of the resistor R12 and the other end of a capacitor C13 are connected to one end of a resistor R14 and one end of a resistor R15, and the other end of a capacitor C13 is further connected, the other end of the resistor R14 is connected with one end of a grounding capacitor C14 and an emitter of the unijunction transistor T2, the other end of the resistor R15 is connected with a second base electrode of the unijunction transistor T2, and a first base electrode of the unijunction transistor T2 is connected with one end of a grounding resistor R16 and a control electrode of the thyristor VT 1.
4. The array antenna of claim 1, wherein the microprocessor is core with an IT8751 single chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020374266.3U CN211826531U (en) | 2020-03-23 | 2020-03-23 | Anti-interference array antenna |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020374266.3U CN211826531U (en) | 2020-03-23 | 2020-03-23 | Anti-interference array antenna |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211826531U true CN211826531U (en) | 2020-10-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020374266.3U Expired - Fee Related CN211826531U (en) | 2020-03-23 | 2020-03-23 | Anti-interference array antenna |
Country Status (1)
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|---|---|
| CN (1) | CN211826531U (en) |
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2020
- 2020-03-23 CN CN202020374266.3U patent/CN211826531U/en not_active Expired - Fee Related
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Granted publication date: 20201030 Termination date: 20210323 |