CN211785832U

CN211785832U - Anti-interference module automatic test system

Info

Publication number: CN211785832U
Application number: CN201922118060.4U
Authority: CN
Inventors: 阴晨曦; 陈家乐
Original assignee: Jiangsu State Grid Automation Technology Co ltd
Current assignee: Jiangsu State Grid Automation Technology Co ltd
Priority date: 2019-12-02
Filing date: 2019-12-02
Publication date: 2020-10-27
Anticipated expiration: 2029-12-02

Abstract

The utility model discloses an automatic testing system of an anti-interference module, which comprises an upper computer, a control communication module, a collector, a pressure regulating unit, the anti-interference module to be tested, a contactor coil connected with the anti-interference module, and a collector electrically connected with the contactor coil; the control communication module comprises an STM32 single chip microcomputer, an 8 serial port expansion chip CH438Q and an FPGA chip; the voltage regulating unit comprises at least two voltage regulators, the FPGA chip controls one of the two voltage regulators to be output to the anti-interference module through an optical coupling isolation and a solid state relay, and the control communication module is in communication connection with the upper computer, the collector, the voltage regulating unit and the anti-interference module. The utility model discloses the reality of laminating more shakes the electricity situation, but 16 platforms of concurrent test shake the electricity module, and the arithmetic efficiency is high and the precision is high.

Description

Anti-interference module automatic test system

[ technical field ] A method for producing a semiconductor device

The utility model belongs to the technical field of prevent shaking electric test, especially relate to an automatic test system of anti-electricity module that shakes.

[ background of the invention ]

At present, a large number of control elements such as an alternating current contactor are used in an industrial control loop, and when a power supply fluctuates, the alternating current contactor is tripped, so that the normal operation of the control loop is influenced. Therefore, the power control device needs to have an additional anti-interference function. The product with the electric shock prevention function can be delivered to a client for use after being tested to be qualified after being manufactured.

The main device power module that goes on of preventing shaking electric test of electrical product commonly used on the market at present, along with the development of technique, the diversity requirement of product also becomes indispensable characteristics, can increase in more and more electrical equipment and prevent shaking electric function in more functional module, like power module, CPU control module, IO module and data acquisition module etc. consequently, current prevent shaking electric test device is difficult to satisfy the test demand, and efficiency is very low.

Therefore, it is desirable to provide a new anti-interference module automated test system to solve the above problems.

[ Utility model ] content

The utility model discloses a main aim at provides an automatic test system of anti-electricity of shaking module, the reality of laminating more shakes the electricity situation, but 16 platforms of concurrent test shake the electricity module, and the computational efficiency is high and the precision is high.

The utility model discloses a following technical scheme realizes above-mentioned purpose: an automatic testing system of an anti-interference electric module comprises an upper computer, a control communication module, a collector, a pressure regulating unit, the anti-interference electric module to be tested, a contactor coil connected with the anti-interference electric module and a collector electrically connected with the contactor coil; the control communication module comprises an STM32 single chip microcomputer, an 8 serial port expansion chip CH438Q and an FPGA chip; the voltage regulating unit comprises at least two voltage regulators, the FPGA chip controls one of the two voltage regulators to be output to the anti-interference module through an optical coupling isolation and a solid state relay, and the control communication module is in communication connection with the upper computer, the collector, the voltage regulating unit and the anti-interference module.

Further the pressure regulating unit includes pressure regulating controller A, pressure regulating controller B, pressure regulating controller A control voltage regulator A output standard 220V pressure, pressure regulating controller B control voltage regulator B output 150 ~ 170V's voltage.

The solid-state relay is controlled by the FPGA chip and comprises a first relay J1 arranged on the connection line of the anti-interference module and output from the voltage regulator A, and a second relay J2 arranged on the connection line of the anti-interference module and output from the voltage regulator B.

Further, a CPLD logic device which controls the closing of only one of the first relay J1 and the second relay J2 is arranged in the FPGA chip.

The control communication module further adjusts parameters required to be adjusted by the anti-interference module based on a MODBUS-RTU communication protocol through the 8 serial port expansion chip CH438Q expansion 8-way 485 communication and the anti-interference module.

Further, an ADC metering chip ATT7022B with 16-bit high precision is configured in the collector, the collector collects current generated when the contactor coil runs in an alternating current mode through a current transformer, the current is sent to the ADC metering chip ATT7022B, the current is calculated and then sent back to the STM32 single chip microcomputer, and then current parameters of the corresponding anti-interference module are adjusted according to the current value serving as a reference.

Further the control communication module also comprises an operation interface electrically connected with the STM32 singlechip.

Compared with the prior art, the utility model relates to an anti-interference module automatic test system's beneficial effect lies in: two paths of voltage regulating modules are arranged on the electric loop part, one path is regulated to be standard 220V, the other path is regulated to be below 80% of 220V, generally between 150V and 170V, and the simulated power-off part falls to be below 80% from 220V and is more fit for real power-off; the parameter adjusting part adopts two 8-path serial port expansion chips which can be simultaneously connected with 16 anti-interference electric modules for adjustment, and the communication address of each module is not required to be modified, so that the process is simplified; the current collection part adopts a 16-bit high-precision ADC metering chip ATT7022B to collect the corresponding current, and the current collection part is more precise.

[ description of the drawings ]

Fig. 1 is a schematic structural diagram of a frame principle according to an embodiment of the present invention.

[ detailed description ] embodiments

Example (b):

referring to fig. 1, the present embodiment is an automatic testing system for an anti-interference electricity module, which includes an upper computer, a control communication module, a collector, a voltage regulating unit, an anti-interference electricity module to be tested, a contactor coil connected to the anti-interference electricity module, and a collector electrically connected to the contactor coil, where the control communication module includes an STM32 single chip microcomputer, an 8-serial port expansion chip CH438Q, and an FPGA chip. The voltage regulating unit comprises at least two voltage regulators, one path of target voltage is controlled by an optical coupling isolation and a solid-state relay to be output to the anti-interference module, and the control communication module is responsible for communication and control with the upper computer, the collector, the voltage regulating unit and the anti-interference module.

The pressure regulating unit comprises a pressure regulating controller A and a pressure regulating controller B, wherein the pressure regulating controller A controls the 220V pressure of the output standard of the pressure regulator A, and the pressure regulating controller B controls the pressure regulator B to regulate the output voltage to below 80% of 220V, specifically 150-170V. The two voltage regulators are controlled by the voltage regulating unit to reach the target voltage.

The solid-state relay is controlled by the FPGA chip and comprises a first relay J1 arranged on a voltage regulator A and output to the anti-interference module connecting circuit and a second relay J2 arranged on a voltage regulator B and output to the anti-interference module connecting circuit. And a CPLD logic device for controlling only one of the first relay J1 and the second relay J2 to be closed is arranged in the FPGA chip, so that short circuit is prevented, and the voltage of all circuits in the case of overcurrent fault is ensured.

The control communication module is used for adjusting parameters required to be adjusted through 8 serial port expansion chips CH438Q expansion 8-path 485 communication and the anti-interference module based on an MODBUS-RTU communication protocol. The parameters to be adjusted include voltage of the anti-interference module, current collection coefficient, contactor resistance used in external tests, initial time of the anti-interference module clock, model selection of the anti-interference module, and power-off working time of the anti-interference module. The chip CH438Q specifically communicates with the network port 485 communication module in the anti-interference module. The net mouth 485 module is an essential module of the anti-interference module, and is used for connecting a working panel of an external control anti-interference module, and an operator can manually test the anti-interference module or control the anti-interference module and check various switching values and acquisition data of the anti-interference module by using the working panel. The data of CH438Q is directly written into the chip memory of the anti-interference module by communicating with the internet access 485 communication module.

The collector is provided with an ADC metering chip ATT7022B with 16-bit high precision, the collector collects current generated when a contactor coil runs in an alternating current mode through a current transformer, the current is sent to the ADC metering chip ATT7022B to be calculated and then is sent back to an STM32 single chip microcomputer, and then current parameters of the corresponding anti-interference module are adjusted according to the current value serving as a reference. The ATT7022B calculates a corresponding unprocessed 24-bit length measurement value according to the magnitude of the access current after calibration by a calibration table (the value is that the chip does not need other participation in automatic calculation), the STM32 single chip microcomputer reads the 24-bit value, the value is divided by 8192.0 to obtain a corresponding value, and the specific current value can be calculated by multiplying the corresponding value by the transformation ratio of the transformer.

The control communication module also comprises an operation interface electrically connected with the STM32 singlechip.

The control communication module is communicated with the voltage regulation controller A and the voltage regulation controller B to adjust the corresponding voltage regulators to reach target voltages, reads each path of current calculated by the ADC metering chip ATT7022B, and adjusts parameters required by all connected anti-interference modules one by one through communication; the communication can also detect whether the anti-interference electricity module gives an alarm by mistake, if so, the replacement of one anti-interference electricity module is suspended, after the replacement is finished, only the detection is needed to be carried out on the anti-interference electricity module, then, the communication reads the states of all the anti-interference electricity modules, when all the anti-interference electricity modules are in the interference electricity state, an interference electricity control loop part controlled by an FPGA chip controls a first relay J1 and a second relay J2 to be alternately disconnected and closed, interference electricity is output in a simulation mode, after the interference electricity, the communication is continuously read for the states of the anti-interference electricity modules, when all the anti-interference electricity modules are in the interference electricity state, the interference electricity is continuously carried out (the interference electricity times can be set by an operation interface), after the required interference electricity is completed, the communication detection is wrong, if so, the anti-interference electricity module is removed for subsequent maintenance, and finally, after; and after the detection, the voltage and current values or the fault information of each anti-interference device are uploaded to an upper computer for generating a quality inspection report and counting the fault information of the detection device.

In the automatic test system of the anti-interference electric module, two paths of voltage regulating modules are arranged on an electric loop part, one path is regulated to be standard 220V, the other path is regulated to be below 80% of 220V, generally 150V-170V, and a simulated interference electric part falls to be below 80% of 220V and is more fit for actual interference; the parameter adjusting part adopts two 8-path serial port expansion chips which can be simultaneously connected with 16 anti-interference electric modules for adjustment, and the communication address of each module is not required to be modified, so that the process is simplified; the current collection part adopts a 16-bit high-precision ADC metering chip ATT7022B to collect the corresponding current, and the current collection part is more precise.

What has been described above are only some embodiments of the invention. For those skilled in the art, without departing from the inventive concept, several modifications and improvements can be made, which are within the scope of the invention.

Claims

1. An automatic test system of an anti-interference electric module is characterized in that: the device comprises an upper computer, a control communication module, a collector, a voltage regulating unit, an anti-interference electricity module to be tested, a contactor coil connected with the anti-interference electricity module, and a collector electrically connected with the contactor coil; the control communication module comprises an STM32 single chip microcomputer, an 8 serial port expansion chip CH438Q and an FPGA chip; the voltage regulating unit comprises at least two voltage regulators, the FPGA chip controls one of the two voltage regulators to be output to the anti-interference module through an optical coupling isolation and a solid state relay, and the control communication module is in communication connection with the upper computer, the collector, the voltage regulating unit and the anti-interference module.

2. The anti-glare module automated test system of claim 1, wherein: the pressure regulating unit comprises a pressure regulating controller A and a pressure regulating controller B, wherein the pressure regulating controller A controls the pressure regulator A to output standard 220V pressure, and the pressure regulating controller B controls the pressure regulator B to output 150-170V voltage.

3. The anti-glare module automated test system of claim 2, wherein: the solid-state relay is controlled by the FPGA chip and comprises a first relay J1 arranged on the connection line of the anti-interference module and output from the voltage regulator A, and a second relay J2 arranged on the connection line of the anti-interference module and output from the voltage regulator B.

4. The anti-glare module automated test system of claim 3, wherein: and a CPLD logic device which controls the closing of only one of the first relay J1 and the second relay J2 is arranged in the FPGA chip.

5. The anti-glare module automated test system of claim 1, wherein: the control communication module adjusts parameters required to be adjusted by the anti-interference module based on a MODBUS-RTU communication protocol through 8 serial port expansion chips CH438Q expansion 8-way 485 communication and the anti-interference module.

6. The anti-glare module automated test system of claim 5, wherein: an ADC metering chip ATT7022B with 16-bit high precision is arranged in the collector, the collector collects current generated when the contactor coil runs in an alternating current mode through a current transformer, the current is sent to the ADC metering chip ATT7022B to be calculated and then is sent back to the STM32 single chip microcomputer, and then current parameters of the corresponding anti-interference electric module are adjusted according to the current value serving as a reference.

7. The anti-glare module automated test system of claim 1, wherein: the control communication module further comprises an operation interface electrically connected with the STM32 singlechip.