CN211744379U - Back electromotive force detection circuit of brushless direct current motor and range hood applying same - Google Patents
Back electromotive force detection circuit of brushless direct current motor and range hood applying same Download PDFInfo
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- CN211744379U CN211744379U CN202020335905.5U CN202020335905U CN211744379U CN 211744379 U CN211744379 U CN 211744379U CN 202020335905 U CN202020335905 U CN 202020335905U CN 211744379 U CN211744379 U CN 211744379U
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Abstract
The utility model discloses a brushless DC motor's counter electromotive force detection circuitry and use its range hood, wherein, brushless DC motor's counter electromotive force detection circuitry, including input comparison module, conversion module and latch output module, the input comparison module carries out the comparison to busbar voltage and counter electromotive force to carry the comparison result to latching output module, latch output module latches the comparison result and final output of input comparison module after receiving the trigger signal of conversion module. The back electromotive force detection circuit of the brushless DC motor of the utility model replaces the software algorithm with the hardware circuit detection method, releases the internal resources of the MCU processor, provides the MCU space resources for other function expansion besides the motor control, and reduces the cost; meanwhile, the hardware processing speed is higher than that of software processing, a zero-crossing detection result is directly output by hardware without a software algorithm, the complexity of software design is greatly simplified, and the processing real-time performance is improved.
Description
Technical Field
The utility model belongs to the technical field of brushless DC motor, concretely relates to brushless DC motor's back electromotive force detection circuitry and use its range hood.
Background
At present, brushless direct current motors are widely applied to range hood products, and in order to reduce the manufacturing cost of the motors and improve the reliability, brushless direct current motors without hall sensors are gradually becoming a trend. The absence of hall sensors inside the motor means that very precise timing control needs to be additionally performed on the motor commutation time on the motor control software, which undoubtedly increases the burden of the MCU processor.
In the electric control software, the method generally comprises the following steps of carrying out zero-crossing comparison by sampling bus voltage Vbus and back electromotive force Vemf, when Vemf is detected to be larger than or equal to 1/2Vbus or smaller than or equal to 1/2Vbus, indicating that a zero-crossing event occurs, and calculating phase change time according to the time, wherein the method puts higher requirements on an MCU (microprogrammed control Unit) processor: 1. the AD sampling precision is high, so that Vbus and Vemf values can be accurately obtained to obtain a correct zero-crossing detection result; 2. the MCU processor has high main frequency, so that each sampling value can not be lost during the rotation of the motor, and other functions can be realized at the same time, which is particularly obvious in the application of high-rotating-speed motors. Obviously, on multi-functional smoke ventilator, consume MCU treater resource excessively in the aspect of motor control function, must lead to reserving for the too little and unable realization of resource of other functions, perhaps influence the follow-up function extension of product, if choose for use MCU treater that internal resources are abundanter then can cause the cost too high.
SUMMERY OF THE UTILITY MODEL
In order to solve the problem, the utility model provides a brushless DC motor's back electromotive force detection circuitry to hardware circuit detection method replaces the software algorithm, releases MCU treater internal resources, provides MCU space resource for other function extensions beyond the motor control.
Another object of the present invention is to provide a range hood.
The utility model adopts the technical proposal that:
the input comparison module compares bus voltage and back electromotive force and transmits a comparison result to the latch output module, and the latch output module latches the comparison result of the input comparison module and finally outputs the comparison result after receiving a trigger signal of the conversion module.
Preferably, the input comparison module includes an input source bus voltage Vbus, a back electromotive force Vemf and a comparator U1, the bus voltage Vbus is connected in series with a resistor R1 and then connected in parallel with one end of a resistor R2, a capacitor C2 and one end of a resistor R3, the other end of the resistor R3 is connected in parallel with a resistor R4 and then connected to a pin 9 of the comparator U1, and the other ends of the resistor R2, the capacitor C2 and the resistor R4 are all connected in parallel to the ground; one end of the counter electromotive force Vemf series resistor R5, the parallel resistor R6 and the capacitor C1 is connected to a pin 10 of a comparator U1, and the other ends of the resistor R6 and the capacitor C1 are grounded in parallel; the pin 4 of the comparator U1 is connected with a power supply, the pin 11 of the comparator U1 is grounded, and the pin 8 of the comparator U1 outputs a comparison result.
Preferably, the voltage division coefficients of the resistor R1 and the resistor R2 are the same as those of the resistor R5 and the resistor R6.
Preferably, the resistance value of the resistor R3 is equal to the resistance value of the resistor R4.
Preferably, the conversion module includes an input signal PWM and a transistor Q1, the base of the transistor Q1 is connected behind one end of the input signal PWM series resistor R7 and one end of the parallel resistor R9, the other end of the resistor R9 is connected in parallel with the emitter of the transistor Q1 and then grounded, the collector of the transistor Q1 is connected in parallel with one end of the resistor R8 and then outputs a signal with a waveform opposite to that of the original input signal, and the other end of the resistor R8 is connected to the power supply.
Preferably, the input signal PWM is a signal output by the MCU processor.
Preferably, the transistor Q1 is an NPN transistor.
Preferably, the latch output module includes a D flip-flop U2, pin 5 of the D flip-flop U2 is connected to pin 8 of a comparator U1, pin 3 of the D flip-flop U2 is connected to a collector of a transistor Q1, pin 4 and pin 7 of the D flip-flop U2 are connected in parallel and then grounded, pin 14 of the D flip-flop U2 is connected in parallel to one end of a capacitor C3 and a power supply, pin 6 of the D flip-flop U2 is connected in parallel to the other end of a capacitor C3 and then grounded, and pin 1 of the D flip-flop U2 is connected to the MCU processor to output a final zero-crossing detection result.
Preferably, the D flip-flop U2 is a digital signal latch.
The utility model discloses a another technical scheme is realized like this:
a range hood comprises a back electromotive force detection circuit of a brushless direct current motor, a range hood main body and a motor, wherein the motor is installed in the range hood main body, and the back electromotive force detection circuit of the brushless direct current motor is arranged in the motor.
Compared with the prior art, the back electromotive force detection circuit of the brushless direct current motor of the utility model replaces a software algorithm with a hardware circuit detection method, releases the internal resources of the MCU processor, provides MCU space resources for other function expansion except motor control, and reduces the cost; meanwhile, the hardware processing speed is higher than that of software processing, a zero-crossing detection result is directly output by hardware without a software algorithm, the complexity of software design is greatly simplified, and the processing real-time performance is improved.
Drawings
Fig. 1 is a circuit connection diagram of a back electromotive force detection circuit of a brushless dc motor according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a signal processing waveform of a back electromotive force detection circuit of a brushless dc motor according to embodiment 1 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example 1
Thus, with the structure, the input bus voltage Vbus and the back electromotive force Vemf are compared after being processed by the input comparison module 1, an intermediate result, namely result _ temp, of Uemf greater than or equal to 1/2Ubus or result less than or equal to 1/2Ubus is output to the latch output module 3, and the latch output module 3 latches and outputs the intermediate result _ temp after receiving the trigger signal of the conversion module 2, and transmits the intermediate result to the MCU processor as a final zero-crossing detection result.
The input comparison module 1 comprises an input source bus voltage Vbus, a back electromotive force Vemf and a comparator U1, the bus voltage Vbus is connected with one end of a resistor R2, a capacitor C2 and a resistor R3 in parallel after being connected with a resistor R1 in series, the other end of the resistor R3 is connected with a resistor R4 in parallel and then connected to a pin 9 of the comparator U1, and the other ends of the resistor R2, the capacitor C2 and the resistor R4 are all connected to the ground in parallel; one end of the counter electromotive force Vemf series resistor R5, the parallel resistor R6 and the capacitor C1 is connected to a pin 10 of a comparator U1, and the other ends of the resistor R6 and the capacitor C1 are grounded in parallel; the pin 4 of the comparator U1 is connected with a power supply, the pin 11 of the comparator U1 is grounded, and the pin 8 of the comparator U1 outputs a comparison result.
Thus, the input source of the input comparison module 1 with the comparator U1 as the core is the bus voltage Vbus and the back electromotive force Vemf, both of which are voltage signals, i.e., analog signals. The bus voltage Vbus is divided by resistors R1 and R2, Vemf is divided by resistors R5 and R6, and both have the same voltage division coefficient, so that Ubus and Uemf are respectively equal-proportion reduction voltages of Vbus and Vemf, wherein Ubus outputs 1/2Ubus through a voltage division circuit of R3 and R4, 1/2Ubus and Uemf output a comparison result reset _ temp at a pin C _ O after passing through a comparator U1.
The comparator U1 is used for realizing analog signal comparison and converting the analog signal into digital signal output, and the logic relation is as follows: when Uemf is greater than or equal to 1/2Ubus, the pin C _ O outputs a high level (i.e., result _ temp ═ 1), and when Uemf is less than or equal to 1/2Ubus, the pin C _ O outputs a low level (i.e., result _ temp ═ 0).
The voltage division coefficients of the resistor R1 and the resistor R2 are the same as those of the resistor R5 and the resistor R6.
Thus, since the voltage division coefficients of the resistor R1 and the resistor R2 are the same as those of the resistor R5 and the resistor R6, the bus voltage Vbus is reduced by the resistor R1 and the resistor R2, and the counter electromotive force Vemf is reduced by the resistor R5 and the resistor R6 by the same ratio.
The resistance of the resistor R3 is equal to the resistance of the resistor R4.
Thus, since the resistance of the resistor R3 is equal to the resistance of the resistor R4, Ubus can be reduced to 1/2Ubus through the resistor R3 and the resistor R4.
The conversion module 2 comprises an input signal PWM and a triode Q1, the base of the triode Q1 is connected behind one end of an input signal PWM series resistor R7 and a parallel resistor R9, the other end of a resistor R9 is connected with the emitter of a triode Q1 in parallel and is grounded, a signal which is opposite to the original input signal in waveform is output behind one end of a collector parallel resistor R8 of a triode Q1, and the other end of the resistor R8 is connected with a power supply.
Thus, in the conversion module 2 with the NPN type transistor Q1 as the core, the input signal is the PWM signal output by the MCU processor, when the rising edge of the PWM signal comes, the transistor Q1 is turned on, and the end c outputs a low level, and when the falling edge of the PWM signal comes, the transistor Q1 is turned off, and the end c outputs a high level, so that the PWM signal is input to the end b, and after passing through the conversion module 2, a waveform signal opposite to the original PWM signal is output at the end c, that is, the inversion conversion of the digital signal is realized.
The input signal PWM is a signal output by the MCU processor.
In this way, the output PWM signal can be input to the input source of the conversion module 2 through the MCU processor.
The triode Q1 is an NPN type triode.
Thus, the transistor Q1 can be an NPN transistor, and when the rising edge of the PWM signal comes, the transistor Q1 is turned on, and the terminal c outputs a low level, and when the falling edge of the PWM signal comes, the transistor Q1 is turned off, and the terminal c outputs a high level.
The latch output module 3 comprises a D flip-flop U2, a pin 5 of the D flip-flop U2 is connected with a pin 8 of a comparator U1, a pin 3 of the D flip-flop U2 is connected with a collector of a triode Q1, a pin 4 and a pin 7 of the D flip-flop U2 are grounded after being connected in parallel, a pin 14 of the D flip-flop U2 is connected with one end of a capacitor C3 and a power supply in parallel, a pin 6 of the D flip-flop U2 is connected with the other end of a capacitor C3 in parallel and then grounded, and a pin 1 of the D flip-flop U2 is connected with an MCU processor to output a final zero-crossing detection result.
Thus, in the latch output module 3 with the D flip-flop U2 as the core, the input signals are the comparison result _ temp and the waveform signal opposite to the original PWM signal, and both signals are digital signals, and their logical relationship is: when the rising edge of the input signal at the pin 3(CLCK1) of the D flip-flop U2 comes, the input signal value at the pin 5(D1) of the D flip-flop U2 is latched to the pin 1(Q1) of the D flip-flop U2, namely, when the rising edge of the effective trigger signal (the end c outputs high level), the comparison result _ temp is latched and output to the MCU processor.
The D flip-flop U2 is a digital signal latch.
In this way, the D flip-flop U2 is a digital signal latch, which can latch and output the comparison result _ temp when a valid trigger signal comes, and transmit the comparison result _ temp as a final zero-crossing detection result to the MCU processor.
As shown in fig. 2, a schematic diagram of a signal processing waveform of a back electromotive force detection circuit of a brushless dc motor is shown, where a waveform 1 is a PWM signal output by an MCU processor, a waveform 2 is a PWM inverted signal output by the MCU processor, and a waveform 3 is a zero-crossing detection signal result received by the MCU processor. For the MCU processor, the received result signal is detected while the PWM signal falling edge is output by the MCU processor, the zero-crossing event can be judged if the result value is judged to have high and low level overturn, the zero-crossing event is generated according to the positions a, b, c and d in the corresponding graph, and then the MCU processor can calculate the commutation time according to the time when the zero-crossing event occurs.
The utility model discloses a brushless DC motor's back electromotive force detection circuitry, total input signal are bus voltage Vbus, back electromotive force Vemf and the PWM signal of MCU treater output, and total output signal is zero cross detection result. Vbus and Vemf are compared in real time and the result signal value is updated when the MCU processor outputs the PWM falling edge signal. The MCU processor only needs to receive the result signal and judges that the zero-crossing event happens if the result signal is inverted in high and low levels, the whole signal processing process is realized through a hardware circuit, software algorithm processing is not needed, and the system time delay is greatly reduced.
Example 2
The embodiment 2 of the utility model provides a range hood, it includes brushless DC motor's back electromotive force detection circuitry, range hood main part and motor, install the motor in the range hood main part, set up brushless DC motor's back electromotive force detection circuitry in the motor.
Therefore, will the utility model discloses a brushless DC motor's back electromotive force detection circuitry sets up in the motor of range hood main part, uses the utility model discloses a brushless DC motor's back electromotive force detection circuitry's direct current frequency conversion range hood, motor control's real-time and accuracy all obtain effectively improving.
The utility model uses the hardware circuit detection method to replace the software algorithm, releases the internal resources of the MCU processor, and provides the MCU space resources for other function expansion besides the motor control; meanwhile, the hardware processing speed is higher than that of software processing, a zero-crossing detection result is directly output by hardware without a software algorithm, the complexity of software design is greatly simplified, and the processing real-time performance is improved. The utility model discloses be applied to range hood, can the high rotational speed motor of adaptation to realize the applied scene of stronger suction, be favorable to reducing motor running noise simultaneously.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention should be covered by the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. The counter electromotive force detection circuit of the brushless direct current motor is characterized by comprising an input comparison module (1), a conversion module (2) and a latch output module (3), wherein the input comparison module (1) compares bus voltage and counter electromotive force and transmits a comparison result to the latch output module (3), and the latch output module (3) latches the comparison result input into the comparison module (1) after receiving a trigger signal of the conversion module (2) and finally outputs the comparison result.
2. The back electromotive force detection circuit of a brushless direct current motor according to claim 1, wherein the input comparison module (1) comprises an input source bus voltage Vbus and a back electromotive force Vemf, and a comparator U1, the bus voltage Vbus is connected in series with a resistor R1 and then connected in parallel with one end of a resistor R2, a capacitor C2 and one end of a resistor R3, the other end of the resistor R3 is connected in parallel with a resistor R4 and then connected to a pin 9 of the comparator U1, and the other ends of the resistor R2, the capacitor C2 and the resistor R4 are all connected in parallel with ground; one end of the counter electromotive force Vemf series resistor R5, the parallel resistor R6 and the capacitor C1 is connected to a pin 10 of a comparator U1, and the other ends of the resistor R6 and the capacitor C1 are grounded in parallel; the pin 4 of the comparator U1 is connected with a power supply, the pin 11 of the comparator U1 is grounded, and the pin 8 of the comparator U1 outputs a comparison result.
3. A back electromotive force detection circuit of a brushless dc motor according to claim 2, wherein the voltage division coefficients of the resistor R1 and the resistor R2 are the same as those of the resistor R5 and the resistor R6.
4. A back electromotive force detection circuit of a brushless dc motor according to claim 3, wherein the resistance value of the resistor R3 is equal to the resistance value of the resistor R4.
5. The back electromotive force detection circuit of brushless DC motor according to claim 4, wherein said conversion module (2) comprises an input signal PWM and a transistor Q1, said input signal PWM is connected with the base of a transistor Q1 after connecting with one end of a series resistor R7 and a parallel resistor R9, the other end of said resistor R9 is connected with the emitter of a transistor Q1 in parallel and then grounded, the collector of a transistor Q1 is connected with one end of a resistor R8 in parallel and then outputs a signal with a waveform opposite to the original input signal, and the other end of said resistor R8 is connected with a power supply.
6. A back electromotive force detection circuit of a brushless DC motor according to claim 5, wherein the input signal PWM is a signal outputted from an MCU processor.
7. The back electromotive force detection circuit of a brushless dc motor according to claim 6, wherein the transistor Q1 is an NPN transistor.
8. The back electromotive force detection circuit of a brushless DC motor according to claim 7, wherein the latch output module (3) comprises a D flip-flop U2, pin 5 of the D flip-flop U2 is connected to pin 8 of a comparator U1, pin 3 of the D flip-flop U2 is connected to the collector of a transistor Q1, pin 4 and pin 7 of the D flip-flop U2 are connected in parallel and then grounded, pin 14 of the D flip-flop U2 is connected in parallel to one end of a capacitor C3 and a power supply, pin 6 of the D flip-flop U2 is connected in parallel to the other end of a capacitor C3 and then grounded, and pin 1 of the D flip-flop U2 is connected to an MCU processor to output a final zero-crossing detection result.
9. A back electromotive force detection circuit of a brushless dc motor according to claim 8, wherein the D flip-flop U2 is a digital signal latch.
10. A range hood, characterized in that, it includes the back electromotive force detection circuit of the brushless dc motor of any claim 1-9, a range hood main body and a motor, the motor is installed in the range hood main body, the back electromotive force detection circuit of the brushless dc motor is set in the motor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020335905.5U CN211744379U (en) | 2020-03-17 | 2020-03-17 | Back electromotive force detection circuit of brushless direct current motor and range hood applying same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020335905.5U CN211744379U (en) | 2020-03-17 | 2020-03-17 | Back electromotive force detection circuit of brushless direct current motor and range hood applying same |
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| CN211744379U true CN211744379U (en) | 2020-10-23 |
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| CN202020335905.5U Expired - Fee Related CN211744379U (en) | 2020-03-17 | 2020-03-17 | Back electromotive force detection circuit of brushless direct current motor and range hood applying same |
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| CN (1) | CN211744379U (en) |
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- 2020-03-17 CN CN202020335905.5U patent/CN211744379U/en not_active Expired - Fee Related
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Granted publication date: 20201023 |