CN211701846U

CN211701846U - Electromagnetic compatibility optimizing device

Info

Publication number: CN211701846U
Application number: CN202020383206.8U
Authority: CN
Inventors: 马超
Original assignee: Anker Innovations Co Ltd
Current assignee: Anker Innovations Co Ltd
Priority date: 2020-03-23
Filing date: 2020-03-23
Publication date: 2020-10-16
Anticipated expiration: 2030-03-23

Abstract

The utility model provides an electromagnetic compatibility optimizes device, a serial communication port, include: a clamping circuit and a shielding device; the clamping circuit comprises a capacitor, a resistor and a transistor, wherein the transistor is a gallium nitride field effect transistor, the shielding device comprises a metal shielding sheet, and the metal shielding sheet comprises at least one grounding point. A miniaturized, efficient electromagnetic compatibility device is obtained, the performance of which is greatly optimized.

Description

Electromagnetic compatibility optimizing device

Technical Field

The utility model relates to an electromagnetic compatibility optimizing apparatus particularly relates to an electromagnetic compatibility optimizing apparatus in active clamp flyback circuit.

Background

With the continuous progress of power supply technology, the application of high frequency technology is wider and wider, the frequency design is higher, the transformer and the capacitor can be selected in the direction of miniaturization, the size of the charger is further reduced, but the negative effect is that the processing of electromagnetic compatibility (emc) is more difficult.

To solve the problem of electromagnetic compatibility EMC, more electromagnetic compatibility EMC suppressing devices are often required, which is a challenge to space and cost. To solve this problem, new technologies are needed, together with new peripheral devices.

Therefore, in view of the above technical problems, it is necessary to provide an electromagnetic compatibility optimization device.

SUMMERY OF THE UTILITY MODEL

In the summary section a series of concepts in a simplified form is introduced, which will be described in further detail in the detailed description section. The inventive content does not imply any attempt to define the essential features and essential features of the claimed solution, nor is it implied to be intended to define the scope of the claimed solution.

To the not enough of prior art, the utility model provides an electromagnetic compatibility optimizes device on the one hand, include: a clamping circuit and a shielding device; the clamping circuit comprises a capacitor, a resistor and a transistor, wherein the transistor is a gallium nitride field effect transistor, the shielding device comprises a metal shielding sheet, and the metal shielding sheet comprises at least one grounding point.

Further, the electromagnetic compatibility optimization device comprises a PCB, and the clamping circuit is arranged on the PCB.

Furthermore, the active clamping flyback controller is further included, the controller is connected to the gallium nitride field effect transistor and is a frequency jittering controller, and the controller is arranged on the PCB.

Further, the PCB comprises an insulating colloid, and the insulating colloid is at least partially positioned between the PCB and the metal shielding sheet.

Further, one end of the metal shielding plate is inserted into the insulator.

Further, the insulator is an insulating tape.

Further, the grounding points are three.

Further, a part of the ground point is located at an overlapping portion of the metal shielding plate and the insulating tape.

Further, a part of the ground point is located at a non-overlapping portion of the metal shielding plate and the insulating tape.

Further, the ground point is electrically connected to a ground line of the PCB.

Because the utility model discloses add in ACF control and tremble the mode frequently to at elementary control circuit part, paste the metallic shield piece, and choose for use the multiple spot ground connection mode, effectively solve the EMC problem.

Drawings

The following drawings of the present invention are used herein as part of the present invention for understanding the present invention. There are shown in the drawings, embodiments and descriptions of the invention, which are used to explain the principles of the invention.

In the drawings:

fig. 1 shows a schematic structural diagram of a flyback circuit module according to an embodiment of the present invention;

FIG. 2 shows a schematic top view of an article according to an embodiment of the present invention;

fig. 3 shows a schematic cross-sectional view of a product according to an embodiment of the present invention.

Description of reference numerals:

201 ACF controller

203 first gallium nitride field effect transistor

204 second gallium nitride field effect transistor

301 PCB

302 insulating tape

303 metal shielding sheet

304 ground point

Detailed Description

In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present invention.

It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatial relational terms such as "under," "below," "under," "above," "over," and the like may be used herein for convenience in describing the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

In order to thoroughly understand the present invention, a detailed structure will be provided in the following description in order to explain the technical solution provided by the present invention. The preferred embodiments of the present invention are described in detail below, however, other embodiments of the present invention are possible in addition to these detailed descriptions.

In order to realize miniaturized, effective electromagnetic compatibility device, greatly optimize the performance of electromagnetic compatibility device, the utility model provides an electromagnetic compatibility optimizes device, a serial communication port, include: a clamping circuit and a shielding device; the clamping circuit comprises a capacitor, a resistor and a transistor, wherein the transistor is a gallium nitride field effect transistor, the shielding device comprises a metal shielding sheet, and the metal shielding sheet comprises at least one grounding point.

The shielding device comprises a metallic shielding plate, wherein the metallic shielding plate comprises at least one grounding point.

Next, an electromagnetic compatibility optimization apparatus of the present invention is described in detail with reference to fig. 1, fig. 2 and fig. 3, wherein fig. 1 shows a schematic structural diagram of a flyback circuit module according to an embodiment of the present invention; FIG. 2 shows a schematic top view of an article according to an embodiment of the present invention; fig. 3 shows a schematic cross-sectional view of a product according to an embodiment of the present invention.

The gallium nitride GaN is a new semiconductor, which is a compound of nitrogen and gallium.

The utility model discloses Active Clamp Flyback ACF refers to Active Clamp Flyback, and Active Clamp Flyback circuit is the topological circuit that can realize the soft switch, because the soft switch can realize that Zero voltage opens (Zero volt Switching, ZVS) or Zero Current turn-off (Zero Current Switching, ZCS), so realize that the soft switch can reduce the Switching loss of switch tube in the ACF circuit.

When the ACF circuit actually works, the operation state of the switch tube in the ACF circuit may be: an over-soft switching state, a hard switching state, or a soft switching state. The utility model provides a, when the switch tube is soft on-off state, the switching loss of ACF circuit is minimum, and efficiency is the highest.

The utility model discloses the Electromagnetic Compatibility EMC that says so refers to the Electromagnetic Compatibility, specifically indicates that equipment or system accord with the ability that requires the operation and do not produce intolerable Electromagnetic interference to any equipment in its environment in its Electromagnetic environment. Therefore, electromagnetic compatibility EMC includes two requirements: on one hand, the electromagnetic interference generated to the environment by the equipment in the normal operation process cannot exceed a certain limit value; another aspect is that the appliance has a degree of immunity to electromagnetic interference present in the environment, i.e., electromagnetic susceptibility.

The electromagnetic interference EMI of the present invention is divided into Conducted EMI (reduced EMI) and Radiated EMI (Radiated EMI). The conducted electromagnetic interference Noise propagates among the hot line, the neutral line and the ground line, and includes Common-mode Noise (Common-mode Noise) between the hot line and the ground line and between the neutral line and the ground line, and Differential-mode Noise (Differential-mode Noise) between the hot line and the neutral line. Radiated electromagnetic interference noise propagates in space in the form of radiated electromagnetic fields, including common mode noise due to non-good grounding or non-zero ground reflected potential, and differential mode noise due to large signal loops that are not well controlled. In addition, no matter how complex an electronic device or system is, the generation of electromagnetic interference requires three conditions, namely three factors of electromagnetic interference: interference sources, interference propagation paths (or transmission channels), and sensitive equipment. The interference source refers to an electronic device or system generating electromagnetic interference, the interference propagation path (or transmission channel) includes cables, space, and the like, and the sensitive device refers to an electronic device or system susceptible to electromagnetic interference.

The utility model provides a capacitance compatibility EMC optimization scheme of gallium nitride in active clamp flyback ACF uses because the appearance of gallium nitride, because its super small knot electric capacity, switching frequency can accomplish 100KHz-500 KHz. The efficiency can be effectively improved by matching the technology of the active clamping flyback ACF and the control mode of the soft switch.

Firstly, a frequency jittering mode is added in the active clamp flyback ACF control, so that the EMC problem can be effectively solved.

Secondly, a metal shielding sheet is attached to the primary control circuit part, and a multipoint grounding mode is selected, so that the problem of electromagnetic compatibility (EMC) is effectively solved.

Fig. 1 shows a schematic structural diagram of a flyback circuit module according to an embodiment of the present invention, in which a main circuit structure is shown, and in an active clamp flyback ACF controller, a dither technique is added, so as to effectively solve the problem of electromagnetic interference EMI.

In fig. 1, R, C, the first GaN FET203 constitutes an absorption circuit, effectively utilizing the primary leakage inductance energy; the second GaN FET204 is used for reducing the switching loss, and the gallium nitride field effect transistor has smaller junction capacitance and internal resistance, so that the switching loss can be effectively reduced; by using the ACF controller 201, the switching devices of the primary and secondary stages are operated in a soft switching state, so that the loss is further reduced, and the purpose of improving the efficiency is achieved.

The GaN FET referred to in the present invention is a gallium nitride (GaN) Field Effect Transistor (FET), the output capacitance and the on-resistance of which are low, and for the GaN FET, the variation curve of the on-resistance thereof with respect to the gate source voltage is similar to MOSFETs, the designed operation gate voltage of the first generation GaN transistor is approximately 4-5V, the temperature coefficient trend of the on-resistance thereof is also similar to MOSFET when positive, but the magnitude thereof is much smaller, and this advantage increases with the increase of the rated voltage of the device.

From a gate threshold voltage perspective, GaN field effect transistors have lower thresholds than MOSFETs. This is due to the almost flat relationship between threshold and temperature, and the very low capacitance between gate and drain. Since the device begins to conduct at 1.6V, care must be taken to ensure a low impedance path from the gate to the source when it is desired to keep the device off during high speed switching of the rectifier function.

In addition to low on-resistance from a capacitance point of view, the lateral structure of the GaN FET makes it a very low capacitance device. It has the ability to convert several hundred volts in nanoseconds, making it capable of several megahertz. Of importance in the switch is Cgd. Since Cgd has a lateral structure, it comes from only a small corner of the gate and is much lower than the same capacitance in a vertical MOSFET. The gate-to-source capacitance Cgs consists of the gate-to-channel junction, and the capacitance of the dielectric between the gate and the field plate. Cgs is large compared to Cgd, giving GaN FETs better dv/dt immunity, but still small compared to silicon MOSFETs. This results in very short delay times and good controllability in low duty cycle applications. The drain-source capacitance Cd is also small, limited to the capacitance between the field plate and the dielectric layer of the drain. The capacitance-to-voltage curve of a GaN FET is similar to that of silicon, except that its capacitance is much lower with similar resistance.

From the body diode perspective, the GaN FET is a purely lateral device, without the parasitic bipolar junction of the common silicon-based MOSFET. Thus, reverse bias or "diode" operation has a different mechanism, but functions similarly. In the case of zero-biasing the gate to the source, there are no electrons under the gate region. When the drain voltage is lowered, a positive bias is generated on the gate with respect to the drift region, injecting electrons under the gate. Once the gate threshold is reached, there are enough electrons under the gate to form a conductive channel. The benefit of this mechanism is that there are no minority carriers involved in the conduction process and therefore no reverse recovery losses. When Qrr is zero, the output capacitor (Coss) must be charged and discharged every switching cycle. For similar on-resistance devices, the output capacitance Coss of GaN FETs is significantly lower than that of silicon MOSFETs. When the bias on the gate is greater than the threshold voltage, the GaN FET is turned on in reverse, with the forward voltage of the "diode" being higher than the silicon transistor.

In fact, the basic operating principle of GaN FETs is similar to that of silicon MOSFETs, but GaN FETs have significant improvements in on-resistance, gate threshold voltage, capacitance, and body diode, with particular advantages as described above.

Specifically, a capacitor C is connected in parallel with a resistor R, a source of a first GaN FET is connected to one side of a primary coil, a drain is connected to a common terminal of the capacitor C and the resistor R, another common terminal of the capacitor C and the resistor R is connected to the other side of the primary coil, a gate of the first GaN FET is connected to the ACF controller, the first GaN FET is also called a high-end switch or a clamp switch, the GaN FET further comprises a second GaN FET, a source of the second GaN FET is connected to a power supply, a drain is connected to a common terminal of the primary coil and the first GaN FET, and a gate of the second GaN FET is also connected to the ACF controller, and the second GaN FET is also called a bottom switch or a power switch. The first GaN FET, the capacitor C and the resistor R form a clamping circuit for absorbing leakage inductance energy and improving the efficiency of the whole device, the second GaN FET is used for controlling the connection of a power supply and the device, the internal resistance and junction capacitance are low, the loss of the whole device is further reduced, and the efficiency of the device is improved.

In an exemplary embodiment, the present embodiment may further include a current sensing resistor (not shown), one end of which is connected to the second GaN FET, and the other end of which is grounded.

Example one

In the schematic structural diagram of the flyback circuit module according to an embodiment of the present invention shown in fig. 1, a dither technique is added to the controller 201 of the active clamp flyback ACF, so as to effectively solve the problem of electromagnetic interference EMI.

The jitter frequency control means controlling the periodic variation of the working frequency of the switched capacitor around a certain set center frequency. If a corresponding fourier transform is made on the switching signal, its major harmonics are changed from the center frequency to exemplarily: the center frequency ± 2 nhkhz (n is 2,3 …), and the range of the jitter may be other values, which is not limited in detail. Therefore, the discrete harmonic frequency points are changed into a continuous spectrum with band-shaped distribution, but the spectrum peaks are reduced, so that the effect of spectrum moving is realized from the angle of concentrated spectrum energy dispersion, the effect of peak clipping and valley filling is realized, and the EMC tolerance requirement is met to solve the EMC problem.

The comparison of conduction and radiation tests before and after the frequency jitter control shows that the effect of inhibiting the electromagnetic interference EMI emission level is very obvious. Meanwhile, when the frequency is jittered and controlled, because the frequency jitter is in a small range, the filter designed according to the original center frequency is still applicable, which is a place far superior to the random frequency control method. The dither control can be simply implemented using an analog control circuit. In an oscillating circuit forming a carrier, a small part of parameters affecting the carrier frequency is separated, such as the aforementioned dither part of only +2kHz, and the proportion of the dither part to the main operating frequency is very small.

Illustratively, a triangular wave circuit is used to control the parameters to make the values of the parameters change in a triangular periodic manner (for example, 3% of the resistance is 2k omega, the change rule is that the change is from change to 4k omega, then the change is from 4k omega to zero, and the like), and the periodic change of the frequency from 64kHz to 68kHz can be realized. The design example of the frequency jittering method control circuit is that PWM control is realized by using a chip TlA 94. Since the frequency of the PWM signal output from the chip TlA94 is determined by the RC element externally connected to the oscillator itself, and the value of C is usually not easy to adjust, the resistor R can be changed into two parts, R1 and R2, where R2 is an adjustable resistor, which is about 10% R1, and by adjusting the value of the externally connected R2 to change it from 0 to the maximum value, the frequency (carrier frequency) of the PWM signal can be changed to about 10%.

Illustratively, the simple implementation method for adjusting the periodic resistance value is that a triode is connected in parallel with two ends of a fixed resistor R2, and triangular wave voltage is input into the triode, so that the triode works in a linear amplification state. The equivalent resistance presented by the R2 to the outside is changed after the equivalent C-E resistance is connected with the resistor R2 in parallel. Therefore, the resistance of the R2 appears periodic change along with the change of the input triangular wave voltage of the triode, so that the frequency of the oscillator and the frequency of the final PWM signal are jittered within a certain range. From the above implementation, it can be seen that the dither control actually uses a periodic triangular wave (or other periodic signal) in a lower frequency range to modulate a carrier signal, and still belongs to the modulation frequency control technology. Compared with other methods for inhibiting electromagnetic interference (EMI), the frequency jitter technology is simpler and easier to realize, so that the internal circuit of the power semiconductor integrated chip can be used for improving the capacitive interference (EMI), the cost of peripheral elements can be saved, the problem of the electromagnetic interference (EMI) caused by the lead wire of the peripheral circuit is reduced, and the filter design can be simply designed by using the central frequency.

The frequency jittering function can be pre-integrated in the chip, so that the design is an integrated modular design.

Under high-frequency operating conditions, a multi-stage filter is generally used to suppress EMC, and when a multi-stage filter is used, the required space and volume are relatively large, and miniaturization is difficult. In the embodiment, the active clamp flyback ACF and the gan field effect transistor gan fet are controlled in a manner of adding dither frequency control, so that devices can be effectively reduced, space can be saved, electromagnetic interference can be suppressed, and electromagnetic compatibility can be realized.

Example two

Fig. 2 is a schematic top view of a product according to an embodiment of the present invention, and fig. 3 is a schematic cross-sectional view of a product according to an embodiment of the present invention.

In fig. 2 and 3, the PCB is illustrated as 301, the insulating tape is illustrated as 302, the metallic shield piece is illustrated as 303, and the ground point is illustrated as 304.

Wherein the metallic shield piece 303 has a plurality of grounding points 304, one of which is located on the right side, in a plan view of which the insulating tape and the metallic shield piece do not overlap, and two grounding points are located on the left side, in a plan view of which the insulating tape and the metallic shield piece have overlapping portions.

Illustratively, the insulator is at least partially between the PCB and the metal shield sheet.

Illustratively, the number of ground points may be selected from other numbers, such as one, two, four or more. The material of the metal shielding sheet is a metal material, and other materials with electromagnetic effect can be selected.

Illustratively, one end of the metal shield plate is inserted into the insulator.

The insulating tape 302 is an insulating material on the metal shielding plate 303, and the insulating material is not limited to the insulating tape, and may be another shape such as an insulating film or another insulating material. The insulating tape is shown as only one embodiment of the insulator.

Illustratively, the clamp circuit shown in fig. 1 is disposed on the PCB in fig. 2.

Illustratively, the controller shown in fig. 1 is disposed on the PCB in fig. 2.

Illustratively, the ground point is electrically connected to a ground line of the PCB.

As shown in fig. 3, which shows a cross-sectional view corresponding to fig. 2, reflecting the order of the respective stacked layers, wherein a PCB301 is positioned at a lower layer, an insulating tape 302 is positioned on the PCB301, and a metal shielding sheet 303 is interposed in the insulating tape 302.

Illustratively, the insulating tape 302 is formed in two steps, first, a layer of insulating tape is formed on the PCB301, then the metal shielding sheet 303 is formed on the insulating tape, and then a layer of insulating tape is formed on the metal shielding sheet 303, thereby forming the entire insulating tape 302.

Illustratively, the insulating tape 302 is formed at one time, and then the metal shielding plate 303 is inserted therein.

Illustratively, the PCB, the insulating tape 302, and the metal shielding sheet 303 are sequentially formed.

Illustratively, a common body of the PCB, the insulating tape 302, and the metal shielding plate 303 is separately formed and disposed in combination.

In the product schematic diagrams shown in fig. 2 and fig. 3, the metal shielding sheet 303 is only connected to the insulating tape 302, and the metal shielding sheet 303 itself is used for receiving external electromagnetic interference and also for blocking electromagnetic signals of internal circuits from interfering with the external electromagnetic interference. Since the insulating tape 302 connected thereto has no conductivity, the metal shield sheet 303 can sufficiently block electromagnetic interference with an internal circuit from the outside and electromagnetic interference with the outside from electromagnetic signals of the internal circuit.

Furthermore, a plurality of grounding points 304 are arranged on the metal shielding plate 303, and the grounding points 304 guide the electromagnetic signals received by the metal shielding plate 303 to the ground, so as to prevent the electromagnetic signals from entering a chip circuit and prevent the electromagnetic interference generated by the external electromagnetic signals to the chip.

Therefore, the electromagnetic compatibility (EMC) problem can be effectively solved by using the blocking absorption characteristic of the metal shielding material and using a multipoint grounding mode, and preferably, the EMC problem is optimized to be more than 6 dB.

EXAMPLE III

The third embodiment is obtained by combining the first embodiment and the second embodiment, and in the schematic structural diagram of the flyback circuit module shown in fig. 1 of the present invention, a controller 201 of the active clamp flyback ACF is added with a dither technique, so that the problem of electromagnetic interference EMI can be effectively solved.

Under high-frequency operating conditions, a multi-stage filter is generally used to suppress EMC, and when a multi-stage filter is used, the required space and volume are relatively large, and miniaturization is difficult. In the third embodiment, the active clamp flyback ACF and the gan field effect transistor gan fet are controlled in a manner of adding dither frequency control, so that devices can be effectively reduced, space can be saved, electromagnetic interference can be suppressed, and electromagnetic compatibility can be realized. In the third embodiment, the electromagnetic compatibility EMC problem can be effectively solved by using the blocking absorption characteristic of the metal shielding material and using a multipoint grounding manner, and preferably, the EMC is optimized by more than 6 dB.

Therefore, the third embodiment combines the first embodiment with the second embodiment, and simultaneously obtains the advantages of the first embodiment and the advantages of the second embodiment, thereby obtaining a miniaturized and effective electromagnetic compatibility device and greatly optimizing the performance of the electromagnetic compatibility device.

This is so far done right the utility model discloses an explanation and explanation of the essential element of electromagnetic compatibility optimizing apparatus, still can include other part to complete electromagnetic compatibility optimizing apparatus and do not do here and describe repeatedly one by one.

The present invention has been described in terms of the above embodiments, but it is to be understood that the above embodiments are for purposes of illustration and description only and are not intended to limit the invention to the described embodiments. Furthermore, it will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that many more modifications and variations are possible in light of the teaching of the present invention and are within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims

1. An electromagnetic compatibility optimizing apparatus, comprising:

a clamping circuit and a shielding device;

the clamping circuit comprises a capacitor, a resistor and a transistor,

wherein the transistor is a gallium nitride field effect transistor,

the shielding means comprises a metallic shielding plate which is,

wherein the metallic shield plate comprises at least one grounding point.

2. The apparatus according to claim 1, wherein the apparatus comprises a PCB on which the clamp circuit is disposed.

3. The apparatus according to claim 2, further comprising an active clamp flyback controller, wherein the controller is connected to the gan fet and is a dither controller, and wherein the controller is disposed on the PCB.

4. The emc optimization device of claim 2, further comprising an insulator at least partially between the PCB and the metal shield tab.

5. The apparatus of claim 4, wherein one end of the metallic shield plate is inserted into the insulator.

6. The apparatus of claim 4 or 5, wherein the insulator is an insulating tape.

7. The apparatus of claim 1, wherein the number of ground points is three.

8. The apparatus according to claim 6, wherein a portion of the ground point is located at a portion where the metal shield plate and the insulating tape overlap.

9. The apparatus according to claim 6, wherein a portion of the ground point is located at a non-overlapping portion of the metal shield plate and the insulating tape.

10. The emc optimization apparatus of claim 2, wherein the ground point is electrically connected to a ground line of the PCB.