CN2115620U - Synchronous demodulating receiver - Google Patents

Synchronous demodulating receiver Download PDF

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Publication number
CN2115620U
CN2115620U CN 91227311 CN91227311U CN2115620U CN 2115620 U CN2115620 U CN 2115620U CN 91227311 CN91227311 CN 91227311 CN 91227311 U CN91227311 U CN 91227311U CN 2115620 U CN2115620 U CN 2115620U
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China
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circuit
phase
output
input
frequency
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CN 91227311
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Chinese (zh)
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郑贤蓬
郑文献
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Individual
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Abstract

The utility model relates to a synchronous demodulating receiver. The traditional superheterodyne mode is replaced by a synchronous / quadrature detection circuit and a phase lock loop circuit, and the disadvantages of large distortion, bad frequency response and poor anti-jamming capability of the nonlinear detection of a diode. The utility model has the advantages of little demodulation distortion, good anti-jamming capability and high sensitivity. The padding of all bands can be implemented, and an interface is provided for frequency digital display. The listening quality of medium wave broadcast can be enhanced and the competitive capacity with television broadcast and frequency modulation broadcast can be enhanced by the utility model.

Description

Synchronous demodulating receiver
The present invention relates to a kind of synchronous demodulation receiver, particularly a kind of amplitude-modulated signal synchronous demodulation receiver.
In recent years since popularizing of colourcast and FM stereophonic broadcast make medium wave am broadcast face the not high challenge of listening quality, and become the technical barrier that needs to be resolved hurrily.Development trend shows both at home and abroad, the technology of making a start of amplitude modulation broadcasting makes marked progress, and its receiving end is still continued to use the superheterodyne receiver of decades, particularly continue to use non-linear envelope detection, harmonic distortion is serious, intermediate frequency is narrow with frequency band, frequency response is poor, so that the medium wave am broadcast quality can't improve the disclosed a kind of direct hybrid synchrodyne receiver of CN87101494A, its synchro detection circuit adopts analog multiplier circuit, when this kind circuit is used for synchronous detection, be linear, than making moderate progress with the diode detection linearity in the small-signal detection, but still show bigger non-linearly when large-signal, and input and output have potential difference; The homogenous frequency signal that is 90 ° of two-way phase phasic differences in this technical scheme again is to be produced by the phase-locked loop circuit of two covers, and control signal is fed back mutually between them, the circuit structure complexity, and oscillation signal frequency is identical with institute received RF signal frequency, is easy to generate interference.Therefore be difficult to be applicable to the medium wave am broadcast receiver.
For breaking away from traditional superheterodyne receiver pattern, first purpose of the present invention is that a kind of dynamic greatly, high linear synchronous detecting circuit of design substitutes nonlinear detection circuit and analogue multiplication detecting circuit; Second purpose is the defective at above-mentioned phase-locked loop circuit, designs a kind of not only simple phase-locked loop circuit but also can demodulate that low distortion, wideband ring, high-quality audio signal, for the medium wave am broadcast receiver provides a kind of new standard.
The present invention realizes above-mentioned target with following technical proposals.
A kind of synchronous demodulation receiver, it is made up of frequency-selecting High Amplifier Circuit, detecting circuit, phase-locked loop circuit, filtering squelch circuit, power circuit and letter Chinese percussion instrument.It is characterized in that synchronous/orthogonal demodulation circuit is made up of synchro detection circuit (2) and orthogonal demodulation circuit (3); Frequency-selecting High Amplifier Circuit (1) output is connected to the input of synchro detection circuit (2) and the input of orthogonal demodulation circuit (3); A phase-locked loop circuit of being formed by orthogonal demodulation circuit (3), active loop filter circuit (4), voltage-controlled tuned oscillator circuit (5) and 90 ° of phase-shift circuits (6); Orthogonal demodulation circuit (3) output and active loop filter circuit (4) input are coupled, active loop filter circuit (4) output and voltage-controlled tuned oscillator circuit (5) input are coupled, and the output of voltage-controlled tuned oscillator circuit (5) and 90 ° of phase-shift circuits (6) input are coupled; Output phase is different with frequency with radiofrequency signal for 90 ° of phase-shift circuits (6) output end signal, phase difference output is 0 ° ,-180 ° a digital pulse signal input synchro detection circuit (2), and phase difference output is-90 ° ,-270 ° a digital pulse signal input orthogonal demodulation circuit.
The advantage of technique scheme is to make demodulation distortion little with linear switching circuit effect synchronous detection, and good in anti-interference performance, highly sensitive can realize the tracking of full frequency band; The triggering signal of synchronous detection is a digital pulse signal, provides easy interface for the frequency numeral shows; And can receive single sideband singal etc., and it is compared with existing superheterodyne receiver, and superiority is well-known.
Fig. 1 is a design block diagram of the present invention, 1 is the frequency-selecting High Amplifier Circuit among the figure, 2 is synchro detection circuit, and 3 is orthogonal demodulation circuit, and 4 is the active loop filter circuit, 5 is voltage-controlled tuned oscillator circuit, 6 is 90 ° of phase-shift circuits, and 7 are the filtering squelch circuit, and 8 are the letter Chinese percussion instrument, 9 is power circuit, and 10 is automatic gain control circuit.
Fig. 2 is circuit theory diagrams of the present invention, T among the figure 1Be MOS dual gate FET, D 1Be variable capacitance diode, IC 1Be four bidirectional electronic switch CD4066, IC 2A, IC 2BBe double D trigger CD4013, IC 3Be CMOS six reverser CD4069, IC 4A, IC 4BBe operational amplifier NE5532.
Fig. 3 is that the another kind of 90 ° of phase-shift circuits is implemented circuit.
Now in conjunction with the accompanying drawings embodiment is elaborated.
Frequency-selecting high-frequency amplifier circuit (1) is amplified by three extremely high frequencies to be formed, wherein T 1Be dual-gate MOS field effect transistor 4D01, select for use the 4D01 purpose be overcome that transistor noise figure is big, job insecurity, overload block the shortcoming that distortion is bigger, its input G 1Be signal input, G 2Do AGC control, control is steady, and controlling depth is 40db.Load is the broadband frequency-selective circuit, and its effect one is the digit pulse interference signal of this machine of filtering, and two for improving this level work voltage, improves gain.
Synchronously/orthogonal demodulation circuit (2)/(3) are by IC 1Four bidirectional electronic switch CD4066 and peripheral cell thereof constitute, four bidirectional electronic switch be four independently can the control figure signal and the electronic switch that transmits of analog signal, typical case's conducting resistance is 60 Ω when supply power voltage is 15V, influencing linear conducting resistance error is 5 Ω, close resistance break up to 50M Ω, can transmit signal from the direct current to 40MHz, and the transmitted in both directions characteristic is arranged, negative peak cutting distortion in the time of can thoroughly overcoming big modulation.Under the pulse signal control of four kinds of phase places that 90 ° of phase-shift circuits are exported, finish synchronously/the orthogonal detection function.Be further to improve the detection linearity, the present invention also takes following 2 measures, the first synchronously/the quadrature detector output each seal in resistance R respectively 8, R 9, R 10, R 11, in order to weaken of the influence of guiding path difference resistance to linearity.It two is to adopt the negative and positive dual power power supply, and passes through inductance L 3For synchronously/IC of orthogonal demodulation circuit 2And amplifier IC 4A, IC 4BThe no-voltage biasing is provided, further improves linearity and can obtain maximum input signal dynamic range.
For using synchronous/orthogonal demodulation circuit can demodulate audio signal and error signal thereof simultaneously, must there be four frequencies to equate and phase place differs 90 ° pulse signal successively and removes triggering synchronous/orthogonal demodulation circuit in turn, the present invention designs a kind of phase-locked loop for this purpose, and described phase-locked loop is made up of orthogonal demodulation circuit (3), active loop filter circuit (4), voltage-controlled tuned oscillator circuit (5) and 90 ° of broadband phase-shift circuits (6).
Active loop filter circuit (4) is by amplifier IC 4B, R 19,20,21And C 14,15Forming, is a kind of lead-lag network, can take into account interference free performance simultaneously and keep loop stability.
Voltage-controlled tuned oscillator circuit (5) is by triode T 4, inductance L 4,5, capacitor C 16, D 1, C 17Deng composition, voltage-controlled sensitivity is almost constant at whole receive frequency range, is because at variable capacitance diode D 1An end seal in and C 16The little capacitor C of interlock 17And the effect that produces, when receiving low frequency, C 16Become big, variable capacitance diode D 1Capacity is less relatively, and is less to the local frequency control action, at this moment C 17Capacity is bigger, performance D 1Control action to local frequency.When receiving high-end radio station, C 16Capacity diminishes and and D 1D when comparable 1The local frequency control action is strengthened greatly, but because C 17Seal in and C 17Capacity and C 16Reduce synchronously, weakened the control action of variable capacitance diode, but the voltage-controlled sensitivity of local oscillator is remained on the reasonable level at range of receiving.
90 ° of phase-shift circuits (6) are formed for digital integrated circuit CD4013.Two independently identical d type flip flops of performance are arranged in the double D trigger CD4013, two trigger CP ends link together, constitute synchronous triggering, its output frequency is 1/4 of input, be that local oscillator is when being output as 4f, 90 ° of phase-shift circuits are output as f, and it is identical with rf frequency, make the local oscillation signal frequency far above radio frequency, the interference that minimizing is put height, 90 ° of phase-shift circuit phase of output signal be 0 °, 180 ° signal for the triggering synchronous detecting circuit, 90 ° of phase-shift circuits are output as-90 ° ,-270 ° signal for triggering orthogonal demodulation circuit.For making output phase accurately adjustable, between the CP end, insert a potentiometer W, the distributed capacitance of this resistance and clock end CP constitutes delay circuit, can obtain accurate phase difference output signal when regulating the W center position.
90 ° of another enforcement circuit of phase-shift circuit as shown in Figure 3, it is to seal in an inverter F between two input CP of double D trigger, make the positive negative edge of pulse of local oscillator output trigger two d type flip flops respectively, the phase shifter operating rate is doubled, output frequency is 1/2 of input, by regulating W center position and F 2Bias voltage, with the phase place of accurate control output pulse.
Phase-locked loop internal series-connection coupling cycle constitutes a loop, orthogonal demodulation circuit (3) output and active loop filter circuit (4) input are coupled, active loop filter circuit (4) output and voltage-controlled tuned oscillator circuit (5) input are coupled, the output of voltage-controlled tuned oscillator circuit (5) and 90 ° of phase-shift circuits (6) input are coupled, 90 ° of phase-shift circuits (6) output divides two-way, one tunnel input synchro detection circuit (2), another road input orthogonal demodulation circuit (3).
The phase-locked loop dynamic process is, radiofrequency signal is exported through orthogonal detection, produces the phase error signal of local oscillation signal and radiofrequency signal, and this signal disturbs through active loop filtering elimination, go the frequency of control oscillation circuit again, make voltage-controlled tuning frequency of oscillation strictness be locked in 4 times of radio frequency signal frequency.90 ° of phase-shift circuit input signals are triggered by oscillation frequency signal, output still is radio frequency signal frequency after carrying out 90 ° of phase shifts and 4 frequency divisions, but the phase phasic difference is followed successively by 0 ° ,-90 ° ,-180 ° ,-270 °, output signal is triggering synchronous detection or orthogonal demodulation circuit work respectively, finishes dynamic circulation one time.
This machine is selected IC for use 4AFor low frequency amplifies, it is that low noise, wideband ring, the accurate computing amplifier integrated block NE5532 of two-forty, and the superior height of matching property is put and synchro detection circuit, can get high-quality audio frequency output.
By triode T 8And resistance R 24, R 25, capacitor C 20,21Form variable low-pass filter circuit, when listening to local station, signal is strong, interference is little, the broadening passband of can trying one's best, and to obtain the radio reception effect of high-fidelity, when receiving weak signal, compressible passband, filtering noise disturbs, to obtain sound equipment clearly.
Mute control circuit is by triode T 6, T 7Form, when local oscillator was asynchronous with the signal that receives, the low direct voltage of putting output signal was 0V, at this moment triode T 7Conducting makes T 5Be in saturation condition, beat frequency is uttered long and high-pitched sounds signal by bypass, plays the noise elimination effect.
Enough strong and with local oscillator when synchronous when signal, when making the low direct voltage of putting output greater than 0.7V, T 7End, the noise elimination effect disappears, and makes audio signal unimpeded, automatic gain control tube T 6Conducting, collector voltage descends, control T 1Second grid, reduce this grade amplification quantity, realize automatic gain control, light-emitting diode D 2The power of luminous strong and weak expression signal.
This machine power supply is positive 6 volts and bear 6 volts duplicate supply, and passes through inductance L 3For synchronously/quadrature detector IC 1With operational amplifier IC 4The biasing of 0 current potential is provided.

Claims (6)

1, a kind of synchronous demodulation receiver, it is made up of frequency-selecting High Amplifier Circuit, detecting circuit, phase-locked loop circuit, filtering squelch circuit, power circuit and letter Chinese percussion instrument, it is characterized in that:
A. synchronous/orthogonal demodulation circuit is made up of synchro detection circuit (2) and orthogonal demodulation circuit (3);
B. frequency-selecting High Amplifier Circuit (1) output is connected to the input of synchro detection circuit (2) and the input of orthogonal demodulation circuit (3); C. phase-locked loop circuit of being formed by orthogonal demodulation circuit (3), active loop filter circuit (4), voltage-controlled tuned oscillator circuit (5) and 90 ° of phase-shift circuits (6);
D. orthogonal demodulation circuit (3) output and active loop filter circuit (4) input are coupled, active loop filter circuit (4) output and voltage-controlled tuned oscillator circuit (5) input are coupled, and the output of voltage-controlled tuned oscillator circuit (5) and 90 ° of phase-shift circuits (6) input are coupled;
E.90 output phase is different with frequency with radiofrequency signal for ° phase-shift circuit (6) output end signal, phase difference output is 0 ° ,-180 ° a digital pulse signal input synchro detection circuit (2), and phase difference output is-90 ° ,-270 ° a digital pulse signal input orthogonal demodulation circuit (3).
2, receiver according to claim 1 is characterized in that:
A. synchronous/orthogonal demodulation circuit is by the digital switch ic chip 1And resistance R 8, R 9, R 10, R 11Form;
B.90 ° phase-shift circuit (6) is by double D trigger IC 2AAnd IC 2BForm;
C. one by triode T 8And resistance R 24, R 25And capacitor C 20, C 21The variable low-pass filter of forming;
D. by triode T 5, T 7The squelch circuit of forming.
3, as claim 1 and 2 described receivers, it is characterized in that:
A.90 the CP termination in ° phase-shift circuit goes into to be used for the potentiometer W of accurate control phase;
B.90 seal in inverter F between two CP ends in ° phase-shift circuit;
4,, it is characterized in that synchronously/each series resistor R respectively of quadrature detector output as claim 1 and 2 described receivers 8, R 9, R 10, R 11
5, synchronous demodulation receiver as claimed in claim 1 is characterized in that variable capacitance diode D1 serial connection and the main capacitor C of shaking in voltage-controlled tuned oscillator circuit (5) 10The capacitor C of the may command lock-in range of interlock 17
6, receiver as claimed in claim 1 is characterized in that adopting the negative and positive dual power power supply, and passes through inductance L 3For synchronously/quadrature detector IC 1Amplify IC with computing 4The biasing of 0 current potential is provided.
CN 91227311 1991-10-23 1991-10-23 Synchronous demodulating receiver Granted CN2115620U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 91227311 CN2115620U (en) 1991-10-23 1991-10-23 Synchronous demodulating receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 91227311 CN2115620U (en) 1991-10-23 1991-10-23 Synchronous demodulating receiver

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CN2115620U true CN2115620U (en) 1992-09-09

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CN 91227311 Granted CN2115620U (en) 1991-10-23 1991-10-23 Synchronous demodulating receiver

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101383623B (en) * 2007-09-04 2012-07-25 三洋电机株式会社 FM tuner
CN104993838A (en) * 2015-06-03 2015-10-21 北京圣非凡电子系统技术开发有限公司 Low-frequency magnetic antenna zero point receiving system and method
CN111555996A (en) * 2020-04-24 2020-08-18 刘莹雪 5G communication multichannel signal transmission system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101383623B (en) * 2007-09-04 2012-07-25 三洋电机株式会社 FM tuner
CN104993838A (en) * 2015-06-03 2015-10-21 北京圣非凡电子系统技术开发有限公司 Low-frequency magnetic antenna zero point receiving system and method
CN104993838B (en) * 2015-06-03 2017-12-05 北京圣非凡电子系统技术开发有限公司 Low-frequency magnetic antenna null reception system and method
CN111555996A (en) * 2020-04-24 2020-08-18 刘莹雪 5G communication multichannel signal transmission system
CN111555996B (en) * 2020-04-24 2020-11-17 昆明软讯科技有限公司 5G communication multichannel signal transmission system

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