CN211513177U - Super-resolution circuit for respiratory motion signals of chest and abdomen surfaces - Google Patents

Super-resolution circuit for respiratory motion signals of chest and abdomen surfaces Download PDF

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CN211513177U
CN211513177U CN202020144977.1U CN202020144977U CN211513177U CN 211513177 U CN211513177 U CN 211513177U CN 202020144977 U CN202020144977 U CN 202020144977U CN 211513177 U CN211513177 U CN 211513177U
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赵烟桥
陈睿
胡亚欣
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Harbin University of Science and Technology
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Abstract

The invention relates to a super-resolution circuit for respiratory motion signals on the surfaces of the chest and abdomen, belonging to the technical field of precision instruments and chest and abdomen radiotherapy; the circuit comprises a signal conversion module, a phase difference multi-output module, a resistance chain multiphase generation module, a multiphase sine square wave conversion module, a multiphase fusion logic gate module and a secondary super-resolution module; the modules are taken as a whole, and are all absent, so that the respiratory motion signal in one period is changed into the square wave signals in a plurality of periods, namely super resolution of the respiratory motion signal on the surface of the chest and abdomen is realized, and the further technical advantage brought by the result is that in the process of a plurality of respiratory periods, the change of the respiratory frequency can be judged by judging the frequency change of the square wave signals, and more importantly, the change of the respiratory frequency can be judged in a shorter time, namely in a time range smaller than one respiratory period, because the period of the super resolution square wave is far smaller than the respiratory motion period.

Description

Super-resolution circuit for respiratory motion signals of chest and abdomen surfaces
Technical Field
The invention discloses a super-resolution circuit for respiratory motion signals on the surface of the chest and abdomen, and belongs to the technical field of precision instruments and chest and abdomen radiotherapy.
Background
In the process of the tumor radiotherapy of the chest and abdomen, the tumor region escapes from the target region or the normal tissue enters the target region through breathing, so that the radiotherapy effect is reduced, and complications are easy to generate.
In order to solve the negative influence of respiratory motion on radiotherapy, methods such as respiratory retention, respiratory gating and the like are adopted for the first time in clinic, the tumor position is controlled through respiratory intervention, and although a certain effect is achieved, the tolerance of a patient is poor; in order to improve the tolerance of the patient, the respiration of the patient is not interfered, a tracking system is also provided, and the tracking of the tumor position is realized by monitoring the tumor area, however, the method belongs to a hysteresis compensation method, so that the problem of 'slow half-beat' always occurs; in order to improve the tracking accuracy, scholars adopt a prediction means, and at the beginning, respiratory motion is regarded as simple repetition of a respiratory cycle, however, the respiratory motion has a quasi-periodic characteristic without obvious regularity, so that the prediction accuracy is not high, and the error is larger and larger along with the lapse of time; later, scholars form a breathing motion model with time as a variable through fitting according to the historical rule of breathing motion, and further predict future breathing motion, and the method has a good effect; the research of the subject group adopts a Gaussian process regression method to predict respiratory motion, and provides a prediction result in the form of mean and variance, thereby providing a brand-new prediction means for the respiratory motion.
The macroscopic characteristics of the respiratory motion are determined by the amplitude and the frequency, and the respiratory motion can be predicted only by accurately obtaining the respiratory frequency due to the existence of a certain corresponding relation between the amplitude and the frequency. If the respiratory motion signal can be super-resolved, the respiratory frequency can be obtained in less than one respiratory motion period, and then the respiratory motion can be rapidly predicted and analyzed. However, no technical means for super-resolving respiratory motion signals have been found in the art.
Disclosure of Invention
In order to realize super-resolution of the respiratory motion signal, the invention discloses a super-resolution circuit and a super-resolution method for the respiratory motion signal on the surface of the chest and abdomen, which can change the respiratory motion signal of one period into a square wave signal of a plurality of periods, and the further technical advantage brought by the result is that the change of the respiratory frequency can be judged by judging the frequency change of the square wave signal in the process of a plurality of respiratory periods.
The purpose of the invention is realized as follows:
the super-resolution circuit for the respiratory motion signals on the surfaces of the chest and abdomen comprises a signal conversion module, a phase difference multi-output module, a resistance chain multi-phase generation module, a multi-phase sine square wave conversion module, a multi-phase fusion logic gate module and a secondary super-resolution module;
the input of the signal conversion module is a respiratory motion signal f (t) of one period, and the output is:
Figure BDA0002378481340000021
wherein: t is t0Is the time at which the respiratory motion signal f (t) begins to be acquired; ω is the angular frequency of the respiratory motion signal f (t); t is the period of the respiratory motion signal f (T);
the phase difference multi-output module comprises an operational amplifier U1-1 and an operational amplifier U1-2, wherein the inverting input end of the operational amplifier U1-1 is connected with the output end of the signal conversion module through a capacitor C1-1, the inverting input end of the operational amplifier U1-1 is connected with the output end of an operational amplifier U1-1 through a resistor R1-1, and the non-inverting input end of the operational amplifier U1-1 is connected with the ground; the inverting input end of the operational amplifier U1-2 is connected with the output end of the operational amplifier U1-1 through a capacitor C1-2, the output end of the operational amplifier U1-2 is connected through a resistor R1-2, and the non-inverting input end of the operational amplifier U1-2 is connected with the ground; the output end of the signal conversion module is used as the first output of the phase difference multi-output module, the output end of an operational amplifier U1-1 is used as the second output of the phase difference multi-output module, and the output end of an operational amplifier U1-2 is used as the third output of the phase difference multi-output module;
the resistor chain multi-phase generation module comprises 18 resistors; the first output of the phase difference multi-output module and the second output of the phase difference multi-output module are connected through a series structure of a resistor R2-2 and a resistor R2-6 respectively, the resistance ratio of the resistor R2-2 to the resistor R2-6 is 9/28, the resistors are connected through a series structure of a resistor R2-3 and a resistor R2-7, the resistance ratio of the resistor R2-3 to the resistor R2-7 is 8/11, the resistors are connected through a series structure of a resistor R2-4 and a resistor R2-8, the resistance ratio of the resistor R2-4 to the resistor R2-8 is 11/8, the resistors are connected through a series structure of a resistor R2-5 and a resistor R2-9, and the resistance ratio of the resistor R2-5 to the resistor R2-9 is 28/9; the second output of the phase difference multi-output module and the third output of the phase difference multi-output module are connected through a series structure of resistors R2-11 and R2-15 respectively, the resistance ratio of the resistors R2-11 and R2-15 is 9/28, the resistors R2-12 and the resistors R2-16 are connected through a series structure, the resistance ratio of the resistors R2-12 and the resistors R2-16 is 8/11, the resistors R2-13 and the resistors R2-17 are connected through a series structure, the resistance ratio of the resistors R2-13 and the resistors R2-17 is 11/8, the resistors R2-14 and the resistors R2-18 are connected through a series structure, and the ratio of the resistors R2-14 and the resistors R2-18 is 28/9; the first output of the phase difference multi-output module is used as a first phase output after passing through a resistor R2-1, the tap between a resistor R2-2 and a resistor R2-6 is used as a second phase output, the tap between a resistor R2-3 and a resistor R2-7 is used as a third phase output, the tap between a resistor R2-4 and a resistor R2-8 is used as a fourth phase output, the tap between a resistor R2-5 and a resistor R2-9 is used as a fifth phase output, the second output of the phase difference multi-output module is used as a sixth phase output after passing through a resistor R2-10, the tap between a resistor R2-11 and a resistor R2-15 is used as a seventh phase output, the tap between a resistor R2-12 and a resistor R2-16 is used as an eighth phase output, and the tap between a resistor R2-13 and a resistor R2-17 is used as a ninth phase output, the tap between the resistor R2-14 and the resistor R2-18 is taken as the tenth phase output;
the multiphase sine square wave conversion module comprises 10 operational amplifiers, wherein the inverting input end of the operational amplifier U2-1 is connected with the first phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-1 is connected to the ground, and the output end of the operational amplifier U2-1 is a first square wave output; the inverting input end of the operational amplifier U2-2 is connected with the second phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-2 is connected to the ground, and the output end of the operational amplifier U2-2 is a second square wave output; the inverting input end of the operational amplifier U2-3 is connected with the third phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-3 is connected to the ground, and the output end of the operational amplifier U2-3 is third square wave output; the inverting input end of the operational amplifier U2-4 is connected with the fourth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-4 is connected to the ground, and the output end of the operational amplifier U2-4 is a fourth wave output; the inverting input end of the operational amplifier U2-5 is connected with the fifth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-5 is connected to the ground, and the output end of the operational amplifier U2-5 is a fifth square wave output; the inverting input end of the operational amplifier U2-6 is connected with the sixth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-6 is connected to the ground, and the output end of the operational amplifier U2-6 is the sixth wave output; the inverting input end of the operational amplifier U2-7 is connected with the seventh phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-7 is connected to the ground, and the output end of the operational amplifier U2-7 is a seventh square wave output; the inverting input end of the operational amplifier U2-8 is connected with the eighth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-8 is connected to the ground, and the output end of the operational amplifier U2-8 is the eighth square wave output; the inverting input end of the operational amplifier U2-9 is connected with the ninth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-9 is connected to the ground, and the output end of the operational amplifier U2-9 is the ninth square wave output; the inverting input end of the operational amplifier U2-10 is connected with the tenth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-10 is connected to the ground, and the output end of the operational amplifier U2-10 is the tenth square wave output;
the multi-phase fusion logic gate module comprises eight exclusive-OR gates, the inputs of the exclusive-OR gate U3-1 are third square wave output and seventh square wave output, and the output of the exclusive-OR gate U3-1 is first exclusive-OR output; the input of the exclusive-OR gate U3-2 is a second square wave output and a tenth square wave output, and the output of the exclusive-OR gate U3-2 is a second exclusive-OR output; the input of the exclusive-OR gate U3-3 is a first square wave output and a first exclusive-OR output, and the output of the exclusive-OR gate U3-3 is a third exclusive-OR output; the input of the exclusive-OR gate U3-4 is a second exclusive-OR output and a sixth wave output, and the output of the exclusive-OR gate U3-4 is a fourth exclusive-OR output; the input of the XOR gate U3-5 is a fourth XOR output and an eighth XOR output, and the output of the XOR gate U3-5 is a fifth XOR output; the input of the exclusive-OR gate U3-6 is the third exclusive-OR output and the seventh exclusive-OR output, and the output of the exclusive-OR gate U3-6 is the sixth exclusive-OR output; the input of the exclusive-OR gate U3-7 is a fifth square wave output and a ninth square wave output, and the output of the exclusive-OR gate U3-7 is a seventh exclusive-OR output; the inputs of the exclusive-OR gate U3-8 are a fourth wave output and an eighth wave output, and the output of the exclusive-OR gate U3-8 is an eighth exclusive-OR output; the fifth exclusive-or output is used as an error phase super-resolution square wave output, and the sixth exclusive-or output is used as a quasi phase super-resolution square wave output;
the secondary super-resolution module comprises a quasi-phase super-resolution square wave deformation circuit, an error-phase super-resolution square wave deformation circuit, a first eight-input and NOR gate, a second eight-input and NOR gate and a final AND gate;
the input of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the first output of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the second output of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the third output of the quasi-phase super-resolution square wave deformation circuit is the sum operation of the quasi-phase super-resolution square wave output and the quasi-phase super-resolution square wave output in a non-time delay manner, and the fourth output of the quasi-phase super-resolution square wave deformation circuit is the sum operation of the quasi-phase super-resolution square wave output and the quasi-phase super-resolution square wave output in a time delay manner;
the input of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the first output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the second output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the third output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output and staggered phase super-resolution square wave output which are not delayed and operated, and the fourth output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output which is not delayed and operated;
the inputs of the first eight input and nor gate and the second eight input and nor gate are all quasi-phase super-resolution square wave output, quasi-phase super-resolution square wave output not and delayed and operation, quasi-phase super-resolution square wave output not and quasi-phase super-resolution square wave output delayed and operation, error phase super-resolution square wave output not, error phase super-resolution square wave output and error phase super-resolution square wave output not and delayed and operation, and error phase super-resolution square wave output not and error phase super-resolution square wave output delayed and operation, wherein the first eight input and nor gate operates according to the following logic:
first output of quasi-phase super-resolution square wave deformation circuit and third output of error-phase super-resolution square wave deformation circuit
Or is not
Second output of quasi-phase super-resolution square wave deformation circuit and fourth output of staggered-phase super-resolution square wave deformation circuit
Or is not
Third output of quasi-phase super-resolution square wave deformation circuit and second output of error-phase super-resolution square wave deformation circuit
Or is not
Fourth output of quasi-phase super-resolution square wave deformation circuit and first output of staggered-phase super-resolution square wave deformation circuit
The second eight input and nor gate operates according to the following logic:
first output of quasi-phase super-resolution square wave deformation circuit and fourth output of error-phase super-resolution square wave deformation circuit
Or is not
Second output of quasi-phase super-resolution square wave deformation circuit and third output of error-phase super-resolution square wave deformation circuit
Or is not
Third output of quasi-phase super-resolution square wave deformation circuit and first output of staggered-phase super-resolution square wave deformation circuit
Or is not
Fourth output of quasi-phase super-resolution square wave deformation circuit and second output of staggered-phase super-resolution square wave deformation circuit
Wherein, & represents and operation;
and the input of the final AND gate is the output of the first eight-input NOR gate and the output of the second eight-input NOR gate, and the output of the final AND gate is a super-resolution signal of the respiratory motion of the chest and abdomen surface.
The signal conversion module of the super-resolution circuit for the respiratory motion signal on the surface of the chest and abdomen is realized by a filter and an amplifier with passband frequency containing omega.
In the chest and abdomen surface respiratory motion signal super-resolution circuit, in the secondary super-resolution module, the time delay is realized by a time delay circuit consisting of a capacitor and a resistor.
The super-resolution method of the respiratory motion signals on the surface of the chest and abdomen comprises the following steps:
step a, in a signal conversion module, a filter and an amplifier with passband frequency containing omega are used to realize that a respiratory motion signal f (t) with a period as input is output as:
Figure BDA0002378481340000051
wherein the content of the first and second substances,
the filter selects the component with the frequency omega to pass through;
the amplifier adjusts the amplitude to
Figure BDA0002378481340000052
B, in the phase difference multi-output module, two differential circuits consisting of a resistor, a capacitor and an operational amplifier are utilized to respectively realize primary differentiation and secondary differentiation on the output cosine signal of the signal conversion module, so that three outputs of an arithmetic series with the phase difference of pi/2 are realized;
step c, in the resistance chain multiphase generation module, in order to facilitate analysis, setting three outputs of the phase difference multiphase generation module as sin alpha, sin (alpha-pi/2) and sin (alpha-pi) respectively;
since the resistance ratio of the resistor R2-2 to the resistor R2-6 is 9/28, the tap voltage between the resistor R2-2 and the resistor R2-6 is:
Figure BDA0002378481340000061
since the resistance ratio of the resistor R2-3 to the resistor R2-7 is 8/11, the tap voltage between the resistor R2-3 and the resistor R2-7 is:
Figure BDA0002378481340000062
since the resistance ratio of the resistor R2-4 to the resistor R2-8 is 11/8, the tap voltage between the resistor R2-4 and the resistor R2-8 is:
Figure BDA0002378481340000063
since the resistance ratio of the resistor R2-5 to the resistor R2-9 is 28/9, the tap voltage between the resistor R2-5 and the resistor R2-9 is:
Figure BDA0002378481340000064
since the resistance ratio of the resistor R2-11 to the resistor R2-15 is 9/28, the tap voltage between the resistor R2-11 and the resistor R2-15 is:
Figure BDA0002378481340000065
since the resistance ratio of the resistor R2-12 to the resistor R2-16 is 8/11, the tap voltage between the resistor R2-12 and the resistor R2-16 is:
Figure BDA0002378481340000066
since the resistance ratio of the resistor R2-13 to the resistor R2-17 is 11/8, the tap voltage between the resistor R2-13 and the resistor R2-17 is:
Figure BDA0002378481340000067
since the resistance ratio of the resistor R2-14 to the resistor R2-18 is 28/9, the tap voltage between the resistor R2-14 and the resistor R2-18 is:
Figure BDA0002378481340000071
it can be seen that the output of the resistor chain multi-phase generation module is an arithmetic progression ten output with a phase tolerance of pi/10;
step d, in the multi-phase sine square wave conversion module, each path of output of the resistor chain multi-phase generation module passes through a zero-crossing comparator, the amplitude is adjusted to be the saturation voltage value of the operational amplifier, and the phase is reserved;
step e, in the multiphase fusion logic gate module, performing logic operation by using ten square wave outputs of the multiphase sine square wave conversion module and six XOR outputs of the multiphase fusion logic gate module to realize wrong-phase super-resolution square wave output and quasi-phase super-resolution square wave output; the phase-offset super-resolution square wave output changes a respiratory motion signal of one period into a square wave signal of five periods, the phase difference is one fourth of the period of the phase-offset super-resolution square wave output signal, the quasi-phase super-resolution square wave output changes the respiratory motion signal of one period into a square wave signal of five periods, and the phase difference is the zero period of the quasi-phase super-resolution square wave output signal;
and f, in a secondary super-resolution module, acquiring each rising edge and each falling edge of the staggered phase super-resolution square wave output signal and the quasi-phase super-resolution square wave output signal by utilizing the characteristic that the difference between the staggered phase super-resolution square wave output signal and the quasi-phase super-resolution square wave output signal is a quarter of a period, and finally realizing the secondary super-resolution of the staggered phase super-resolution square wave output signal and the quasi-phase super-resolution square wave output signal by adopting a NOT gate, a delay circuit and an AND gate, and finally realizing the purpose of converting the respiratory motion signal of one period into the square wave signals of twenty periods.
Has the advantages that:
firstly, in the invention, the signal conversion module, the phase difference multi-output module, the resistance chain multi-phase generation module, the multi-phase sine square wave conversion module, the multi-phase fusion logic gate module and the secondary super-resolution module are taken as a whole, and the single-phase fusion logic gate module and the secondary super-resolution module are all out of the limits, so that the respiratory motion signal in one period is converted into the square wave signals in a plurality of periods, namely super-resolution of the respiratory motion signal on the surface of the chest and abdomen is realized.
Secondly, in the secondary super-resolution module, because with quasi-phase super-resolution square wave morph circuit and wrong phase super-resolution square wave morph circuit design into the form that circuit structure is identical completely, cooperate two subsequent and NOR gate and final AND gate simultaneously, consequently even two outputs that the polyphasic fuses the logic gate module are connected with two inputs of secondary super-resolution module are reverse, also do not have any influence to the output result of chest abdomen surface respiratory motion super-resolution signal, can be in order to realize the effect that polyphasic fusion logic gate module and secondary super-resolution module directionless are pegged graft, similar Type-C interface is superior to mini USB or micro USB's effect.
Thirdly, in the invention, compared with the 'chest and abdomen surface respiration motion signal wrong phase super-resolution circuit', the 'chest and abdomen surface respiration motion signal wrong phase super-resolution method', the 'chest and abdomen surface respiration motion signal quasi-phase super-resolution circuit' and the 'chest and abdomen surface respiration motion signal quasi-phase super-resolution method', a secondary super-resolution module is designed, and the wrong phase super-resolution square wave output and the quasi-phase super-resolution square wave output are simultaneously utilized, so that secondary super-resolution can be carried out, the detail degree is doubled, and the respiratory frequency can be shortened to one fourth of the other four patents when being judged.
Drawings
FIG. 1 is a logic block diagram of super-resolution circuit for respiratory motion signals of the thoracoabdominal surface.
FIG. 2 is a circuit diagram of a phase difference multi-output module in the super-resolution circuit of the respiratory motion signal of the chest and abdomen surface of the invention.
FIG. 3 is a circuit diagram of a resistor chain multiphase generation module in the super-resolution circuit of the respiratory motion signal of the chest and abdomen surface of the invention.
FIG. 4 is a circuit diagram of a multi-phase sine square wave conversion module in the super-resolution circuit for the respiratory motion signal of the chest and abdomen surface.
FIG. 5 is a circuit diagram of a multi-phase fusion logic gate module in the super-resolution circuit of the respiratory motion signal of the thoracoabdominal surface.
FIG. 6 is a circuit diagram of a secondary super-resolution module in the super-resolution circuit for the respiratory motion signals of the chest and abdomen surface.
FIG. 7 is a waveform diagram of the output of each module of the super resolution circuit for the respiratory motion signal of the chest and abdomen surface.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
Detailed description of the invention
The present embodiment is an embodiment of a super-resolution circuit for a respiratory motion signal of a thoracoabdominal surface.
The logic block diagram of the super-resolution circuit for the respiratory motion signals on the surfaces of the chest and abdomen is shown in figure 1, and the super-resolution circuit for the respiratory motion signals on the surfaces of the chest and abdomen comprises a signal conversion module, a phase difference multi-output module, a resistance chain multi-phase generation module, a multi-phase sine square wave conversion module, a multi-phase fusion logic gate module and a secondary super-resolution module; the phase difference multi-output module circuit diagram is shown in fig. 2, the resistance chain multi-phase generation module circuit diagram is shown in fig. 3, the multi-phase sine square wave conversion module circuit diagram is shown in fig. 4, the multi-phase fusion logic gate module circuit diagram is shown in fig. 5, the secondary super resolution module circuit diagram is shown in fig. 6, and the output waveform diagrams of the modules of the thoracoabdominal surface respiratory motion signal super resolution circuit are shown in fig. 7;
the input of the signal conversion module is a respiratory motion signal f (t) of one period, and the output is:
Figure BDA0002378481340000081
wherein: t is t0Is the time at which the respiratory motion signal f (t) begins to be acquired; ω is the angular frequency of the respiratory motion signal f (t); t is the period of the respiratory motion signal f (T);
the signal conversion module is realized by a filter and an amplifier with a passband frequency containing omega;
the phase difference multi-output module comprises an operational amplifier U1-1 and an operational amplifier U1-2, wherein the inverting input end of the operational amplifier U1-1 is connected with the output end of the signal conversion module through a capacitor C1-1, the inverting input end of the operational amplifier U1-1 is connected with the output end of an operational amplifier U1-1 through a resistor R1-1, and the non-inverting input end of the operational amplifier U1-1 is connected with the ground; the inverting input end of the operational amplifier U1-2 is connected with the output end of the operational amplifier U1-1 through a capacitor C1-2, the output end of the operational amplifier U1-2 is connected through a resistor R1-2, and the non-inverting input end of the operational amplifier U1-2 is connected with the ground; the output end of the signal conversion module is used as the first output of the phase difference multi-output module, the output end of an operational amplifier U1-1 is used as the second output of the phase difference multi-output module, and the output end of an operational amplifier U1-2 is used as the third output of the phase difference multi-output module;
the resistor chain multi-phase generation module comprises 18 resistors; the first output of the phase difference multi-output module and the second output of the phase difference multi-output module are connected through a series structure of a resistor R2-2 and a resistor R2-6 respectively, the resistance ratio of the resistor R2-2 to the resistor R2-6 is 9/28, the resistors are connected through a series structure of a resistor R2-3 and a resistor R2-7, the resistance ratio of the resistor R2-3 to the resistor R2-7 is 8/11, the resistors are connected through a series structure of a resistor R2-4 and a resistor R2-8, the resistance ratio of the resistor R2-4 to the resistor R2-8 is 11/8, the resistors are connected through a series structure of a resistor R2-5 and a resistor R2-9, and the resistance ratio of the resistor R2-5 to the resistor R2-9 is 28/9; the second output of the phase difference multi-output module and the third output of the phase difference multi-output module are connected through a series structure of resistors R2-11 and R2-15 respectively, the resistance ratio of the resistors R2-11 and R2-15 is 9/28, the resistors R2-12 and the resistors R2-16 are connected through a series structure, the resistance ratio of the resistors R2-12 and the resistors R2-16 is 8/11, the resistors R2-13 and the resistors R2-17 are connected through a series structure, the resistance ratio of the resistors R2-13 and the resistors R2-17 is 11/8, the resistors R2-14 and the resistors R2-18 are connected through a series structure, and the ratio of the resistors R2-14 and the resistors R2-18 is 28/9; the first output of the phase difference multi-output module is used as a first phase output after passing through a resistor R2-1, the tap between a resistor R2-2 and a resistor R2-6 is used as a second phase output, the tap between a resistor R2-3 and a resistor R2-7 is used as a third phase output, the tap between a resistor R2-4 and a resistor R2-8 is used as a fourth phase output, the tap between a resistor R2-5 and a resistor R2-9 is used as a fifth phase output, the second output of the phase difference multi-output module is used as a sixth phase output after passing through a resistor R2-10, the tap between a resistor R2-11 and a resistor R2-15 is used as a seventh phase output, the tap between a resistor R2-12 and a resistor R2-16 is used as an eighth phase output, and the tap between a resistor R2-13 and a resistor R2-17 is used as a ninth phase output, the tap between the resistor R2-14 and the resistor R2-18 is taken as the tenth phase output;
the multiphase sine square wave conversion module comprises 10 operational amplifiers, wherein the inverting input end of the operational amplifier U2-1 is connected with the first phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-1 is connected to the ground, and the output end of the operational amplifier U2-1 is a first square wave output; the inverting input end of the operational amplifier U2-2 is connected with the second phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-2 is connected to the ground, and the output end of the operational amplifier U2-2 is a second square wave output; the inverting input end of the operational amplifier U2-3 is connected with the third phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-3 is connected to the ground, and the output end of the operational amplifier U2-3 is third square wave output; the inverting input end of the operational amplifier U2-4 is connected with the fourth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-4 is connected to the ground, and the output end of the operational amplifier U2-4 is a fourth wave output; the inverting input end of the operational amplifier U2-5 is connected with the fifth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-5 is connected to the ground, and the output end of the operational amplifier U2-5 is a fifth square wave output; the inverting input end of the operational amplifier U2-6 is connected with the sixth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-6 is connected to the ground, and the output end of the operational amplifier U2-6 is the sixth wave output; the inverting input end of the operational amplifier U2-7 is connected with the seventh phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-7 is connected to the ground, and the output end of the operational amplifier U2-7 is a seventh square wave output; the inverting input end of the operational amplifier U2-8 is connected with the eighth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-8 is connected to the ground, and the output end of the operational amplifier U2-8 is the eighth square wave output; the inverting input end of the operational amplifier U2-9 is connected with the ninth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-9 is connected to the ground, and the output end of the operational amplifier U2-9 is the ninth square wave output; the inverting input end of the operational amplifier U2-10 is connected with the tenth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-10 is connected to the ground, and the output end of the operational amplifier U2-10 is the tenth square wave output;
the multi-phase fusion logic gate module comprises eight exclusive-OR gates, the inputs of the exclusive-OR gate U3-1 are third square wave output and seventh square wave output, and the output of the exclusive-OR gate U3-1 is first exclusive-OR output; the input of the exclusive-OR gate U3-2 is a second square wave output and a tenth square wave output, and the output of the exclusive-OR gate U3-2 is a second exclusive-OR output; the input of the exclusive-OR gate U3-3 is a first square wave output and a first exclusive-OR output, and the output of the exclusive-OR gate U3-3 is a third exclusive-OR output; the input of the exclusive-OR gate U3-4 is a second exclusive-OR output and a sixth wave output, and the output of the exclusive-OR gate U3-4 is a fourth exclusive-OR output; the input of the XOR gate U3-5 is a fourth XOR output and an eighth XOR output, and the output of the XOR gate U3-5 is a fifth XOR output; the input of the exclusive-OR gate U3-6 is the third exclusive-OR output and the seventh exclusive-OR output, and the output of the exclusive-OR gate U3-6 is the sixth exclusive-OR output; the input of the exclusive-OR gate U3-7 is a fifth square wave output and a ninth square wave output, and the output of the exclusive-OR gate U3-7 is a seventh exclusive-OR output; the inputs of the exclusive-OR gate U3-8 are a fourth wave output and an eighth wave output, and the output of the exclusive-OR gate U3-8 is an eighth exclusive-OR output; the fifth exclusive-or output is used as an error phase super-resolution square wave output, and the sixth exclusive-or output is used as a quasi phase super-resolution square wave output;
the secondary super-resolution module comprises a quasi-phase super-resolution square wave deformation circuit, an error-phase super-resolution square wave deformation circuit, a first eight-input and NOR gate, a second eight-input and NOR gate and a final AND gate;
the input of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the first output of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the second output of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the third output of the quasi-phase super-resolution square wave deformation circuit is the sum operation of the quasi-phase super-resolution square wave output and the quasi-phase super-resolution square wave output in a non-time delay manner, and the fourth output of the quasi-phase super-resolution square wave deformation circuit is the sum operation of the quasi-phase super-resolution square wave output and the quasi-phase super-resolution square wave output in a time delay manner;
the input of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the first output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the second output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the third output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output and staggered phase super-resolution square wave output which are not delayed and operated, and the fourth output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output which is not delayed and operated;
the delay is realized by a delay circuit consisting of a capacitor and a resistor;
the inputs of the first eight input and nor gate and the second eight input and nor gate are all quasi-phase super-resolution square wave output, quasi-phase super-resolution square wave output not and delayed and operation, quasi-phase super-resolution square wave output not and quasi-phase super-resolution square wave output delayed and operation, error phase super-resolution square wave output not, error phase super-resolution square wave output and error phase super-resolution square wave output not and delayed and operation, and error phase super-resolution square wave output not and error phase super-resolution square wave output delayed and operation, wherein the first eight input and nor gate operates according to the following logic:
first output of quasi-phase super-resolution square wave deformation circuit and third output of error-phase super-resolution square wave deformation circuit
Or is not
Second output of quasi-phase super-resolution square wave deformation circuit and fourth output of staggered-phase super-resolution square wave deformation circuit
Or is not
Third output of quasi-phase super-resolution square wave deformation circuit and second output of error-phase super-resolution square wave deformation circuit
Or is not
Fourth output of quasi-phase super-resolution square wave deformation circuit and first output of staggered-phase super-resolution square wave deformation circuit
The second eight input and nor gate operates according to the following logic:
first output of quasi-phase super-resolution square wave deformation circuit and fourth output of error-phase super-resolution square wave deformation circuit
Or is not
Second output of quasi-phase super-resolution square wave deformation circuit and third output of error-phase super-resolution square wave deformation circuit
Or is not
Third output of quasi-phase super-resolution square wave deformation circuit and first output of staggered-phase super-resolution square wave deformation circuit
Or is not
Fourth output of quasi-phase super-resolution square wave deformation circuit and second output of staggered-phase super-resolution square wave deformation circuit
Wherein, & represents and operation;
and the input of the final AND gate is the output of the first eight-input NOR gate and the output of the second eight-input NOR gate, and the output of the final AND gate is a super-resolution signal of the respiratory motion of the chest and abdomen surface.
Detailed description of the invention
The embodiment is an embodiment of a super-resolution method for respiratory motion signals of the surfaces of the chest and abdomen.
The super-resolution method for the respiratory motion signals on the surfaces of the chest and the abdomen is characterized by comprising the following steps of:
step a, in a signal conversion module, a filter and an amplifier with passband frequency containing omega are used to realize that a respiratory motion signal f (t) with a period as input is output as:
Figure BDA0002378481340000121
wherein the content of the first and second substances,
the filter selects the component with the frequency omega to pass through;
the amplifier adjusts the amplitude to
Figure BDA0002378481340000122
B, in the phase difference multi-output module, two differential circuits consisting of a resistor, a capacitor and an operational amplifier are utilized to respectively realize primary differentiation and secondary differentiation on the output cosine signal of the signal conversion module, so that three outputs of an arithmetic series with the phase difference of pi/2 are realized;
step c, in the resistance chain multiphase generation module, in order to facilitate analysis, setting three outputs of the phase difference multiphase generation module as sin alpha, sin (alpha-pi/2) and sin (alpha-pi) respectively;
since the resistance ratio of the resistor R2-2 to the resistor R2-6 is 9/28, the tap voltage between the resistor R2-2 and the resistor R2-6 is:
Figure BDA0002378481340000123
since the resistance ratio of the resistor R2-3 to the resistor R2-7 is 8/11, the tap voltage between the resistor R2-3 and the resistor R2-7 is:
Figure BDA0002378481340000131
since the resistance ratio of the resistor R2-4 to the resistor R2-8 is 11/8, the tap voltage between the resistor R2-4 and the resistor R2-8 is:
Figure BDA0002378481340000132
since the resistance ratio of the resistor R2-5 to the resistor R2-9 is 28/9, the tap voltage between the resistor R2-5 and the resistor R2-9 is:
Figure BDA0002378481340000133
since the resistance ratio of the resistor R2-11 to the resistor R2-15 is 9/28, the tap voltage between the resistor R2-11 and the resistor R2-15 is:
Figure BDA0002378481340000134
since the resistance ratio of the resistor R2-12 to the resistor R2-16 is 8/11, the tap voltage between the resistor R2-12 and the resistor R2-16 is:
Figure BDA0002378481340000135
since the resistance ratio of the resistor R2-13 to the resistor R2-17 is 11/8, the tap voltage between the resistor R2-13 and the resistor R2-17 is:
Figure BDA0002378481340000136
since the resistance ratio of the resistor R2-14 to the resistor R2-18 is 28/9, the tap voltage between the resistor R2-14 and the resistor R2-18 is:
Figure BDA0002378481340000137
it can be seen that the output of the resistor chain multi-phase generation module is an arithmetic progression ten output with a phase tolerance of pi/10;
step d, in the multi-phase sine square wave conversion module, each path of output of the resistor chain multi-phase generation module passes through a zero-crossing comparator, the amplitude is adjusted to be the saturation voltage value of the operational amplifier, and the phase is reserved;
step e, in the multiphase fusion logic gate module, performing logic operation by using ten square wave outputs of the multiphase sine square wave conversion module and six XOR outputs of the multiphase fusion logic gate module to realize wrong-phase super-resolution square wave output and quasi-phase super-resolution square wave output; the phase-offset super-resolution square wave output changes a respiratory motion signal of one period into a square wave signal of five periods, the phase difference is one fourth of the period of the phase-offset super-resolution square wave output signal, the quasi-phase super-resolution square wave output changes the respiratory motion signal of one period into a square wave signal of five periods, and the phase difference is the zero period of the quasi-phase super-resolution square wave output signal;
and f, in a secondary super-resolution module, acquiring each rising edge and each falling edge of the staggered phase super-resolution square wave output signal and the quasi-phase super-resolution square wave output signal by utilizing the characteristic that the difference between the staggered phase super-resolution square wave output signal and the quasi-phase super-resolution square wave output signal is a quarter of a period, and finally realizing the secondary super-resolution of the staggered phase super-resolution square wave output signal and the quasi-phase super-resolution square wave output signal by adopting a NOT gate, a delay circuit and an AND gate, and finally realizing the purpose of converting the respiratory motion signal of one period into the square wave signals of twenty periods.

Claims (3)

1. The super-resolution circuit for the respiratory motion signals on the surfaces of the chest and abdomen is characterized by comprising a signal conversion module, a phase difference multi-output module, a resistance chain multi-phase generation module, a multi-phase sine square wave conversion module, a multi-phase fusion logic gate module and a secondary super-resolution module;
the input of the signal conversion module is a respiratory motion signal f (t) of one period, and the output is:
Figure FDA0002378481330000011
wherein: t is t0Is the time at which the respiratory motion signal f (t) begins to be acquired; ω is the angular frequency of the respiratory motion signal f (t); t is the period of the respiratory motion signal f (T);
the phase difference multi-output module comprises an operational amplifier U1-1 and an operational amplifier U1-2, wherein the inverting input end of the operational amplifier U1-1 is connected with the output end of the signal conversion module through a capacitor C1-1, the inverting input end of the operational amplifier U1-1 is connected with the output end of an operational amplifier U1-1 through a resistor R1-1, and the non-inverting input end of the operational amplifier U1-1 is connected with the ground; the inverting input end of the operational amplifier U1-2 is connected with the output end of the operational amplifier U1-1 through a capacitor C1-2, the output end of the operational amplifier U1-2 is connected through a resistor R1-2, and the non-inverting input end of the operational amplifier U1-2 is connected with the ground; the output end of the signal conversion module is used as the first output of the phase difference multi-output module, the output end of an operational amplifier U1-1 is used as the second output of the phase difference multi-output module, and the output end of an operational amplifier U1-2 is used as the third output of the phase difference multi-output module;
the resistor chain multi-phase generation module comprises 18 resistors; the first output of the phase difference multi-output module and the second output of the phase difference multi-output module are connected through a series structure of a resistor R2-2 and a resistor R2-6 respectively, the resistance ratio of the resistor R2-2 to the resistor R2-6 is 9/28, the resistors are connected through a series structure of a resistor R2-3 and a resistor R2-7, the resistance ratio of the resistor R2-3 to the resistor R2-7 is 8/11, the resistors are connected through a series structure of a resistor R2-4 and a resistor R2-8, the resistance ratio of the resistor R2-4 to the resistor R2-8 is 11/8, the resistors are connected through a series structure of a resistor R2-5 and a resistor R2-9, and the resistance ratio of the resistor R2-5 to the resistor R2-9 is 28/9; the second output of the phase difference multi-output module and the third output of the phase difference multi-output module are connected through a series structure of resistors R2-11 and R2-15 respectively, the resistance ratio of the resistors R2-11 and R2-15 is 9/28, the resistors R2-12 and the resistors R2-16 are connected through a series structure, the resistance ratio of the resistors R2-12 and the resistors R2-16 is 8/11, the resistors R2-13 and the resistors R2-17 are connected through a series structure, the resistance ratio of the resistors R2-13 and the resistors R2-17 is 11/8, the resistors R2-14 and the resistors R2-18 are connected through a series structure, and the ratio of the resistors R2-14 and the resistors R2-18 is 28/9; the first output of the phase difference multi-output module is used as a first phase output after passing through a resistor R2-1, the tap between a resistor R2-2 and a resistor R2-6 is used as a second phase output, the tap between a resistor R2-3 and a resistor R2-7 is used as a third phase output, the tap between a resistor R2-4 and a resistor R2-8 is used as a fourth phase output, the tap between a resistor R2-5 and a resistor R2-9 is used as a fifth phase output, the second output of the phase difference multi-output module is used as a sixth phase output after passing through a resistor R2-10, the tap between a resistor R2-11 and a resistor R2-15 is used as a seventh phase output, the tap between a resistor R2-12 and a resistor R2-16 is used as an eighth phase output, and the tap between a resistor R2-13 and a resistor R2-17 is used as a ninth phase output, the tap between the resistor R2-14 and the resistor R2-18 is taken as the tenth phase output;
the multiphase sine square wave conversion module comprises 10 operational amplifiers, wherein the inverting input end of the operational amplifier U2-1 is connected with the first phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-1 is connected to the ground, and the output end of the operational amplifier U2-1 is a first square wave output; the inverting input end of the operational amplifier U2-2 is connected with the second phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-2 is connected to the ground, and the output end of the operational amplifier U2-2 is a second square wave output; the inverting input end of the operational amplifier U2-3 is connected with the third phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-3 is connected to the ground, and the output end of the operational amplifier U2-3 is third square wave output; the inverting input end of the operational amplifier U2-4 is connected with the fourth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-4 is connected to the ground, and the output end of the operational amplifier U2-4 is a fourth wave output; the inverting input end of the operational amplifier U2-5 is connected with the fifth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-5 is connected to the ground, and the output end of the operational amplifier U2-5 is a fifth square wave output; the inverting input end of the operational amplifier U2-6 is connected with the sixth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-6 is connected to the ground, and the output end of the operational amplifier U2-6 is the sixth wave output; the inverting input end of the operational amplifier U2-7 is connected with the seventh phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-7 is connected to the ground, and the output end of the operational amplifier U2-7 is a seventh square wave output; the inverting input end of the operational amplifier U2-8 is connected with the eighth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-8 is connected to the ground, and the output end of the operational amplifier U2-8 is the eighth square wave output; the inverting input end of the operational amplifier U2-9 is connected with the ninth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-9 is connected to the ground, and the output end of the operational amplifier U2-9 is the ninth square wave output; the inverting input end of the operational amplifier U2-10 is connected with the tenth phase output of the resistor chain multiphase generation module; the non-inverting input end of the operational amplifier U2-10 is connected to the ground, and the output end of the operational amplifier U2-10 is the tenth square wave output;
the multi-phase fusion logic gate module comprises eight exclusive-OR gates, the inputs of the exclusive-OR gate U3-1 are third square wave output and seventh square wave output, and the output of the exclusive-OR gate U3-1 is first exclusive-OR output; the input of the exclusive-OR gate U3-2 is a second square wave output and a tenth square wave output, and the output of the exclusive-OR gate U3-2 is a second exclusive-OR output; the input of the exclusive-OR gate U3-3 is a first square wave output and a first exclusive-OR output, and the output of the exclusive-OR gate U3-3 is a third exclusive-OR output; the input of the exclusive-OR gate U3-4 is a second exclusive-OR output and a sixth wave output, and the output of the exclusive-OR gate U3-4 is a fourth exclusive-OR output; the input of the XOR gate U3-5 is a fourth XOR output and an eighth XOR output, and the output of the XOR gate U3-5 is a fifth XOR output; the input of the exclusive-OR gate U3-6 is the third exclusive-OR output and the seventh exclusive-OR output, and the output of the exclusive-OR gate U3-6 is the sixth exclusive-OR output; the input of the exclusive-OR gate U3-7 is a fifth square wave output and a ninth square wave output, and the output of the exclusive-OR gate U3-7 is a seventh exclusive-OR output; the inputs of the exclusive-OR gate U3-8 are a fourth wave output and an eighth wave output, and the output of the exclusive-OR gate U3-8 is an eighth exclusive-OR output; the fifth exclusive-or output is used as an error phase super-resolution square wave output, and the sixth exclusive-or output is used as a quasi phase super-resolution square wave output;
the secondary super-resolution module comprises a quasi-phase super-resolution square wave deformation circuit, an error-phase super-resolution square wave deformation circuit, a first eight-input and NOR gate, a second eight-input and NOR gate and a final AND gate;
the input of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the first output of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the second output of the quasi-phase super-resolution square wave deformation circuit is quasi-phase super-resolution square wave output, the third output of the quasi-phase super-resolution square wave deformation circuit is the sum operation of the quasi-phase super-resolution square wave output and the quasi-phase super-resolution square wave output in a non-time delay manner, and the fourth output of the quasi-phase super-resolution square wave deformation circuit is the sum operation of the quasi-phase super-resolution square wave output and the quasi-phase super-resolution square wave output in a time delay manner;
the input of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the first output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the second output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output, the third output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output and staggered phase super-resolution square wave output which are not delayed and operated, and the fourth output of the staggered phase super-resolution square wave deformation circuit is staggered phase super-resolution square wave output which is not delayed and operated;
the inputs of the first eight input and nor gate and the second eight input and nor gate are all quasi-phase super-resolution square wave output, quasi-phase super-resolution square wave output not and delayed and operation, quasi-phase super-resolution square wave output not and quasi-phase super-resolution square wave output delayed and operation, error phase super-resolution square wave output not, error phase super-resolution square wave output and error phase super-resolution square wave output not and delayed and operation, and error phase super-resolution square wave output not and error phase super-resolution square wave output delayed and operation, wherein the first eight input and nor gate operates according to the following logic:
first output of quasi-phase super-resolution square wave deformation circuit and third output of error-phase super-resolution square wave deformation circuit
Or is not
Second output of quasi-phase super-resolution square wave deformation circuit and fourth output of staggered-phase super-resolution square wave deformation circuit
Or is not
Third output of quasi-phase super-resolution square wave deformation circuit and second output of error-phase super-resolution square wave deformation circuit
Or is not
Fourth output of quasi-phase super-resolution square wave deformation circuit and first output of staggered-phase super-resolution square wave deformation circuit
The second eight input and nor gate operates according to the following logic:
first output of quasi-phase super-resolution square wave deformation circuit and fourth output of error-phase super-resolution square wave deformation circuit
Or is not
Second output of quasi-phase super-resolution square wave deformation circuit and third output of error-phase super-resolution square wave deformation circuit
Or is not
Third output of quasi-phase super-resolution square wave deformation circuit and first output of staggered-phase super-resolution square wave deformation circuit
Or is not
Fourth output of quasi-phase super-resolution square wave deformation circuit and second output of staggered-phase super-resolution square wave deformation circuit
Wherein, & represents and operation;
and the input of the final AND gate is the output of the first eight-input NOR gate and the output of the second eight-input NOR gate, and the output of the final AND gate is a super-resolution signal of the respiratory motion of the chest and abdomen surface.
2. The super-resolution circuit for the thoracoabdominal surface respiratory motion signal according to claim 1, wherein the signal conversion module is implemented by a filter and an amplifier with a passband frequency containing ω.
3. The super-resolution circuit for the respiratory motion signals on the thoracoabdominal surface as claimed in claim 1, wherein in the secondary super-resolution module, the delay is realized by a delay circuit consisting of a capacitor and a resistor.
CN202020144977.1U 2020-01-22 2020-01-22 Super-resolution circuit for respiratory motion signals of chest and abdomen surfaces Active CN211513177U (en)

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