CN211405529U - Optimized parallel battery charging circuit - Google Patents
Optimized parallel battery charging circuit Download PDFInfo
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- CN211405529U CN211405529U CN201922389096.6U CN201922389096U CN211405529U CN 211405529 U CN211405529 U CN 211405529U CN 201922389096 U CN201922389096 U CN 201922389096U CN 211405529 U CN211405529 U CN 211405529U
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Abstract
The utility model provides a parallelly connected charging circuit of battery of optimization, including charging plug J1 and a plurality of output plug J2, be provided with the charging circuit unit between charging plug J1 and the single output plug J2, every the charging circuit unit includes charging chip U1, protection module, switch module and drive module. The utility model discloses a charge control is carried out to every battery to independent charging circuit unit separately, all has respective charging chip in the charging circuit unit, not only can accomplish mutual isolation, and the break-make that can independent control charge for the complementary interference of charging of different batteries. The utility model discloses a charging circuit has low leakage current and low pressure drop, and has reverse protect function.
Description
Technical Field
The utility model belongs to the technical field of the battery and specifically relates to a parallelly connected charging circuit of battery of optimization is related to.
Background
Most of existing power supply products all adopt the battery pack to provide power, generally include to establish ties the use of battery pack and parallelly connected the use of battery pack two kinds of modes, establish ties to use and can improve voltage, excellent in use effect, and parallelly connected use can prolong the live time that improves the power supply product. However, when the battery pack is charged, the charging blocks are connected in series, so that the charging blocks are unbalanced in charging, the service lives of two electrode battery blocks in the battery pack are short, and the endurance mileage and the service life of the battery are influenced; when the battery packs are used in parallel, pressure difference exists between the battery packs connected in parallel, and if the pressure difference is overlarge, overlarge current can be generated to damage the battery packs connected in parallel.
For the parallel charging mode, a unidirectional conducting component such as a diode or a switch is usually used in the existing charging circuit to be connected with a charging plate of a battery pack to achieve the purpose of protecting the battery pack, but the diode cannot be independently controlled, the conducting voltage drop of the diode is between 0.5 and 0.7V and is far greater than the saturated conducting voltage drop of an MOS (metal oxide semiconductor) tube, when large current passes through the charging circuit, the heating problem caused by the increase of the circuit loss can be caused, and even the load is damaged due to overhigh temperature; in addition, an additional protection circuit is required to be added when reverse access protection is performed by adopting a diode isolation technology, so that the circuit cost is increased.
Disclosure of Invention
In order to solve the problem, the utility model provides a parallelly connected charging circuit of battery of optimization.
The main contents of the utility model include:
an optimized parallel battery charging circuit comprises a charging plug J1 and a plurality of output plugs J2, wherein the charging plug J1 is used for connecting external charging equipment, and the plurality of output plugs J2 are respectively connected with battery cells; charging plug J1 and singly be provided with the charging circuit unit between the output plug, the charging circuit unit includes charging chip U1, protection module, switch module and drive module, protection module switch module with drive module with charging chip U1 connects, switch module with drive module connects.
Preferably, the model of the charging chip U1 is PLM74700QDBVTQ 1; the VCAP pin of the charging chip U1 is connected with the output end 1 of the charging plug J1 through a pull-up resistor C26; the EN pin of the charging chip U1 is connected with the protection module and the switch module; the A pin of the charging chip U1 is connected with the charging plug J1; the pin C of the charging chip U1 is connected with the input module J2; the GATE pin of the charging chip U1 is connected with the driving module; the GND pin of the charging chip U1 is grounded.
Preferably, the protection module comprises a zener diode ZD7 and a protection resistor R23 which are connected in parallel; the anode of the zener diode ZD7 is connected to the EN pin of the charging chip U1, and the cathode of the zener diode ZD7 is connected to the driving module.
Preferably, the driving module includes a first driving resistor R21 and a second driving resistor R22 connected in parallel, and one end of the first driving resistor R21 and one end of the second driving resistor R22 are connected in series with a third driving resistor R27 and then connected to a GATE pin of the charging chip U1; the other ends of the first driving resistor R21 and the second driving resistor R22 are connected with the switch module.
Preferably, the switch module includes a first MOS transistor and a second MOS transistor connected in parallel, a gate of the first MOS transistor is connected to the other end of the first driving resistor R21, a source of the first MOS transistor is connected to an EN pin of the charging chip U1, and a drain of the first MOS transistor is connected to the input module J2; the gate of the second MOS transistor is connected to the other end of the second driving resistor R22, the source thereof is connected to the EN pin of the charging chip U1, and the drain thereof is connected to the input module J2; and a driving filter capacitor C22 is connected between the source electrode and the drain electrode of the first MOS tube.
Preferably, the charging plug further comprises a ground protection module, wherein the ground protection module comprises a bidirectional transient voltage suppression diode T3, one end of the bidirectional transient voltage suppression diode T3 is connected with pin No. 1 of the charging plug, and the other end of the bidirectional transient voltage suppression diode T3 is grounded.
Preferably, the charging module further comprises a filter module, the filter module comprises a first filter capacitor C27 and a second filter capacitor C24, one end of the first filter capacitor C27 is connected to a line between the charging plug J1 and the charging chip U1, and the other end of the first filter capacitor C27 is grounded; one end of the second filter capacitor C24 is connected to the line between the switch module and the output plug J2, and the other end is grounded.
The beneficial effects of the utility model reside in that: the utility model provides a parallelly connected charging circuit of battery of optimization adopts independent charging circuit unit separately to carry out charge control to every battery monomer, all has respective charging chip in the charging circuit unit, not only can accomplish mutual isolation, and the break-make that can independent control charges for the complementary interference of charging of different batteries. The utility model discloses a charging circuit has low drain electrode and low pressure drop, and has reverse protect function.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention;
fig. 2 is a schematic diagram of a charging circuit unit.
Detailed Description
The technical solution protected by the present invention will be specifically described below with reference to the accompanying drawings.
Please refer to fig. 1-2. The utility model provides an optimized parallel battery charging circuit, which comprises a charging plug J1 and a plurality of output plugs J2; the utility model discloses a charger, including charging plug J1 and single be provided with the charging circuit unit between the output plug, the charging circuit unit includes charging chip U1, protection module 10, switch module 20 and drive module 30, protection module 10 switch module 20 with drive module 30 with charging chip U1 connects, switch module 20 with drive module 30 connects.
The model of the charging chip U1 is PLM74700QDBVTQ1, and the charging chip U1 can control other modules, so that the charging of one battery cell is controlled; the charging plug J1 is used for connecting an external charging device, and is XT60 PW-F; the output plugs J2 are respectively connected with the battery cells, and the model number of the output plugs is XT60 PW-M; the protection module 10 is used for preventing the MOS transistor in the switch module 20 from being burned out, the switch module 20 is used for controlling the on-off of the charging, and the driving module 30 is a driving resistor of the base of the MOS transistor in the switch module 20.
In one embodiment, the protection module 10 includes a zener diode ZD7 and a protection resistor R23 connected in parallel; the anode of the zener diode ZD7 is connected to an EN pin of the charging chip U1, the on/off of the charging circuit of each battery cell can be independently controlled through the EN pin, and the cathode of the zener diode ZD7 is connected to the driving module 30.
Specifically, the driving module 30 includes a first driving resistor R21 and a second driving resistor R22 connected in parallel, and one end of the first driving resistor R21 and one end of the second driving resistor R22 are connected in series with a third driving resistor R27 and then connected to a GATE pin of the charging chip U1; the other ends of the first driving resistor R21 and the second driving resistor R22 are connected to the switch module 20.
The switch module 20 includes a first MOS transistor and a second MOS transistor connected in parallel, the first MOS transistor Q11 and the second MOS transistor Q13 are MOS transistors with inverse parallel diodes, a gate of the first MOS transistor Q11 is connected to the other end of the first driving resistor R21, a source thereof is connected to an EN pin of the charging chip U1, and a drain thereof is connected to the output plug J2; the gate of the second MOS transistor Q13 is connected to the other end of the second driving resistor R22, the source thereof is connected to the EN pin of the charging chip U1, and the drain thereof is connected to the output plug J2; and a driving filter capacitor C22 is connected between the source electrode and the drain electrode of the first MOS transistor Q11.
In one embodiment, the VCAP pin of the charging chip U1 is connected to the output terminal 1 of the charging plug J1 through a pull-up resistor C26; an EN pin of the charging chip U1 is connected to an anode of the zener diode ZD7 of the protection module 10 and one end of the protection resistor R23, and is connected to a source of the first MOS transistor Q11 and a source of the second MOS transistor Q13 of the switch module 20; the A pin of the charging chip U1 is connected with the charging plug J1; the C pin of the charging chip U1 is connected with the output plug J2; the GATE pin of the charging chip U1 is connected with the driving module; the GND pin of the charging chip U1 is grounded.
In addition, the charging circuit further includes a ground protection module 40, the ground protection module 40 includes a bidirectional transient voltage suppression diode T3, one end of the bidirectional transient voltage suppression diode T3 is connected to pin No. 1 of the charging plug, and the other end thereof is grounded.
Preferably, each charging circuit unit further comprises a filter module, the filter module comprises a first filter capacitor C27 and a second filter capacitor C24, one end of the first filter capacitor C27 is connected to a line between the charging plug J1 and the charging chip U1, and the other end of the first filter capacitor C27 is grounded; one end of the second filter capacitor C24 is connected to the line between the switch module 20 and the output plug J2, and the other end is grounded.
The above only is the embodiment of the present invention, not limiting the patent scope of the present invention, all the equivalent structures or equivalent processes that are used in the specification and the attached drawings or directly or indirectly applied to other related technical fields are included in the patent protection scope of the present invention.
Claims (7)
1. An optimized parallel battery charging circuit is characterized by comprising a charging plug J1 and a plurality of output plugs J2, wherein the charging plug J1 is used for connecting external charging equipment, and the plurality of output plugs J2 are respectively connected with a battery cell; a charging circuit unit is arranged between the charging plug J1 and the single output plug, the charging circuit unit comprises a charging chip U1, a protection module, a switch module and a driving module, the protection module, the switch module and the driving module are connected with the charging chip U1, and the switch module is connected with the driving module; the model of the charging chip U1 is PLM74700QDBVTQ 1.
2. The optimized parallel battery charging circuit as claimed in claim 1, wherein the VCAP pin of the charging chip U1 is connected to the output terminal 1 of the charging plug J1 through a pull-up resistor C26; the EN pin of the charging chip U1 is connected with the protection module and the switch module; the A pin of the charging chip U1 is connected with the charging plug J1; the C pin of the charging chip U1 is connected with the output plug J2; the GATE pin of the charging chip U1 is connected with the driving module; the GND pin of the charging chip U1 is grounded.
3. The optimized parallel battery charging circuit according to claim 2, wherein the protection module comprises a zener diode ZD7 and a protection resistor R23 connected in parallel; the anode of the zener diode ZD7 is connected to the EN pin of the charging chip U1, and the cathode of the zener diode ZD7 is connected to the driving module.
4. The optimized parallel battery charging circuit as claimed in claim 3, wherein the driving module includes a first driving resistor R21 and a second driving resistor R22 connected in parallel, one end of the first driving resistor R21 and one end of the second driving resistor R22 are connected in series with a third driving resistor R27 and then connected to a GATE pin of the charging chip U1; the other ends of the first driving resistor R21 and the second driving resistor R22 are connected with the switch module.
5. The optimized parallel battery charging circuit according to claim 4, wherein the switch module comprises a first MOS transistor and a second MOS transistor connected in parallel, the gate of the first MOS transistor is connected to the other end of the first driving resistor R21, the source of the first MOS transistor is connected to the EN pin of the charging chip U1, and the drain of the first MOS transistor is connected to the output plug J2; the gate of the second MOS transistor is connected to the other end of the second driving resistor R22, the source thereof is connected to the EN pin of the charging chip U1, and the drain thereof is connected to the output plug J2; and a driving filter capacitor C22 is connected between the source electrode and the drain electrode of the first MOS tube.
6. The optimized parallel battery charging circuit as claimed in claim 1, further comprising a ground protection module, wherein the ground protection module comprises a bi-directional transient voltage suppression diode T3, one end of the bi-directional transient voltage suppression diode T3 is connected to pin No. 1 of the charging plug, and the other end is grounded.
7. The optimized parallel battery charging circuit as claimed in claim 1, further comprising a filter module, wherein the filter module comprises a first filter capacitor C27 and a second filter capacitor C24, one end of the first filter capacitor C27 is connected to the line between the charging plug J1 and the charging chip U1, and the other end is grounded; one end of the second filter capacitor C24 is connected to the line between the switch module and the output plug J2, and the other end is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922389096.6U CN211405529U (en) | 2019-12-26 | 2019-12-26 | Optimized parallel battery charging circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922389096.6U CN211405529U (en) | 2019-12-26 | 2019-12-26 | Optimized parallel battery charging circuit |
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| Publication Number | Publication Date |
|---|---|
| CN211405529U true CN211405529U (en) | 2020-09-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922389096.6U Active CN211405529U (en) | 2019-12-26 | 2019-12-26 | Optimized parallel battery charging circuit |
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|---|---|
| CN (1) | CN211405529U (en) |
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2019
- 2019-12-26 CN CN201922389096.6U patent/CN211405529U/en active Active
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