CN211374910U - SOE resolution tester - Google Patents
SOE resolution tester Download PDFInfo
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- CN211374910U CN211374910U CN201921732604.XU CN201921732604U CN211374910U CN 211374910 U CN211374910 U CN 211374910U CN 201921732604 U CN201921732604 U CN 201921732604U CN 211374910 U CN211374910 U CN 211374910U
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- mcu
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- soe resolution
- soe
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Abstract
The utility model belongs to the technical field of SOE resolution tester and discloses an SOE resolution tester, MCU is used for sending out signals; the logic control circuit is used for receiving a signal sent by the MCU; the logic control circuit comprises KOUT; the signal that MCU sent passes through KOUT and transmits to logic chip U140, and logic chip U140 passes through DO output, and after opto-coupler isolation, the remote signaling loop of the device under test is again connected by the terminal external. The utility model discloses utilize MCU to send control command, the logic circuit of drive outside keeps apart through the opto-coupler, realizes quick output reaction, fine improvement the interference killing feature, easy operation realizes the function that the former value several tens of thousands of equipment possessed with the cost light of a two thousand yuan.
Description
Technical Field
The utility model relates to a SOE resolution ratio tester technical field especially relates to a SOE resolution ratio tester.
Background
The original SOE resolution tester has high equipment price, generally the selling price is about 8 ten thousand, the invention directly utilizes the existing FTU core unit, the cost is low, only 1500 yuan, and the precision and the performance are higher.
The prior SOE resolution tester equipment has poor anti-interference capability, and the SOE test can damage the channel of the equipment when electricity is subjected to fast transient.
The original SOE resolution tester equipment is inconvenient to wire, and the wire is thin and easy to break due to the adoption of parallel connection, so that the wire is inconvenient to wire.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to overcome current defect, provide a SOE resolution ratio tester, utilize MCU to send control command, the logic circuit of drive outside keeps apart through the opto-coupler, realizes the quick output reaction, fine improvement the interference killing feature, easy operation realizes the function that the former value several tens of thousands of equipment possess with the cost of one or two thousand yuan is light, can effectively solve the problem in the background art.
In order to solve the technical problem, the utility model provides a following technical scheme:
the utility model provides a SOE resolution ratio tester, include:
the MCU is used for sending out signals;
the logic control circuit is used for receiving a signal sent by the MCU;
the logic control circuit includes:
KOUT；
and the signal sent by the MCU passes through the KOUT and is transmitted to the logic chip U140, and the logic chip U140 is output through the DO, is isolated by the optical coupler and is externally connected with a remote signaling loop of the tested device through a terminal.
As a preferable technical proposal of the utility model, the KOUT is composed of KOUT 0-KUOT 7 and is connected in parallel.
As a preferable technical solution of the present invention, the DO is constituted by DO0 to DO7, and are connected in parallel with each other.
As a preferred technical scheme of the utility model, the model of opto-coupler is SFH619A-X009T, and the opto-coupler is provided with a plurality ofly in parallel.
As a preferred technical solution of the present invention, the MCU model is sn74abt 162244.
As a preferred technical solution of the present invention, the logic chip U140 is SN74HC04 DR.
The utility model discloses in the one or more technical scheme that provides, following technological effect or advantage have at least:
the MCU is used for sending a control command to drive an external logic circuit, and quick output response is realized through optical coupling isolation, so that the anti-interference capability is well improved, the operation is simple, and the functions of tens of thousands of original devices can be easily realized at the cost of one thousand yuan.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention.
In the drawings:
FIG. 1 is a circuit diagram of an MCU of an SOE resolution tester according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a logic chip of an SOE resolution tester according to an embodiment of the present invention;
FIG. 3 is a logic control circuit diagram of an SOE resolution tester according to an embodiment of the present invention;
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
In the description of the present invention, it is to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are merely for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
For better understanding of the above technical solutions, the following detailed descriptions will be provided in conjunction with the drawings and the detailed description of the present invention.
Example (b):
referring to fig. 1-3, the present invention provides an SOE resolution tester, which includes:
the MCU is used for sending out signals;
the logic control circuit is used for receiving a signal sent by the MCU;
the logic control circuit includes:
KOUT；
the signal sent by the MCU passes through the KOUT and is transmitted to the logic chip U140, and the logic chip U140 is output through the DO, is isolated by the optical coupler and is externally connected with a remote signaling loop of the tested device through a terminal; the KOUT is composed of KOUT 0-KUOT 7, and the KOUT and the KUOT are mutually connected in parallel; the DO is composed of DO 0-DO 7 and is connected in parallel; the type of the optical coupler is SFH619A-X009T, and the optical coupler is provided with a plurality of optical couplers in parallel; the MCU model is sn74abt 162244; the logic chip U140 is SN74HC04 DR.
When the device is used, signals emitted by the MCU, namely KOUT 0-KUOT 7, pass through a logic chip U140 to output DO 0-DO 7, are isolated by an optical coupler to output DO _ 0-DO _7, and then are externally connected with a remote signaling loop of a tested device through a terminal to finish the resolution test of the SOE;
the logic chip is connected with a 220V power supply, passes through a resistor R274 and then is transmitted to R96, and then outputs 5V voltage.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
1. An SOE resolution tester is characterized in that: the method comprises the following steps:
the MCU is used for sending out signals;
the logic control circuit is used for receiving a signal sent by the MCU;
the logic control circuit includes:
KOUT；
and the signal sent by the MCU passes through the KOUT and is transmitted to the logic chip U140, and the logic chip U140 is output through the DO, is isolated by the optical coupler and is externally connected with a remote signaling loop of the tested device through a terminal.
2. The SOE resolution tester of claim 1, wherein: the KOUT is composed of KOUT 0-KUOT 7, and they are connected in parallel.
3. The SOE resolution tester of claim 2, wherein: the DO is composed of DO 0-DO 7 and is connected in parallel with each other.
4. An SOE resolution tester according to claim 3, wherein: the type of the optical coupler is SFH619A-X009T, and the optical coupler is provided with a plurality of optical couplers in parallel.
5. The SOE resolution tester of claim 4, wherein: the MCU model is sn74abt 162244.
6. The SOE resolution tester of claim 5, wherein: the logic chip U140 is SN74HC04 DR.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921732604.XU CN211374910U (en) | 2019-10-15 | 2019-10-15 | SOE resolution tester |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921732604.XU CN211374910U (en) | 2019-10-15 | 2019-10-15 | SOE resolution tester |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211374910U true CN211374910U (en) | 2020-08-28 |
Family
ID=72151095
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921732604.XU Active CN211374910U (en) | 2019-10-15 | 2019-10-15 | SOE resolution tester |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211374910U (en) |
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2019
- 2019-10-15 CN CN201921732604.XU patent/CN211374910U/en active Active
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