CN211320082U - Component carrier - Google Patents

Abstract

The utility model relates to a part carrier (100), wherein, this part carrier (100) includes: a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); and a thermal via (108) formed in at least one of the at least one electrically insulating layer structure (106) along a horizontal path having a length (L) greater than a horizontal width (W), the thermal via (108) being at least partially filled with a thermally conductive filler (110).

Description

Component carrier

Technical Field

The utility model relates to a part holds carrier with hot via hole of horizontal elongated.

Background

In the context of increasing product functionality of component carriers equipped with one or more electronic components, and increasing miniaturization of such components, and increasing number of components to be mounted on component carriers (e.g. printed circuit boards), increasingly functional packages or assemblies with components are employed which have a plurality of contact or connection portions with smaller spacings between them. The removal of heat generated by these components and the component carriers themselves becomes an increasingly serious problem during running operation. At the same time, the component carrier should be mechanically robust and electrically reliable in order to be operable even under severe conditions. All of these requirements are driven by the continued miniaturization of component carriers and their components.

Furthermore, it is advantageous to remove heat effectively from the interior of the component carrier.

Therefore, there is a need for a component carrier that allows for efficient removal of heat from the interior of the component carrier.

SUMMERY OF THE UTILITY MODEL

According to the utility model discloses, a part holds carrier is provided, wherein, this part holds carrier and includes: a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; and a thermal via formed in at least one of the at least one electrically insulating layer structure along a horizontal path having a length greater than a horizontal width, the thermal via at least partially filled with a thermally conductive filler.

Furthermore, a method of manufacturing a component carrier is disclosed, wherein the method comprises: providing a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; and forming thermal vias in at least one of the at least one electrically insulating layer structure along a horizontal path having a length greater than a horizontal width (wherein the length direction and the width direction may extend in a horizontal plane and are perpendicular to each other); and filling the via hole at least partially with a thermally conductive filler.

In the context of the present application, the term "component carrier" may particularly denote any support structure capable of accommodating one or more components thereon and/or therein to provide mechanical support and/or electrical connection. In other words, the component carrier may be configured as a mechanical carrier and/or as an electronic carrier for the components. In particular, the component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. The component carrier may also be a hybrid board combining different ones of the above-mentioned types of component carriers.

In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of non-continuous islands in a common plane.

In the context of the present application, the term "stack" may particularly denote an arrangement of a plurality of planar layer structures mounted in parallel on top of each other.

In the context of the present application, the term "via" may particularly denote a hole extending through at least a part of the layer structure of the stack, and the hole may particularly and preferably be formed by laser machining. Thus, the via may be a laser via. The via hole may be manufactured, for example, by a single laser irradiation, or by a combination of laser irradiation from the front side and the back side, i.e. from the two opposite main surfaces of the layer structure. One or more laser shots may be made from each of these faces. It is also possible to form the via hole from only one main surface by laser machining. Furthermore, the formation of the via hole may also be performed by other methods than laser processing, for example, by plasma treatment.

In the context of the present application, the term "thermal via" may particularly denote a via configured and filled with a thermally conductive filler medium capable of removing heat generated by the component carrier during a running operation.

In the context of the present application, the term "thermally conductive filler" may particularly denote a metal, such as copper, filling at least a portion of the via. The thermally conductive filler may be formed by one or more filling procedures, such as electroless deposition, one or more plating procedures, and the like. The thermally conductive filler may be electrically conductive or may also be electrically non-conductive. For example, the thermally conductive filler medium may have a thermal conductivity of at least 10W/mK, in particular at least 50W/mK.

According to the utility model discloses, a part holds carrier is provided, and this part holds carrier has at least one via hole, and this via hole extends with the mode of elongated path in the horizontal plane. The at least one via may be filled with a thermally conductive material, such as copper, and the at least one via may be configured to remove heat from the component carrier during operation of the component carrier. Such heat may be generated by ohmic losses, for example, when electrical signals propagate along the electrically conductive layer structure of the component carrier. Accordingly, an embodiment provides a Printed Circuit Board (PCB) designer with an effective solution for improved thermal management. Advantageously, such a component carrier may be manufactured with standard PCB manufacturing equipment and may in particular involve a laser direct drilling process for creating a via and a copper plating procedure for filling the via with a thermally conductive material. According to the utility model discloses a part holds carrier can combine together efficient thermal management and slim design. Illustratively, horizontally elongated thermal vias may provide higher thermal contributions with lower workload and lower space consumption. For example, a slotted via filled with a thermally conductive material may provide better heat rejection performance than a plurality of individual circular vias.

Next, further exemplary embodiments of the component carrier and of the method will be explained.

In one embodiment, the via is a laser via formed by laser drilling. For example, laser drilling may be performed from only one side of the stack or from both opposing major surfaces of the stack.

In an embodiment, the via has tapered sidewalls in the depth direction (the depth direction is perpendicular to the length direction and the width direction). In particular, all sidewalls of the via may taper towards the interior of the stack. The sloped sidewalls may contribute to the heat dissipation function. Alternatively, the via may have vertical sidewalls in the depth direction.

In one embodiment, the via is substantially bathtub shaped. In particular, the bathtub-shaped via may be formed with tapered sidewalls in plan view in two perpendicular horizontal directions.

In one embodiment, the via is substantially W-shaped. Such a via may be formed, for example, by two laser shots that produce a tapered via connection, thereby forming a W-shaped via in cross-section.

In an embodiment, a plurality of (e.g., slotted) vias having the described features are provided in a vertically stacked arrangement. Thus, even a long thermal path from the interior of the component carrier to the outer main surface of the component carrier can be established by the thermal vias to further improve the efficiency of heat removal and electrical conduction.

In one embodiment, the vias are designed to conduct heat away from the component carrier. During operation of the component carrier, such heat may be generated by, for example, embedded components, such as semiconductor chips like microprocessors.

In an embodiment, the via is configured for conducting an electrical current and/or an electrical signal within the component carrier. Thus, in addition to its thermal function, the (e.g. metal-filled) vias may also contribute to the electrical connection inside the component carrier.

In one embodiment, the via has the shape of an oblong slot and is straight along its length. Such a structure can be easily manufactured by laser drilling.

In an embodiment, the via has a curved shape. For example, the via may have a circular segment, may be shaped as a ring, and the like.

In an embodiment, the ratio between the length and the width of the via in the horizontal plane is in the range between 1.5 and 5. Thus, the vias may be oblong, thereby significantly improving thermal performance.

In an embodiment, the ratio between the depth (in the vertical direction) and the width (in the horizontal plane) of the via is in the range between 10% and 90%. Therefore, the via hole can be formed with a small aspect ratio, thereby making space consumption in the vertical direction small.

In one embodiment, the via is formed by: the electrically conductive layer structure is opened by etching a window in the electrically conductive layer structure above the electrically insulating layer structure, and subsequently the exposed electrically insulating material is removed by (in particular low-energy) laser machining. Thus, opening the window in the copper foil can also be done with a laser beam.

In an embodiment, the via is formed by (in particular high energy) laser machining (in particular without prior window formation). Thus, the formation of both the windows and the holes in the electrically insulating layer structure for forming the vias can be accomplished by laser machining.

In an embodiment, the laser source, which may be operated for continuously emitting a laser beam, is moved relative to the electrically insulating layer structure during the forming of the via hole. Thus, a continuous trajectory of the laser source can be translated in an intuitive manner into a continuous trajectory of the laser vias in the horizontal plane.

In another embodiment, the laser source is moved between forming different laser shots only in adjacent (e.g. overlapping) surface portions of the electrically insulating layer structure and is fixed relative to the electrically insulating layer structure during each individual laser shot. Illustratively, the laser source may produce a series of frustoconical holes that connect to form elongated vias.

In an embodiment, the vias extend in a vertical direction from a horizontally extending trace. Thus, the vias may also help remove heat from the conductive traces carrying current that creates ohmic losses.

In an embodiment, the component carrier comprises components embedded in the stack and thermally and/or electrically coupled with the vias. In the context of the present application, the term "component" may particularly denote any inlay to be integrated in a cavity of a component carrier stack. The inlay may fulfill an electrical function and may be connected to one or more conductive layer structures of the stack via one or more pads thereof. In the described embodiments, the thermally conductive filler of the vias may also help to remove heat during operation of the component carrier with embedded components.

In an embodiment, the component embedded in the stack may be in contact with a plurality of (e.g. slotted) vias having the described features. This may further improve electrical coupling performance and heat removal capability.

In one embodiment, the thermal vias are electrically inactive. Thus, the thermal vias may be arranged in the component carrier so as to be separated from any electrical current. In such embodiments, the thermal vias may be specifically configured for thermal management.

In an embodiment, the component carrier comprises a stack of an electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the above-described electrically insulating layer structure and electrically conductive layer structure(s), in particular formed by applying mechanical pressure and/or thermal energy. The mentioned stack may provide a component carrier in the form of a plate which is capable of providing a large mounting surface for the component and which is still very thin and compact.

In one embodiment, the component carrier is shaped as a plate. This contributes to a compact design, wherein the component carrier still provides a large base for mounting components thereon. Furthermore, particularly a bare die, which is an example of an embedded or surface-mounted electronic component, can be easily embedded in or on a thin board such as a printed circuit board thanks to its small thickness.

In one embodiment, the component carrier is configured as one of a printed circuit board and a substrate (in particular an IC substrate).

In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-like component carrier formed by a number of electrically conductive layer structures and a number of electrically insulating layer structures, for example by applying pressure and/or by supplying thermal energy. As a preferred material for PCB technology, the electrically conductive layer structure is made of copper, while the electrically insulating layer structure may comprise resin and/or glass fibres, so-called prepregs, such as FR4 material. The various conductive layer structures can be connected to each other in a desired manner by the following process: a through hole is formed through the laminate, for example by laser drilling or mechanical drilling, and the via hole is formed as a through hole connection by filling the through hole with a conductive material, in particular copper. In addition to one or more components that may be embedded in a printed circuit board, printed circuit boards are typically configured to receive one or more components on one or both opposing surfaces of a plate-like printed circuit board. They may be attached to the respective major surfaces by welding. The dielectric portion of the PCB may be composed of a resin with reinforcing fibers, such as glass fibers.

In the context of the present application, the term "substrate" may particularly denote a small component carrier having substantially the same dimensions as the components (particularly electronic components) to be mounted on the component carrier. More specifically, a baseplate may be understood as a carrier for electrical connections or networks and a component carrier comparable to a Printed Circuit Board (PCB), but with a comparatively high density of laterally and/or vertically arranged connections. The lateral connections are, for example, conductive paths, while the vertical connections may be, for example, boreholes. These lateral and/or vertical connections are arranged within the substrate and may be used to provide electrical and/or mechanical connection of a received or non-received component (e.g. of an IC chip), in particular, to a printed circuit board or an intermediate printed circuit board. Thus, the term "substrate" may also include "IC substrates". The dielectric portion of the substrate may be composed of a resin with reinforcing balls, such as glass balls.

In an embodiment, the respective electrically insulating layer structure comprises at least one of: resins (such as reinforced or non-reinforced resins, for example epoxy or bismaleimide-triazine resins), cyanate esters, polyphenylene derivatives, glass (especially glass fibers, multiple layers of glass, glass-like materials), prepregs (such as FR-4 or FR-5), polyimides, polyamides, Liquid Crystal Polymers (LCP), epoxy-based laminates or reinforced films, polytetrafluoroethylene (teflon), ceramics and metal oxides. Reinforcing materials made of glass (multiple layer glass), such as meshes, fibers or spheres, for example, may also be used. While prepreg, and in particular FR4, is generally preferred for rigid PCBs, other materials, in particular epoxy-based reinforcement films for substrates, may also be used. For high frequency applications, high frequency materials such as polytetrafluoroethylene, liquid crystal polymers and/or cyanate ester resins, low temperature co-fired ceramics (LTCC) or other low DK materials, lower DK materials, ultra low DK materials, etc., may be applied in the component carrier as the electrically insulating layer structure.

In an embodiment, the respective conductive layer structure may include at least one of copper, aluminum, nickel, silver, gold, palladium, and tungsten. Although copper is generally preferred, other materials or coatings thereof are possible, particularly coated with superconducting materials such as graphene.

The at least one component may be selected from a non-conductive inlay, a conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (e.g. a heat pipe), a light guiding element (e.g. a light guide or light conductor connection), an electronic component or a combination thereof. For example, the component may be an active electronic component, a passive electronic component, an electronic chip, a storage device (e.g., DRAM or other data storage), a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a light emitting diode, an opto-coupler, a voltage converter (e.g., a DC/DC converter or an AC/DC converter), a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, a sensor, an actuator, a micro-electro-mechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may be embedded in the component carrier. For example, a magnetic element may be used as the component. Such magnetic elements may be permanent magnetic elements (such as ferromagnetic elements, antiferromagnetic elements, multiferroic elements or ferrimagnetic elements, e.g. ferrite cores) or may be paramagnetic elements. However, the component may also be a substrate, for example in a board-in-board configuration, an interposer or another component carrier. The component may be surface mounted on the component carrier and/or may be embedded inside the component carrier.

In an embodiment, the component carrier is a laminate type component carrier. In such an embodiment, the component carrier is a component of a multilayer structure that is stacked and connected together by the application of pressure and/or heat.

The substrate or interposer may be composed of at least one layer of glass, silicon (Si) or a photoimageable or dry etched organic material, such as an epoxy based laminate film or a polymer composite, such as polyimide, polybenzoxazole or benzocyclobutene.

After processing the inner layer structure of the component carrier, one or both of the opposite main surfaces of the processed layer structure may be covered (in particular by lamination) symmetrically or asymmetrically with one or more further electrically insulating layer structures and/or electrically conductive layer structures. In other words, the build-up (build-up) may be continued until the desired number of layers is obtained.

After completion of the formation of the stack of electrically insulating layer structures and electrically conductive layer structures, the obtained layer structure or component carrier may be subjected to a surface treatment.

In particular, in terms of surface treatment, an electrically insulating solder resist may be applied to one or both of the opposite main surfaces of the layer stack or the component carrier. For example, it is possible to form, for example, a solder resist on the entire main surface and then pattern the solder resist layer so as to expose one or more electrically conductive surface portions that will be used for electrically coupling the component carrier with the electronic periphery. It is possible to effectively prevent the surface portion of the component carrier, particularly the surface portion containing copper, which is covered with the solder resist from being kept free from oxidation or corrosion.

In the case of surface treatment, it is also possible to selectively apply a surface modification to the exposed electrically conductive surface portions of the component carrier. Such a surface modification may be an electrically conductive covering material on an electrically conductive layer structure (e.g. in particular pads, electrically conductive tracks, etc. comprising or consisting of copper) exposed on the surface of the component carrier. If such an exposed conductive layer structure is not protected, the exposed conductive component carrier material (in particular copper) may oxidize, making the component carrier less reliable. A surface modification may then be formed, for example as an interface between the surface mounted component and the component carrier. The surface modification has the following functions: the exposed conductive layer structure (particularly the copper circuitry) is protected and can be connected to one or more components, for example by soldering. Examples of suitable materials for surface modification are OSP (organic solderability preservative), Electroless Nickel Immersion Gold (ENIG), gold (especially hard gold), chemical tin, nickel-gold, nickel-palladium, and the like.

The above-described and other aspects of the present invention are apparent from and will be elucidated with reference to the embodiments described hereinafter. The present invention will be described in more detail hereinafter with reference to examples of embodiments, but the invention is not limited thereto.

Drawings

Fig. 1 shows a plan view of a component carrier according to the invention, and fig. 2 shows a cross-sectional view of the component carrier, wherein the component carrier has oblong copper-filled laser vias.

Fig. 3 shows a cross-sectional view of a component carrier with stacked oblong copper-filled laser vias according to the present invention.

Fig. 4 shows a plan view of a component carrier with oblong copper-filled laser vias according to the present invention.

Fig. 5 shows a plan view of a component carrier with an electrically conductive trace having an integrally disposed oblong copper-filled laser via, in accordance with the present invention.

Detailed Description

The illustration in the drawings is schematically. It should be noted that in different figures, similar or identical elements or features have the same reference numerals or reference numerals which differ from the corresponding reference numerals only in the first digit. In order to avoid unnecessary repetition, elements or features that have been explained with respect to previously described embodiments may not be explained again at later positions in this specification.

Furthermore, spatially relative terms, such as "front" and "rear," "upper" and "lower," "left" and "right," and the like, are used to describe the relationship of an element to another element or elements as illustrated in the figures. Spatially relative terms may therefore apply to the orientation in use, which may differ from that depicted in the figures. It will be apparent that all of these spatially relative terms are merely for convenience of description to refer to the orientation as shown in the figures and are not necessarily limiting, as a device according to embodiments of the present invention may assume, in use, an orientation that is different from those shown in the figures.

Before referring to the drawings, exemplary embodiments will be described in more detail, and some basic considerations will be outlined based on the exemplary embodiments of the invention that have been developed.

According to the utility model discloses, can provide a part bearing spare that has improved heat management based on design of blind via hole of microtank type. Such micro-grooved blind vias may be fabricated by, for example, a laser direct drilling process. Such micro-slotted blind vias have a larger contact surface area than a combination of two conventional vias for the same hole size, which may allow for better layer-to-layer heat transfer. The micro-groove type blind via hole can be produced through a laser direct drilling process using a laser drill without any specific adaptation. The correspondingly manufactured component carrier exhibits better heat transfer and therefore better reliability than conventional approaches. Such a component carrier may be implemented to better comply with today's small and thin PCB design requirements. According to the present invention, any layer designed PCB is possible.

Fig. 1 shows a plan view of a component carrier 100 according to the invention, and fig. 2 shows a cross-sectional view of the component carrier 100, said component carrier 100 having oblong copper-filled laser vias 108.

The component carrier 100 comprises a stack 102, which stack 102 comprises one or more electrically conductive layer structures 104 and one or more electrically insulating layer structures 106 (schematically shown). The electrically insulating layer structure 106 may comprise a resin, such as an epoxy resin, and optionally reinforcing particles, such as glass fibers or glass spheres. The electrically insulating layer structure 106 may for example be made of a fully cured FR4 material, i.e. a material with a resin that has been fully cross-linked and cannot be re-melted or made flowable by the application of mechanical pressure and/or heat. The conductive layer structure 104 may be a metal layer, such as a copper foil.

The thermal vias 108 are formed as blind holes in one of the electrically insulating layer structures 106 along a horizontal path, i.e. along a path in a horizontal plane of the component carrier 100. The thermal via 108 has a length L in the horizontal plane that is greater than a horizontal width W in the horizontal plane and has tapered sidewalls 112 in the depth D direction (perpendicular to the width and length directions). In addition, the thermal vias 108 are filled with a thermally conductive filler 110, such as copper. The vias 108 filled with the thermally conductive filler 110 are configured for thermally conducting heat away from the component carrier 100. Further, the vias 108 may be configured for conducting electrical current and/or electrical signals within the component carrier 100. The via 108 is a laser via formed by laser drilling. As particularly shown in fig. 2, the vias 108 are generally bathtub-shaped. As shown particularly in fig. 1, the via hole 108 has an oblong trough shape and is substantially straight along its length L. Alternatively, the via 108 may have a curved shape in a horizontal plane (not shown). The ratio between the length L and the width W of the via 108 may be in a range between 1.5 and 5. Further, the ratio between the depth D and the width W of the via 108 may be in a range between 10% and 90%.

For example, the via 108 may be formed by moving a laser source along a continuous trajectory, or as a series of laser shots in adjacent surface portions of the electrically insulating layer structure 106, thereby forming integrally connected circular recesses constituting the via 108.

The micro-slotted blind via 108 may have a size of 100 μm, where 80% of the via bottom can provide 15027 μm²When the dimension "X" is 40 μm. This may be about 50% more than a conventional micro blind via.

Fig. 3 illustrates a cross-sectional view of a component carrier 100 having stacked oblong copper-filled laser vias 108 in accordance with the present invention.

More specifically, fig. 3 shows a plurality of vias 108 having the described features and disposed in a vertically stacked arrangement. By taking this measure, a larger contact area and thus an increased heat transfer capacity can be achieved. The heat removal function is shown by the arrows in fig. 3.

Fig. 4 shows a plan view of a component carrier 100 having oblong copper-filled laser vias 108 in accordance with the present invention. Fig. 4 compares horizontally and vertically aligned oblong straight vias 108 according to an exemplary embodiment with a conventional array of vias 109 having a circular cross-section.

As shown, the vias 108 of the present invention form regions of high via density. Illustratively, two conventional vias 109 may be combined into one via 108. This allows for enhanced heat transfer capability without additional spacing.

Fig. 5 shows a plan view of a component carrier 100 with an electrically conductive trace 150 according to the invention, the electrically conductive trace 150 having an integrally arranged oblong copper-filled laser via 108. The conductive traces 150 are connected to vertically extending pads 152 and are configured to conduct electrical power or signals. The formed elongated thermal vias 108 integral with the conductive traces 150 enhance the heat rejection function of the component carrier 100. Thus, thermal vias 108 having horizontally elongated traces may be formed within the traces 150. More specifically, thermal vias 108 may be punched within traces 150. This makes it possible to obtain a better heat transfer without any additional spacing requirements.

Further, component 116 may be embedded in stack 102 and component 116 is contacted by vias 108 and/or by traces 150.

It should be noted that the term "comprising" or "comprises" does not exclude other elements or steps and the "a" or "an" does not exclude a plurality. Also elements described in association with different embodiments may be combined. It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims. The implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. On the contrary, the solution shown and many variants according to the principles of the invention can be used even in the case of substantially different embodiments.

Claims (13)

1. A component carrier (100), characterized in that the component carrier (100) comprises:

a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); and

a thermal via (108) formed in at least one of the at least one electrically insulating layer structure (106) along a horizontal path having a length (L) greater than a horizontal width (W), the thermal via (108) being at least partially filled with a thermally conductive filler (110).

2. The component carrier (100) of claim 1, wherein the thermal via (108) is a laser via formed by laser drilling.

3. The component carrier (100) according to claim 1, wherein the thermal via (108) has a tapered sidewall (112) in a depth (D) direction.

4. The component carrier (100) according to claim 1, wherein the thermal vias (108) are formed with vertical side walls in the depth (D) direction.

5. The component carrier (100) of claim 1, wherein the thermal vias (108) extend in a vertical direction from a horizontally extending trace (150).

6. The component carrier (100) according to claim 1, wherein the component carrier (100) comprises a component (116) embedded in the stack (102) and thermally and/or electrically coupled to the thermal via (108).

7. The component carrier (100) according to claim 1, wherein a plurality of thermal vias (108) are provided in a vertically stacked arrangement, each thermal via being formed in at least one of the at least one electrically insulating layer structure (106) along a horizontal path having a length (L) greater than a horizontal width (W), and each thermal via (108) being at least partially filled with a thermally conductive filler (110).

8. The component carrier (100) according to claim 1, wherein the thermal vias (108) are filled with copper.

9. The component carrier (100) of claim 1, wherein the thermal via (108) is formed as a series of frustoconical holes in adjacent surface portions of at least one of the at least one electrically insulative layer structure (106), thereby forming connected circular recesses that make up the thermal via (108).

10. The component carrier (100) of claim 1, wherein the thermal vias (108) have an oblong slot shape and a straight shape along their length (L).

11. The component carrier (100) of claim 1, wherein the thermal vias (108) have a curved shape.

12. The component carrier (100) according to claim 1, wherein a ratio between a length (L) and a width (W) of the thermal via (108) is in a range between 1.5 and 5.

13. The component carrier (100) according to claim 1, wherein a ratio between a depth (D) and a width (W) of the thermal via (108) is in a range between 10% and 90%.

Images