CN211297160U - Integrated circuit - Google Patents
Integrated circuit Download PDFInfo
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- CN211297160U CN211297160U CN201921998423.1U CN201921998423U CN211297160U CN 211297160 U CN211297160 U CN 211297160U CN 201921998423 U CN201921998423 U CN 201921998423U CN 211297160 U CN211297160 U CN 211297160U
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- capacitors
- circuit board
- printed circuit
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Abstract
The utility model discloses an integrated form circuit, it includes: a printed circuit board; install in capacitor array on the printed circuit board, it is including a plurality of electric capacity, and every electric capacity includes first stitch and second stitch, wherein, has two electric capacities at least to form a set of, a plurality of electric capacities form the multiunit, and one of them electric capacity in every group electric capacity is located the top of another electric capacity, and two electric capacities in every group electric capacity are in projection on the printed circuit board overlaps, and the first stitch of two electric capacities in every group electric capacity is installed after closing on the first welding point on the printed circuit board, and the second stitch of two electric capacities in every group electric capacity is installed respectively in second welding point and third welding point on the printed circuit board. In this way, area on the printed circuit board can be saved.
Description
[ technical field ] A method for producing a semiconductor device
The utility model belongs to the technical field of the circuit and specifically relates to a be used for integrated form circuit is related to.
[ background of the invention ]
The plug-in components are mainly welded on a Printed Circuit Board (PCB), and aiming at two plug-in components with similar functions in a circuit, if only one plug-in component is used (the other plug-in component is standby or alternative), the two plug-in components are usually arranged on the PCB at the same time, and the two plug-in components occupy a large space on the PCB, so that the size of the PCB is increased, and the cost is increased.
Fig. 1 illustrates a prior art capacitor array layout scheme, in which the capacitor arrays are arranged side by side on a PCB. As shown in fig. 1, two rows of card capacitors are arranged side by side, the first row is three capacitors C1623, C1622 and C1624, and the second row is three capacitors C1603, C1604 and C1607. In the example, the two rows of capacitors are different in package size and similar in function, and one group of capacitors is selected and installed according to the function to be realized when the PCB is manufactured. The layout occupies a large space as can be seen from the figure, and the finished product looks not compact and beautiful.
Therefore, there is a need to provide a new and improved solution to overcome the above problems.
[ summary of the invention ]
The to-be-solved technical problem of the utility model is to provide an integrated form circuit, it stacks two electric capacity and installs on printed circuit board, keeps the coincidence of plug-in components and parts encapsulation one end hole site, and the other end does not make the requirement, the area of saving printed circuit board that like this can be great.
In order to solve the above problem, according to an aspect of the present invention, the present invention provides an integrated circuit, which includes: a printed circuit board; install in capacitor array on the printed circuit board, it is including a plurality of electric capacity, and every electric capacity includes first stitch and second stitch, wherein, has two electric capacities at least to form a set of, a plurality of electric capacities form the multiunit, and one of them electric capacity in every group electric capacity is located the top of another electric capacity, and two electric capacities in every group electric capacity are in projection on the printed circuit board overlaps, and the first stitch of two electric capacities in every group electric capacity is installed after closing on the first welding point on the printed circuit board, and the second stitch of two electric capacities in every group electric capacity is installed respectively in second welding point and third welding point on the printed circuit board.
Compared with the prior art, the utility model discloses in stack two electric capacity and install on printed circuit board, keep plug-in components and parts encapsulation one end hole site coincidence, the other end does not require, the area of saving printed circuit board that like this can be great.
With regard to other objects, features and advantages of the present invention, the following detailed description will be made in conjunction with the accompanying drawings.
[ description of the drawings ]
The present invention will be more readily understood by reference to the following detailed description when considered in conjunction with the accompanying drawings, wherein like reference numerals designate like structural elements, and in which:
FIG. 1 illustrates a prior art capacitor array arrangement;
fig. 2 is an integrated circuit of the capacitor array arrangement according to the present invention;
fig. 3 is an outline view of a capacitor according to the present invention.
[ detailed description ] embodiments
In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one implementation of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. The term "a plurality" or "a plurality" in the present invention means two or more than two. In the present invention, "and/or" means "and" or ".
The utility model provides an integrated form circuit, it stacks two electric capacities and installs on printed circuit board, keeps plug-in components and parts encapsulation one end hole site coincidence, and the other end does not make the requirement, the area of saving printed circuit board that like this can be great.
Fig. 2 is an integrated circuit in which the capacitor array is arranged according to the present invention. As shown in fig. 2, the integrated circuit includes: a printed circuit board; and the capacitor array is arranged on the printed circuit board and comprises a plurality of capacitors.
The plurality of capacitors form a plurality of groups, each group including at least two capacitors. As shown in fig. 2, a capacitor C1604 and a capacitor C1624 form a set, a capacitor C1603 and a capacitor C1622 form a set, and a capacitor C1606 and a capacitor C1623 form a set. In other embodiments, there may be more capacitors, and three or more capacitors may form a group. One of the capacitors of each set is located above the other capacitor, and the projections of the two capacitors of each set onto the printed circuit board overlap. In other words, the two capacitors are stacked together in a direction perpendicular to the printed circuit board, which can greatly reduce the occupied area of the printed circuit board.
For example, C1604 may be placed above C1624, although it is understood that C1624 may also be placed above C1604. At least a portion of the sets of capacitors are connected in parallel through the printed circuit board, such as the left set and the middle set of capacitors shown in fig. 3.
As shown in fig. 3, each capacitor includes a first pin and a second pin. The first pins of the two capacitors in each group of capacitors are mounted on the first welding point 301 on the printed circuit board after being abutted and overlapped, and the second pins of the two capacitors in each group of capacitors are respectively mounted on the second welding point 302 and the third welding point 303 on the printed circuit board. The first, second and third welding points are spaced from each other.
Specifically, the first pins of the two capacitors in each group of capacitors are mounted on the first surface of the first welding point of the printed circuit board through a surface mounting process after being abutted and overlapped. At this time, the printed circuit board is provided with a single-sided pad at a first welding point. By doing so, drilling a hole twice on the PCB can be avoided, saving time and cost.
And second pins of two capacitors in each group of capacitors respectively pass through the mounting holes on the printed circuit board and then are welded to a second welding point 302 and a third welding point 303 on the printed circuit board.
As shown in fig. 3, the distance between the first pin and the second pin of the two capacitors of each group of capacitors is different, and the pin sizes of the two capacitors of each group of capacitors are also different.
In the present invention, the terms "connected", connecting ", and" connecting "mean electrically connected, and if there is no specific description, they mean directly or indirectly electrically connected. As used herein, "coupled" refers to indirect or direct electrical connections, which may be through one or more electrical devices (e.g., resistors, capacitors, inductors, etc.).
The foregoing description has disclosed fully the embodiments of the present invention. It should be noted that those skilled in the art can make modifications to the embodiments of the present invention without departing from the scope of the claims of the present invention. Accordingly, the scope of the claims of the present invention is not to be limited to the specific embodiments described above.
Claims (6)
1. An integrated circuit, comprising:
a printed circuit board;
a capacitor array mounted on the printed circuit board and including a plurality of capacitors, each capacitor including a first pin and a second pin,
wherein at least two capacitors form a group, the plurality of capacitors form a plurality of groups, one of the capacitors in each group is positioned above the other capacitor, the projections of the two capacitors in each group on the printed circuit board are overlapped,
the first pins of the two capacitors in each group of capacitors are arranged on the first welding point on the printed circuit board after being abutted and overlapped, and the second pins of the two capacitors in each group of capacitors are respectively arranged on the second welding point and the third welding point on the printed circuit board.
2. The integrated circuit of claim 1,
and the first pins of the two capacitors in each group of capacitors are closely overlapped and then are installed on the first surface of the first welding point of the printed circuit board through a surface mounting process.
3. The integrated circuit of claim 1,
and second pins of two capacitors in each group of capacitors respectively penetrate through the mounting holes on the printed circuit board and then are welded on a second welding point and a third welding point on the printed circuit board.
4. The integrated circuit of claim 1,
the distance between the first pin and the second pin of the two capacitors of each group of capacitors is different, and the pin sizes of the two capacitors of each group of capacitors are also different.
5. The integrated circuit of claim 1, wherein at least some of the bank capacitances are connected together in parallel by the printed circuit board.
6. The integrated circuit of claim 1, wherein the first, second, and third bonding points are spaced apart from one another.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921998423.1U CN211297160U (en) | 2019-11-14 | 2019-11-14 | Integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921998423.1U CN211297160U (en) | 2019-11-14 | 2019-11-14 | Integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211297160U true CN211297160U (en) | 2020-08-18 |
Family
ID=72020580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921998423.1U Active CN211297160U (en) | 2019-11-14 | 2019-11-14 | Integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211297160U (en) |
-
2019
- 2019-11-14 CN CN201921998423.1U patent/CN211297160U/en active Active
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