CN211296747U - IP network addressing central control machine - Google Patents
IP network addressing central control machine Download PDFInfo
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- CN211296747U CN211296747U CN202020091466.8U CN202020091466U CN211296747U CN 211296747 U CN211296747 U CN 211296747U CN 202020091466 U CN202020091466 U CN 202020091466U CN 211296747 U CN211296747 U CN 211296747U
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- 238000000034 method Methods 0.000 description 3
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Abstract
The utility model discloses a well controlling machine in IP network addressing, including well controlling machine main part, the top surface of well controlling machine main part is provided with chip draw-in groove and touch panel, and the chip draw-in groove is located one side of touch panel, the front end of well controlling machine main part is provided with the main control board, and the front end surface of main control board is provided with the ethernet interface, the surface of main control board is provided with audio interface, signal indicator and switch knob, audio interface is located one side of ethernet interface, and signal indicator is located the positive centre of audio interface and switch knob, the front end surface of well controlling machine main part is provided with monitor. The utility model discloses a give the address of operand in the instruction, can visit main memory in order to obtain the operand twice or more, set up one or more index register (length is decided by the addressing space of main memory, also can use general register as the index register) and be used for depositing the base address of array.
Description
Technical Field
The utility model relates to a well accuse machine technical field specifically is a well accuse machine in IP network addressing.
Background
IP addressing an automatic IP addressing technique for locating an IP address of a device, a technique for automatically obtaining a legitimate (i.e., valid) IP address by a device without the participation of a Dynamic Host Configuration Protocol (DHCP) server or other IP address assignment mechanism. If the types of the connected networks and the number of the connected networks are large, simple protocol conversion is relatively difficult, so that all the devices are specified to follow a network layer IP protocol, and an IP address of the network layer is added, the protocol of the network layer is independent of the IP address given by the protocol and network hardware, the protocol does not depend on hardware, that is, each computer of a hardware-independent local area network compiles an address according to the standard of the network layer IP protocol, the address is unique in the whole network, and therefore the technology of positioning the IP address of a certain device and automatically acquiring the legal (effective) IP address by the device in one network is realized without the participation of a Dynamic Host Configuration Protocol (DHCP) server or other IT address distribution mechanisms. Using this technique, the device may then select an IP address from the set of reserved IP addresses, and send a query to the local network to determine whether the address is being used by other clients.
The existing IP network addressing central control machine needs longer address codes, is not beneficial to realizing program circulation or array processing, and is also not beneficial to operation scheduling of an operating system, so that a novel IP network addressing central control machine is urgently needed to be developed.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a well accuse machine of IP network addressing to the well accuse machine of IP network addressing that proposes in solving above-mentioned background art needs longer address code, is unfavorable for realizing program cycle or array processing, also does not benefit to operating system's operation scheduling problem.
In order to achieve the above object, the utility model provides a following technical scheme: the utility model provides a IP network addressing well accuse machine, includes well accuse machine main part, the top surface of well accuse machine main part is provided with chip draw-in groove and touch panel, and the chip draw-in groove is located one side of touch panel, the front end of well accuse machine main part is provided with the main control board, and the front end surface of main control board is provided with the ethernet interface, the surface of main control board is provided with audio interface, signal indicator and switch knob, audio interface is located one side of ethernet interface, and signal indicator is located the positive centre of audio interface and switch knob, the front end surface of well accuse machine main part is provided with monitor, pass through electric connection between the output of well accuse machine main part and the input of register, pass through electric connection between register and the main accumulator, pass through electric connection between main accumulator and the communication client.
Preferably, a power socket is arranged on the surface of the main control panel and is located below the ethernet interface.
Preferably, the communication client is electrically connected with the network server.
Compared with the prior art, the beneficial effects of the utility model are that:
the utility model discloses a give the address of operand in the instruction, can visit main memory in order to obtain the operand twice or more, set up one or more index register (length is decided by the addressing space of main memory, also can use general register as index register) and be used for depositing the base address of array, under hardware support, dynamic positioning is in the program actual execution time, just form main memory physical address by hardware, before the program execution, needn't pack the whole program into the main memory, a program also can be distributed in a plurality of discrete main memory physical spaces, be favorable to improving the utilization ratio of quasi-memory; and multiple programs may share the same piece of program code in main memory; the dynamic positioning mode supports virtual memory.
Drawings
Fig. 1 is a schematic structural view of the present invention;
fig. 2 is a top view of the present invention;
fig. 3 is a front view of the present invention;
fig. 4 is a schematic block diagram of the present invention.
In the figure: 1. a main body of the central control machine; 2. a chip card slot; 3. a touch panel; 4. an Ethernet interface; 5. a power supply slot; 6. an audio interface; 7. a signal indicator light; 8. a power switch knob; 9. a main control board; 10. monitoring the probe; 11. a register; 12. a main reservoir; 13. a communication client; 14. a network server.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments.
Referring to fig. 1-4, the present invention provides an embodiment: an IP network addressing center control machine comprises a center control machine main body 1, a chip card slot 2 and a touch panel 3 are arranged on the top end surface of the center control machine main body 1, the chip card slot 2 is positioned on one side of the touch panel 3, a main control board 9 is arranged at the front end of the center control machine main body 1, an Ethernet interface 4 is arranged on the front end surface of the main control board 9, an audio interface 6 is arranged on the surface of the main control board 9, signal indicator light 7 and switch knob 8, audio interface 6 is located one side of ethernet interface 4, and signal indicator light 7 is located audio interface 6 and switch knob 8 in the middle of the centre, and the front end surface of well accuse machine main part 1 is provided with monitor 10, and through electric connection between the output of well accuse machine main part 1 and the input of register 11, through electric connection between register 11 and the main accumulator 12, through electric connection between main accumulator 12 and the communication client 13.
Further, a power slot 5 is arranged on the surface of the main control board 9, and the power slot 5 is located below the ethernet interface 4.
Further, the communication client 13 is electrically connected with the network server 14.
The working principle is as follows: when in use, the output end of the main body 1 of the central control machine is electrically connected with the input end of the register 11, the register 11 is electrically connected with the main storage 12, the main storage 12 is electrically connected with the communication client 13, one main memory 12 is usually composed of a plurality of independent memory modules (for example, 512M main memory is composed of two 256M memory banks), and two different addressing modes are usually provided for the modules: if the capacity of the main memory 12 is simply enlarged, an address code high-order cross addressing mode can be used, the high order of the address code represents different memory banks, and the low order represents the address in each memory bank, and the mode requires that each memory module has independent control components such as an address register, an address decoder, a driving circuit, an amplifying circuit, a read-write control circuit, a data register and the like, and even requires that the memory module has a check circuit and a high-speed buffer component; if it is required to increase the access speed of the memory, the low-order interleaved addressing mode of the address code can be used, the low-order part represents different memory modules, the high-order part represents internal addresses of different memory modules, different memory modules work in a pipeline mode to form a parallel memory, the main memory can be accessed for obtaining operands twice or more by giving the addresses of the operands in the instruction, and one or more index registers (the length is determined by the addressing space of the main memory 12, and general registers can also be used as index registers) are arranged for storing the base addresses of the arrays.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (3)
1. An IP network addressing center control machine comprises a center control machine main body (1) and is characterized in that a chip clamping groove (2) and a touch panel (3) are arranged on the top end surface of the center control machine main body (1), the chip clamping groove (2) is located on one side of the touch panel (3), a main control board (9) is arranged at the front end of the center control machine main body (1), an Ethernet interface (4) is arranged on the front end surface of the main control board (9), an audio interface (6), a signal indicator lamp (7) and a power switch knob (8) are arranged on the surface of the main control board (9), the audio interface (6) is located on one side of the Ethernet interface (4), the signal indicator lamp (7) is located in the middle of the audio interface (6) and the power switch knob (8), a monitoring probe (10) is arranged on the front end surface of the center control machine main body (1), and the output end of a register (11) of the center control machine main body (1) is electrically connected with the input end of the register (, the register (11) is electrically connected with the main storage (12), and the main storage (12) is electrically connected with the communication client (13).
2. The IP network addressing central control machine of claim 1, wherein: the surface of the main control board (9) is provided with a power supply slot (5), and the power supply slot (5) is positioned below the Ethernet interface (4).
3. The IP network addressing central control machine of claim 1, wherein: the communication client (13) is electrically connected with the network server (14).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020091466.8U CN211296747U (en) | 2020-01-16 | 2020-01-16 | IP network addressing central control machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020091466.8U CN211296747U (en) | 2020-01-16 | 2020-01-16 | IP network addressing central control machine |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211296747U true CN211296747U (en) | 2020-08-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020091466.8U Expired - Fee Related CN211296747U (en) | 2020-01-16 | 2020-01-16 | IP network addressing central control machine |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211296747U (en) |
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2020
- 2020-01-16 CN CN202020091466.8U patent/CN211296747U/en not_active Expired - Fee Related
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| Date | Code | Title | Description |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200818 |
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| CF01 | Termination of patent right due to non-payment of annual fee |