CN211296735U - Controller internal delay testing device - Google Patents

Controller internal delay testing device Download PDF

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Publication number
CN211296735U
CN211296735U CN201922492743.6U CN201922492743U CN211296735U CN 211296735 U CN211296735 U CN 211296735U CN 201922492743 U CN201922492743 U CN 201922492743U CN 211296735 U CN211296735 U CN 211296735U
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controller
bus
bus test
power supply
internal delay
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孙烨
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Zhejiang Geely Holding Group Co Ltd
Geely Automobile Research Institute Ningbo Co Ltd
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Zhejiang Geely Holding Group Co Ltd
Geely Automobile Research Institute Ningbo Co Ltd
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Abstract

The embodiment of the utility model discloses inside time delay testing arrangement of controller belongs to test technical field. Wherein the controller internal delay testing device comprises: the system comprises a bus test device and a programmable power supply, wherein the bus test device sends messages to a tested controller, the bus test device is connected with the tested controller, and the tested controller is also connected with the programmable power supply. The utility model discloses can realize automatic test, it is quick convenient, reduce test cost.

Description

Controller internal delay testing device
Technical Field
The utility model relates to a test technical field, in particular to inside time delay testing arrangement of controller.
Background
Since the advent of the CAN (Controller Area Network) bus technology, the application of the CAN bus technology to various vehicle models has increased, and it is important whether the physical layer performance of the CAN Controller meets the requirements of general protocols and host plants.
The internal delay time of the CAN controller represents the time at which the digital signal inside the controller is converted to an analog signal on the transceiver transmit bus. The internal delay time of the CAN controller limits the communication speed of the bus and the maximum distance between two nodes. It is therefore important to test the internal delay of the CAN control to ensure that it CAN arbitrate correctly or respond correctly during arbitration and during ACK (Acknowledge Character).
In the current method for testing the internal Delay of the CAN controller, a transmitting pin (TXD pin) and a receiving pin (RXD pin) for communicating a transceiver inside the CAN controller with an internal control Unit (MCU) need to be led out, and an oscilloscope is used for measuring a time difference between a falling edge (or rising edge) of the transmitting pin and a falling edge (or rising edge) of the receiving pin to obtain internal Delay time, such as Delay time Delay1 and Delay time Delay2 shown in fig. 1, which CAN only be completed by a CAN controller manufacturer. However, the CAN controllers provided by the current CAN controller suppliers to the host computer factory are generally complete products, and the host computer factory cannot lead out the sending pins and the receiving pins or connecting wires of the internal transceiver, so that the host computer factory cannot test the internal delay time of the CAN controllers.
Therefore, a delay testing device inside a controller is urgently needed, the delay time inside the CAN controller CAN be tested under the condition that a sending pin and a receiving pin are not led out, automatic testing CAN be achieved, and the device is quick and convenient.
SUMMERY OF THE UTILITY MODEL
The utility model provides an inside time delay testing arrangement of controller can realize automatic test, and is quick convenient, reduces the test cost.
The technical scheme is as follows:
the embodiment of the utility model provides an inside time delay testing arrangement of controller, it includes: the system comprises a bus test device and a programmable power supply, wherein the bus test device sends messages to a tested controller, the bus test device is connected with the tested controller, and the tested controller is also connected with the programmable power supply.
In the preferred embodiment of the present invention, the system further comprises a control device, and the control device is connected to the bus test device.
In a preferred embodiment of the present invention, the control device is a computer.
In the preferred embodiment of the present invention, the bus test device is connected to the measured controller through a twisted pair.
In the preferred embodiment of the present invention, a CANOE bus test tool is disposed in the bus test device.
In a preferred embodiment of the present invention, the supply voltage of the programmable power supply is between 13.6V and 14V.
In a preferred embodiment of the present invention, the programmable power supply is a dc power supply.
In a preferred embodiment of the present invention, the measured controller is a CAN controller.
The embodiment of the utility model provides a beneficial effect that technical scheme brought is:
the bus test equipment is connected with the measured and controlled controller, the bus test equipment sends a message to the measured and controlled controller, and the ACK response message given by the measured and controlled controller is collected and bit delay time is calculated, so that the test is carried out under the condition that a sending pin and a receiving pin are not led out, the integrity of a sample piece of the measured and controlled controller CAN be ensured, in addition, the operation of the scheme is convenient, automatic test is realized by using a CAN tool, the cost is further saved, and the solidification and popularization of the scheme are convenient.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
FIG. 1 is a waveform diagram of the internal delay time of a CAN controller;
fig. 2 is a main block diagram of an internal delay testing apparatus of a controller according to an embodiment of the present invention;
FIG. 3 is a flowchart of the steps for a bus test device to test the internal delay of a tested controller;
fig. 4 is a schematic structural diagram of a message sent by the bus test equipment.
Detailed Description
To further illustrate the technical means and effects of the present invention for achieving the objectives of the present invention, the following detailed description will be made with reference to the accompanying drawings and preferred embodiments of the present invention for the specific implementation, structure, features and effects of the internal delay testing device of the controller according to the present invention.
The foregoing and other features, aspects and utilities of the present invention will be apparent from the following more particular description of preferred embodiments of the invention as illustrated in the accompanying drawings. While the present invention has been described with reference to the embodiments, the drawings are for illustrative purposes only and are not intended to limit the present invention.
Fig. 2 is a block diagram of a main architecture of a controller internal delay testing apparatus according to an embodiment of the present invention. The controller internal delay testing device can realize automatic testing, is quick and convenient, and reduces testing cost. Referring to fig. 2, the apparatus for testing the internal delay of the controller of the present embodiment includes: a bus test device 11 and a programmable power supply 12.
Specifically, the bus test device 11 is connected to the measured controller 13, and is configured to send a message to the measured controller 13 in an analog manner, detect an ACK response message sent by the measured controller 13, and simulate bus interference, so as to test internal delay of the measured controller 13, where the measured controller 13 may be a CAN controller.
The bus test device 11 may be a bus test device of a model VH6510, and a CANOE bus test tool is arranged therein. The bus test equipment 11 may connect the tested controller 13 through a fixed length of twisted pair wire.
Preferably, the internal delay test device of the controller may further include a control device 10, where the control device 10 is connected to the bus test device 11 and is configured to control the bus test device 11 to test the tested controller 13. The control device 10 may be a computer or other control device.
Preferably, as shown in FIG. 3, the bus test device 11 testing the internal delay of the tested controller 13 may include the following steps 30-32:
step 30, the control device 10 controls the sampling point of the bus test device 11 to be set to 1% of the bit time, and the sampling point is the sampling position of the message, that is, the bus test device 11 collects the sampling position of the message sent by the measured controller 13.
Step 31, the bus test device 11 sends a message with ID 0x1, data length 8, and data field byte 0x55 to the measured controller 13, as shown in fig. 4, which is the structure of the message sent by the bus test device 11.
Step 32, the bus test equipment 11 monitors whether the tested controller 13 gives an ACK response message, if the tested controller 13 does not give the ACK response message (indicating that there is an error frame on the bus), the sampling point is increased by taking 1% as a step length, the steps 30 to 32 are repeated until the tested controller 13 gives the ACK response message (indicating that there is no error frame on the bus), and the bus test equipment 11 collects the ACK response message and records that the value of the sampling point at this time is% x. At this time, the bit delay time obtained by the bus test device 11 is T ═ Tbit × 0.01+ Tbit ×% x ═ 0.01 × (1+ x) × Tbit, Tbit is a transmission time of 1 bit, and the error range of the bit delay time T is between 0 and 0.01 × Tbit ═ 20 ns.
After the bus test equipment 11 sends the message to the measured controller 13, the measured controller 13 checks the consistency of the received message and performs an ACK response on the message with correct consistency (no padding error, CRC error, and format error), and changes the recessive level of the ACK bit of the received message to a dominant level (for example, a high level) when the ACK bit of the received message is responded.
The precondition that the measured controller 13 sends the ACK response message is as follows: the measured controller 13 detects the received message, and if a Cyclic Redundancy Check (CRC) delimiter bit is always detected, the received message is free from any errors (e.g., padding error, CRC error, and format error). And after the measured controller 13 receives the recessive level of the CRC delimiter, the measured controller 13 receives the recessive level of the CRC delimiter at 99% of the bit time, the measured controller 13 notifies a MAC (Multiple Access Channel) layer in the data link layer, and the MAC layer responds to the received message at the ACK bit, that is, the recessive level of the ACK bit is changed to the dominant level. The internal delay time of the measured controller 13 is generally required to be 30ns-400ns, so the error of the scheme is in an allowable controllable error range.
It should be noted that, the utility model discloses need the supplier when providing by measurement and control system 13, the sampling point that will be measured and control system 13 is configured into 99% through software mode etc. and this scheme only needs CAN accomplish the test to being measured and control system 13 with the help of bus test equipment 11, and bus test equipment 11 that the model is VH6510 has powerful programming development ability, utilize the CAN controller synchronous, the inside delay time is converted out to ACK response and sampling point mechanism, realize programming automation test very easily, the solidification and the popularization of the scheme of being convenient for.
The programmable power supply 12 can provide different direct current supply voltages, and the programmable power supply 12 is connected with the measured controller 13. Wherein, the programmable power supply 12 is a direct current power supply, and the power supply voltage of the programmable power supply 12 can be in the range of 13.8V + -0.2V, namely between 13.6V and 14V.
The working process of the internal delay testing device of the controller is described in detail as follows:
firstly, connecting a bus test device 11 and a measured controller 13 into a network through a twisted pair with a fixed length, then connecting the measured controller 13 and a programmable power supply 12 to form a loop, then setting the power supply voltage of the programmable power supply 13 to be 13.8 +/-0.2V, waiting for 5s until the communication is stable, and then performing step 30: setting the sampling point of the bus test device 11 to be 1% of the bit time, and then performing step 31: the bus test equipment 11 sends a message with an ID of 0x1, a data length of 8 and data field bytes of 0x55 to the tested controller, and then the step 32 is performed: the bus test equipment 11 monitors whether the tested controller 13 gives an ACK response message, if the tested controller 13 does not give the ACK response message (indicating that an error frame exists on the bus), the sampling point is increased by taking 1% as a step length, the steps 30-32 are repeated until the tested controller 13 gives the ACK response message (indicating that no error frame exists on the bus), and the bus test equipment 11 collects the ACK response message and records that the value of the sampling point at the moment is% x. At this time, the bit delay time obtained by the bus test device 11 is T ═ Tbit × 0.01+ Tbit ×% x ═ 0.01 × (1+ x) × Tbit, Tbit is a transmission time of 1 bit, and the error range of the bit delay time T is between 0 and 0.01 × Tbit ═ 20 ns.
To sum up, the embodiment of the utility model provides an inside time delay testing arrangement of controller links to each other with being observed and controlled the system through bus test equipment, bus test equipment sends the message and gives being observed and controlled the system, gather the ACK response message that is given by observing and controlling the system and calculate a time delay, thereby test under the condition of not drawing forth transmission pin and receiving pin, CAN ensure by the integrality of observing and controlling the system ware sample piece, this scheme convenient operation in addition, use the CAN instrument to realize automatic test, the cost is further saved, the solidification and the popularization of the scheme of being convenient for.
The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiments, and although the present invention has been disclosed with the preferred embodiments, it is not limited to the present invention, and any skilled person in the art can make some modifications or equivalent changes without departing from the technical scope of the present invention.

Claims (7)

1. A controller internal delay testing device is characterized by comprising: the bus test equipment is connected with the tested controller and the control equipment, and the tested controller is also connected with the programmed power supply.
2. The apparatus of claim 1, wherein the control device is a computer.
3. The apparatus of claim 1, wherein the bus test device is connected to the controller under test via a twisted pair.
4. The device for testing the internal delay of the controller according to claim 1, wherein a CANOE bus test tool is arranged in the bus test equipment.
5. The device for testing internal delay of a controller according to claim 1, wherein the supply voltage of the programmable power supply is between 13.6V and 14V.
6. The device of claim 1, wherein the programmable power supply is a dc power supply.
7. The apparatus of claim 1, wherein the measured controller is a CAN controller.
CN201922492743.6U 2019-12-31 2019-12-31 Controller internal delay testing device Active CN211296735U (en)

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113347053A (en) * 2021-04-26 2021-09-03 江铃汽车股份有限公司 Automobile CAN bus sampling point testing method and system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113347053A (en) * 2021-04-26 2021-09-03 江铃汽车股份有限公司 Automobile CAN bus sampling point testing method and system
CN113347053B (en) * 2021-04-26 2022-04-15 江铃汽车股份有限公司 Automobile CAN bus sampling point testing method and system

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