CN211252223U - Super capacitor system with independent energy recovery path - Google Patents
Super capacitor system with independent energy recovery path Download PDFInfo
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- 238000004891 communication Methods 0.000 claims abstract description 25
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- 230000002265 prevention Effects 0.000 claims description 19
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- 238000007726 management method Methods 0.000 description 1
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Abstract
The utility model provides a super capacitor system with independent energy recovery path, including power, external equipment, first power supply circuit, second power supply circuit, sampling circuit, microprocessor, communication circuit, energy recovery circuit and first MOS management and control circuit; the utility model provides a super capacitor system with independent energy recovery path, which is provided with an energy recovery circuit to realize the recovery of system energy; the energy recovery circuit comprises a first power supply circuit, a second power supply circuit, a first energy recovery circuit, a second energy recovery circuit and a capacitor, wherein the first power supply circuit and the second power supply circuit are arranged; the voltage and current information of the system is collected through the sampling circuit, and the charging power of the first power supply circuit and the charging power of the second power supply circuit are adjusted and controlled through the microprocessor, so that stable charging of the super capacitor is realized.
Description
Technical Field
The utility model relates to a robot or electric power delivery vehicle field, more specifically relates to a super capacitor system with independent energy recuperation route.
Background
In the field of robots or power vehicles, when the robot makes a jump or other sudden movement and the power vehicle is instantaneously accelerated, considerable power is consumed, while in other time periods, the consumed power is relatively small, and therefore the power provided by the battery fluctuates relatively greatly, which has an adverse effect on the life of the battery. Sometimes it is difficult for the battery to provide high power, limiting the starting speed, acceleration movement of the robot or electric vehicle. The super capacitor can ask for energy from the battery with lower power, and when the power of the power consumption equipment is suddenly increased, the super capacitor can provide very high power in a short time, so that the output power of the battery is kept at a lower and relatively constant level in the whole process, the service life of the battery is prolonged, and the equipment has better instant acceleration performance.
In the existing super capacitor system, the structure and the function are various, and the existing super capacitor system has no energy recovery function, so that the utilization rate of battery energy is low; some super capacitor systems do not perform charging power control, once a battery is powered on, the super capacitor is charged by fixed current, the charging power gradually rises along with the increase of the electric quantity and the rise of the voltage of the super capacitor, and the charging power cannot be strictly controlled; although there is an energy recovery effect, the recovery path and the energy output path are the same path, and this structure is only suitable for the case of direct output of the capacitor, and if the latter stage needs to stabilize the voltage and then output the capacitor, an independent recovery path must be adopted.
SUMMERY OF THE UTILITY MODEL
The utility model discloses an overcome the unable technical defect who realizes energy recuperation, charging power control simultaneously of current super capacitor system and possess independent recovery route, provide a super capacitor system with independent energy recuperation route.
In order to solve the technical problem, the technical scheme of the utility model as follows:
a super capacitor system with an independent energy recovery path comprises a power supply, external equipment, a first power supply circuit, a second power supply circuit, a sampling circuit, a microprocessor, a communication circuit, an energy recovery circuit and a first MOS (metal oxide semiconductor) management and control circuit; wherein:
the power supply is electrically connected with the input ends of the first power supply circuit and the second power supply circuit;
the first power supply circuit and the second power supply circuit supply power to the external equipment through the first MOS control circuit;
the sampling circuit is used for collecting voltage and current signals of the first power supply circuit, the second power supply circuit and external equipment and transmitting a collection result to the microprocessor;
the output end of the microprocessor is electrically connected with the power control ends of the first power supply circuit and the second power supply circuit and is in communication connection with the external equipment through the communication circuit;
the external equipment is provided with an energy recovery circuit, and the energy recovery circuit exchanges energy with the external equipment;
the second power supply circuit charges the energy recovery circuit.
In the scheme, the energy recovery circuit is arranged on the super capacitor system, so that the recovery of system energy is realized; the energy recovery circuit comprises a first power supply circuit, a second power supply circuit, a first energy recovery circuit, a second energy recovery circuit and a capacitor, wherein the first power supply circuit and the second power supply circuit are arranged; the voltage and current information of the system is collected through the sampling circuit, and the charging power of the first power supply circuit and the charging power of the second power supply circuit are adjusted and controlled through the microprocessor, so that stable charging of the super capacitor is realized.
The first power supply circuit comprises a first voltage reduction module, a first digital potentiometer module and a first backflow prevention sub-circuit; wherein:
the input end of the first voltage reduction module is electrically connected with the power supply;
the control end of the first digital potentiometer module is electrically connected with the microprocessor;
the output end of the first digital potentiometer module is electrically connected with the input end of the first voltage reduction module;
the output end of the first voltage reduction module is electrically connected with the input end of the first backflow prevention sub-circuit;
the output end of the first backflow preventing sub-circuit is electrically connected with the external equipment;
the first backflow prevention sub-circuit is electrically connected with the sampling circuit.
The second power supply circuit comprises a second boosting module, a second voltage reducing module, a second digital potentiometer module and a second backflow preventing sub-circuit; wherein:
the input end of the second boosting module is electrically connected with the power supply;
the output end of the second boosting module is electrically connected with the input end of the second voltage reducing module;
the control end of the second digital potentiometer module is electrically connected with the microprocessor;
the output end of the second digital potentiometer module is electrically connected with the input end of the second voltage reduction module;
the output end of the second voltage reduction module is electrically connected with the input end of the second backflow prevention sub-circuit and the charging end of the energy recovery circuit;
the output end of the second backflow preventing sub-circuit is electrically connected with the external equipment;
the second backflow prevention sub-circuit is electrically connected with the sampling circuit.
In the scheme, the microprocessor is used as a processing core, the voltage and current information of the system is detected in real time, and the control of the output power of the first voltage reduction module and the output power of the second voltage reduction module are indirectly realized by controlling the resistance values of the first digital potentiometer module and the second digital potentiometer module; when the second power supply circuit charges the energy recovery circuit, the charging power for charging the energy recovery circuit is provided by controlling the maximum output current of the second voltage reduction module, so that the energy recovery circuit is prevented from keeping low charging power when the power consumption of external equipment is high.
The sampling circuit comprises a voltage sampling sub-circuit and a current sampling sub-circuit; wherein:
the input end of the voltage sampling sub-circuit collects voltage signals of the super capacitor bank on the external equipment and the energy recovery circuit;
the output end of the voltage sampling sub-circuit is electrically connected with the microprocessor;
the input end of the current sampling sub-circuit collects current signals on the external equipment, the first backflow preventing sub-circuit and the second backflow preventing sub-circuit;
the output end of the current sampling sub-circuit is electrically connected with the microprocessor.
In the scheme, the voltage sampling sub-circuit and the current sampling sub-circuit are arranged to acquire voltage and current information of the system, and the microprocessor is used for regulating and controlling the energy recovery circuit.
The microprocessor adopts an MCU of which the model is STM32F407VET 6.
Wherein, the communication circuit is a CAN communication circuit.
The energy recovery circuit comprises a second MOS (metal oxide semiconductor) control sub-circuit, a super capacitor bank and a third MOS control sub-circuit; wherein:
the input end of the second MOS control sub-circuit is electrically connected with the external equipment;
the output end of the second MOS control sub-circuit is electrically connected with the charging end of the super capacitor bank;
the output end of the second power supply circuit is electrically connected with the charging end of the super capacitor bank;
the output end of the super capacitor bank is electrically connected with the input end of the third MOS control sub-circuit;
and the output end of the third MOS control sub-circuit is electrically connected with the external equipment.
In the scheme, the system is provided with an independent energy recovery circuit for energy recovery, so that the recovery of the system energy is realized, and instantaneous high power is provided for external equipment by utilizing the super capacitor bank; the super capacitor bank asks for power from the power supply with lower power, and when the power of the external equipment is suddenly increased, the super capacitor bank can provide high power in a short time, so that the output power of the power supply is kept at a lower and relatively constant level in the whole process, the service life of the battery is prolonged, and the equipment has better instant accelerated announcement performance.
The display module is electrically connected with the output end of the microprocessor.
In the above scheme, the display module adopts an OLED display screen, and displays the acquired information such as current and voltage through the display module.
Compared with the prior art, the utility model discloses technical scheme's beneficial effect is:
the utility model provides a super capacitor system with independent energy recovery path, which is provided with an energy recovery circuit to realize the recovery of system energy; the energy recovery circuit comprises a first power supply circuit, a second power supply circuit, a first energy recovery circuit, a second energy recovery circuit and a capacitor, wherein the first power supply circuit and the second power supply circuit are arranged; the voltage and current information of the system is collected through the sampling circuit, and the charging power of the first power supply circuit and the charging power of the second power supply circuit are adjusted and controlled through the microprocessor, so that stable charging of the super capacitor is realized.
Drawings
FIG. 1 is a schematic diagram of the structural connection of a super capacitor system;
FIG. 2 is a schematic circuit diagram illustrating the connection between a first power supply circuit and a second power supply circuit;
FIG. 3 is a schematic diagram of a sampling circuit connection;
FIG. 4 is a schematic diagram of the energy recovery circuit;
FIG. 5 is a schematic circuit diagram of a voltage sampling sub-circuit;
FIG. 6 is a schematic circuit diagram of a current sampling sub-circuit;
FIG. 7 is a schematic diagram of a second MOS transistor control circuit;
FIG. 8 is a schematic diagram of a backflow prevention sub-circuit;
FIG. 9 is a schematic diagram of an energy recovery circuit;
fig. 10 is a schematic diagram of a CAN communication circuit.
Detailed Description
The drawings are for illustrative purposes only and are not to be construed as limiting the patent;
for the purpose of better illustrating the embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product;
it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The technical solution of the present invention will be further explained with reference to the accompanying drawings and examples.
Example 1
As shown in fig. 1, a super capacitor system with an independent energy recovery path includes a power supply, an external device, a first power supply circuit, a second power supply circuit, a sampling circuit, a microprocessor, a communication circuit, an energy recovery circuit, and a first MOS control circuit; wherein:
the power supply is electrically connected with the input ends of the first power supply circuit and the second power supply circuit;
the first power supply circuit and the second power supply circuit supply power to the external equipment through the first MOS control circuit;
the sampling circuit is used for collecting voltage and current signals of the first power supply circuit, the second power supply circuit and external equipment and transmitting a collection result to the microprocessor;
the output end of the microprocessor is electrically connected with the power control ends of the first power supply circuit and the second power supply circuit and is in communication connection with the external equipment through the communication circuit;
the external equipment is provided with an energy recovery circuit, and the energy recovery circuit exchanges energy with the external equipment;
the second power supply circuit charges the energy recovery circuit.
In the specific implementation process, an energy recovery circuit is arranged on the super capacitor system, so that the recovery of system energy is realized; the energy recovery circuit comprises a first power supply circuit, a second power supply circuit, a first energy recovery circuit, a second energy recovery circuit and a capacitor, wherein the first power supply circuit and the second power supply circuit are arranged; the voltage and current information of the system is collected through the sampling circuit, and the charging power of the first power supply circuit and the charging power of the second power supply circuit are adjusted and controlled through the microprocessor, so that stable charging of the super capacitor is realized.
More specifically, as shown in fig. 2, the first power supply circuit includes a first voltage-dropping module, a first digital potentiometer module, and a first anti-backflow sub-circuit; wherein:
the input end of the first voltage reduction module is electrically connected with the power supply;
the control end of the first digital potentiometer module is electrically connected with the microprocessor;
the output end of the first digital potentiometer module is electrically connected with the input end of the first voltage reduction module;
the output end of the first voltage reduction module is electrically connected with the input end of the first backflow prevention sub-circuit;
the output end of the first backflow preventing sub-circuit is electrically connected with the external equipment;
the first backflow prevention sub-circuit is electrically connected with the sampling circuit.
More specifically, the second power supply circuit comprises a second boosting module, a second voltage-reducing module, a second digital potentiometer module and a second backflow prevention sub-circuit; wherein:
the input end of the second boosting module is electrically connected with the power supply;
the output end of the second boosting module is electrically connected with the input end of the second voltage reducing module;
the control end of the second digital potentiometer module is electrically connected with the microprocessor;
the output end of the second digital potentiometer module is electrically connected with the input end of the second voltage reduction module;
the output end of the second voltage reduction module is electrically connected with the input end of the second backflow prevention sub-circuit and the charging end of the energy recovery circuit;
the output end of the second backflow preventing sub-circuit is electrically connected with the external equipment;
the second backflow prevention sub-circuit is electrically connected with the sampling circuit.
In the specific implementation process, the microprocessor is used as a processing core, the voltage and current information of the system is detected in real time, and the control of the output power of the first voltage reduction module and the output power of the second voltage reduction module are indirectly realized by controlling the resistance values of the first digital potentiometer module and the second digital potentiometer module; when the second power supply circuit charges the energy recovery circuit, the charging power for charging the energy recovery circuit is provided by controlling the maximum output current of the second voltage reduction module, so that the energy recovery circuit is prevented from keeping low charging power when the power consumption of external equipment is high.
More specifically, as shown in fig. 3, the sampling circuit includes a voltage sampling sub-circuit and a current sampling sub-circuit; wherein:
the input end of the voltage sampling sub-circuit collects voltage signals of the external equipment and the energy recovery circuit;
the output end of the voltage sampling sub-circuit is electrically connected with the microprocessor;
the input end of the current sampling sub-circuit collects current signals on the external equipment, the first backflow preventing sub-circuit and the second backflow preventing sub-circuit;
the output end of the current sampling sub-circuit is electrically connected with the microprocessor.
In the specific implementation process, the voltage sampling sub-circuit and the current sampling sub-circuit are arranged to realize the acquisition of system voltage and current information, and the microprocessor is used for regulating and controlling the energy recovery circuit.
More specifically, the microprocessor adopts an MCU of which the model is STM32F407VET 6.
More specifically, the communication circuit is a CAN communication circuit.
More specifically, as shown in fig. 4, the energy recovery circuit includes a second MOS transistor sub-circuit, a super capacitor bank, and a third MOS transistor sub-circuit; wherein:
the input end of the second MOS control sub-circuit is electrically connected with the external equipment;
the output end of the second MOS control sub-circuit is electrically connected with the charging end of the super capacitor bank;
the output end of the second power supply circuit is electrically connected with the charging end of the super capacitor bank;
the output end of the super capacitor bank is electrically connected with the input end of the third MOS control sub-circuit;
and the output end of the third MOS control sub-circuit is electrically connected with the external equipment.
In the specific implementation process, the system is provided with an independent energy recovery circuit for energy recovery, so that the recovery of the system energy is realized, and the super capacitor bank is utilized to provide instantaneous high power for external equipment; the super capacitor bank asks for power from the power supply with lower power, and when the power of the external equipment is suddenly increased, the super capacitor bank can provide high power in a short time, so that the output power of the power supply is kept at a lower and relatively constant level in the whole process, the service life of the battery is prolonged, and the equipment has better instant accelerated announcement performance.
More specifically, still include the display module, the display module with microprocessor output end electric connection.
In the specific implementation process, the display module adopts an OLED display screen, and the display module displays the acquired information such as current and voltage.
Example 2
More specifically, the super capacitor system described in embodiment 1 is applied to a robot, and when the robot makes a jump or an acceleration movement, the power consumed by the robot increases sharply, and at this time, because the super capacitor bank stores energy, the super capacitor bank can supply energy without directly supplying a large power from a power supply, so that the battery provides a stable power in the whole movement process of the robot, thereby greatly reducing the burden of the battery, and improving the service life of the battery while improving the performance of the robot.
In the specific implementation process, mains voltage passes through the controllable step-down module of power, charges for super capacitor group again, at this moment, because super capacitor group directly exports, when robot power needs are great, super capacitor group voltage can descend, nevertheless because the electricity of robot is transferred and can be worked at wide voltage, the work that consequently super capacitor group voltage can not be influenced in the reduction of super capacitor group voltage, exert super capacitor group's ultimate output performance promptly to the at utmost, instantaneous output strengthens greatly promptly. And because the power of charging the super capacitor bank is lower, a boosting module with smaller volume and weight can be adopted.
In the specific implementation process, the system adopts an embedded microprocessor as a control core of the system, and the model of the MCU is STM32F407CET 6; the microprocessor needs to detect the running state of the system in real time, collect the voltage of the super capacitor bank, charge the current of the super capacitor bank and the like, regulate and control the state of the system, and send information to the outside through the CAN communication circuit.
In a specific implementation process, as shown in fig. 5 and fig. 6, since the maximum voltage of the super capacitor bank is about 26V and much higher than the operating voltage of the MCU, the port to be measured cannot be directly connected to the ADC interface of the MCU, and the voltage division needs to be performed by a resistor, for example, a resistor with a value of R1 ═ 24K, R2 ═ 3.3K is used for voltage division, so that the maximum voltage that the MCU needs to process is Umax ═ 26V ═ R2/(R1+ R2) ═ 3.14V, and is in a normal processing range, thereby achieving the acquisition of the robot voltage. While the measurement of the current requires the use of a hall sensor, here an ACS712-05B chip. The ACS712-05B is a voltage-insulated low-resistance fully-integrated Hall-effect-based linear current sensor, when no current flows, the voltage of an output port of the sensor is VCC/2, when current flows, the output voltage of the port changes, the sensitivity is 185mV/A, and therefore the flowing current can be measured only by measuring the voltage change of the output port of the sensor. The power supply voltage is 5V, the bandwidth of 80KHz and the low internal resistance of 1.2 milliohms are provided, the system is suitable for use, and the collection of the current on the robot and the backflow prevention circuit is completed; the output ends of the voltage sampling and current sampling sub-circuits are connected with a 0.1uF filter capacitor, and a 47nF capacitor is also connected to a filter pin of the Hall chip and is used by a filter in the Hall chip. And then the output ends of the two terminals are connected with an ADC sampling port of the microprocessor to sample data.
In the specific implementation process, in order to realize the effect of controlling the maximum output current by the microprocessor, the microprocessor can indirectly control the maximum output current by controlling the resistance value of the digital potentiometer by arranging the digital potentiometer in the system. The stroke of the mechanical potentiometer on the original voltage reduction module is 100K, so that a digital potentiometer with the same stroke of 100K, such as MCP42100, needs to be selected. The working voltage of the chip is 2.7V-5.5V, the SPI communication is used, and the chip is provided with a double-channel 8-bit digital potentiometer. When the system is just powered on, the microprocessor controls the initialization of a program, and at the moment, no external control capability exists, so that safety is considered, when the shdn pin of the chip is pulled down during power-on, the chip enters a sleep mode, the resistance value of the potentiometer is 0, and the voltage reduction module is prevented from charging the capacitor.
In the specific implementation process, in order to control the on-off of current, a first MOS control circuit, a second MOS control sub-circuit and a third MOS control sub-circuit are arranged in the system, MOS tubes belong to voltage-controlled elements, the input resistance of the MOS tubes is very large and reaches 1 megaohm, and therefore the MOS tubes can be controlled only by small current. Secondly, the on-resistance of the MOS is relatively low, usually in the milliohm level, and the on-voltage drop is small, while in contrast, the power loss is relatively large and the heat generation is relatively serious due to the Vce when the transistor is turned on. Moreover, the MOS tube has larger on-current ratio and is suitable for high-power control places. In the system, the MOS tube is used at a plurality of places due to the need of controlling the on-off of the current in real time and switching the current path. The model of the NMOS tube is CSD30N39, the maximum Vds is 30V, the maximum Id is 85A, the model of the PMOS tube is SSFD3005, the performance index of the NMOS tube is basically consistent with that of the NMOS tube, and the NMOS tube and the PMOS tube are both very suitable for application in high-power occasions. For a single high power MOS transistor, the substrate of the NMOS is usually connected to the source due to the process requirements, thereby introducing a parasitic diode. When the appropriate VGS is turned on, the NMOS can be turned on in the forward direction, and when VGS is equal to 0, the NMOS transistor is turned on in the reverse phase due to the parasitic diode, and cannot assume the required fully turned off state, as is the case with the PMOS transistor.
In a specific implementation process, as shown in fig. 7, in order to achieve the effect of fully turning on and fully turning off the MOS, two MOS transistors are required to be used, and back-to-back connection is performed. The source electrodes and the grid electrodes of the two NMOSs are connected together, when VG is high, the two MOS tubes are simultaneously conducted, at the moment, the current can flow in the forward direction and the reverse direction, when VG is low, the two MOS tubes are simultaneously cut off, at the moment, the circuit is simplified into two diodes which are connected back to back, when the current enters from NMOS1, the current cannot pass when encountering a parasitic diode of the reverse NMOS1, and when the current enters from NMOS2, the current also encounters a parasitic diode of the reverse NMOS2, the current cannot pass, so that the forward and reverse cut-off of the current is realized. In fig. 7, PB5 is connected to an IO port of a microprocessor, when the IO port outputs a high level, a transistor npn2 is turned on, and further a transistor pnp1 is turned on, and finally a gate voltage of an NMOS is pulled up to turn on the NMOS, and when the IO port outputs a low level, the MOS transistor is turned off by the same reasoning. The zener diode in the figure is used to limit VGS within 12V, and prevent the gate of the MOS transistor from being broken down. Similarly, the first MOS control circuit and the third MOS control sub-circuit also realize the forward and reverse cut-off of the current.
In a specific implementation process, as shown in fig. 8, the backflow prevention sub-circuit adopts a chip LTC4412, the chip is used for switching a power supply, and the highest working voltage is 36V; in the system, the drain electrode of the PMOS is the input end of the anti-backflow circuit, the source electrode of the PMOS is the output end, the input end is supposed to be connected with a power supply, the output end is connected with a load, when the load needs to consume energy, current flows to the load from the power supply, the parasitic diode of the MOS tube is conducted in the forward direction at the moment, the generated voltage drop of about 0.7V is detected by a SENSE pin of the chip, then the GATE pin is pulled down by the chip, the triode pnp2 is conducted, the triode npn1 is further conducted, the GATE voltage of the MOS tube is pulled down by the conduction of the npn1 to conduct the MOS tube, the voltage drop is reduced to 20mV from 0.7V at the moment, and the whole conduction path is similar to an ideal conducting wire at the moment. When the device returns a high electromotive force (which occurs when the device is an inductive load or the device is connected to a power supply), the voltage of the SENSE pin of the chip is higher than the voltage of VIN, the GATE pin is pulled high by the chip at the moment, and finally the PMOS is turned off, the PMOS is equivalent to a diode in a reverse cut-off state at the moment, and current cannot flow back to the power supply end from the device end, so that the effect of preventing the backward flow of the current is realized. Therefore, the circuit has small voltage drop when conducting in the forward direction, can be ignored, and can cut off the current in the reverse direction, is similar to an ideal diode, and can be also called an ideal diode circuit.
In the specific implementation process, the anti-backflow subcircuit is additionally provided with a diode and a triode, wherein a voltage stabilizing diode is used for limiting the grid voltage of a MOS tube and preventing the grid voltage from being broken down, and a diode d1 is used for preventing the voltage of a SENSE pin from exceeding the limit borne by a chip and burning the chip. The triode is used for amplifying the chip current, so that the MOS tube is turned on and off more quickly.
In the specific implementation process, the energy recovery circuit adopts the LTC4412 chip, when the robot returns to the high level, the original power supply path needs to be disconnected, and the new recovery path needs to be opened, which is similar to the backflow prevention process, as shown in fig. 9. The IO port of the microprocessor is high level, when the robot decelerates or brakes, the robot returns a potential higher than the power supply voltage, at the moment, the chip turns off pmos4, the STAT pin is pulled down, further, the npn4 is conducted, the pnp4 is conducted, the gate voltages of pmos2 and pmos3 are pulled down, the energy recovery path is opened, current flows from the robot to the positive electrode of the super capacitor bank, the capacitor is charged, and the process is accompanied with the lightening of the LED. After most energy recovery is finished, the voltage of the robot is lower than the power supply voltage, at the moment, the chip opens a path for supplying power to the robot again, the energy recovery path is closed, and the whole recovery process is completed.
In the specific implementation process, as shown in fig. 10, the CAN communication circuit uses differential signals, and in order to implement CAN communication on the microcomputer controller, an interface between the CAN controller and the physical bus is also used: the CAN transceiver is used for converting the logic level of a CAN controller into the differential level of a CAN bus, converting the differential level on the bus into the logic level of the controller and transmitting data on two bus cables with differential voltage. The type of the transceiver used by the system is SN65HVD232, the circuit adopts 3.3V power supply and CAN share a power supply with the MCU, D, Rx ends of the chip are connected with a CAN communication interface of the microprocessor, and CANH and CANL are communication buses for connecting the robot.
In the specific implementation process, the input voltage range of the voltage reduction module adopted by the system is 6-40V, the output voltage is continuously adjustable, the working frequency is 150KHz, the efficiency can reach up to 96%, and the current limiting range is 0-20A. The input voltage range of the boosting module is 8.5V-48V, the output is continuously adjustable from 10V to 50V, the working frequency is 150KHz, and the maximum output current is 10A. The battery voltage is increased from 24V to 28V by using the voltage increasing module, and after 2V voltage reduction through the voltage reducing module, the super capacitor bank can be charged to 26V. The OLED screen adopts the 3.3V power supply, uses SPI communication interface, and MCU can send information to the screen through SPI communication to show required content such as electric capacity voltage, charging current, charging power, residual capacity etc..
It is obvious that the above embodiments of the present invention are only examples for clearly illustrating the present invention, and are not limitations to the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.
Claims (8)
1. An ultracapacitor system with an independent energy recovery path, comprising a power supply and an external device, wherein the ultracapacitor system is characterized in that: the power supply circuit also comprises a first power supply circuit, a second power supply circuit, a sampling circuit, a microprocessor, a communication circuit, an energy recovery circuit and a first MOS (metal oxide semiconductor) management and control circuit; wherein:
the power supply is electrically connected with the input ends of the first power supply circuit and the second power supply circuit;
the first power supply circuit and the second power supply circuit supply power to the external equipment through the first MOS control circuit;
the sampling circuit is used for collecting voltage and current signals of the first power supply circuit, the second power supply circuit and external equipment and transmitting a collection result to the microprocessor;
the output end of the microprocessor is electrically connected with the power control ends of the first power supply circuit and the second power supply circuit and is in communication connection with the external equipment through the communication circuit;
the external equipment is provided with an energy recovery circuit, and the energy recovery circuit exchanges energy with the external equipment;
the second power supply circuit charges the energy recovery circuit.
2. The supercapacitor system with independent energy recovery path according to claim 1, wherein: the first power supply circuit comprises a first voltage reduction module, a first digital potentiometer module and a first backflow prevention sub-circuit; wherein:
the input end of the first voltage reduction module is electrically connected with the power supply;
the control end of the first digital potentiometer module is electrically connected with the microprocessor;
the output end of the first digital potentiometer module is electrically connected with the input end of the first voltage reduction module;
the output end of the first voltage reduction module is electrically connected with the input end of the first backflow prevention sub-circuit;
the output end of the first backflow preventing sub-circuit is electrically connected with the external equipment;
the first backflow prevention sub-circuit is electrically connected with the sampling circuit.
3. The supercapacitor system with independent energy recovery path according to claim 2, wherein: the second power supply circuit comprises a second boosting module, a second voltage reducing module, a second digital potentiometer module and a second backflow preventing sub-circuit; wherein:
the input end of the second boosting module is electrically connected with the power supply;
the output end of the second boosting module is electrically connected with the input end of the second voltage reducing module;
the control end of the second digital potentiometer module is electrically connected with the microprocessor;
the output end of the second digital potentiometer module is electrically connected with the input end of the second voltage reduction module;
the output end of the second voltage reduction module is electrically connected with the input end of the second backflow prevention sub-circuit and the charging end of the energy recovery circuit;
the output end of the second backflow preventing sub-circuit is electrically connected with the external equipment;
the second backflow prevention sub-circuit is electrically connected with the sampling circuit.
4. The supercapacitor system according to claim 3, wherein the supercapacitor system having an independent energy recovery path comprises: the sampling circuit comprises a voltage sampling sub-circuit and a current sampling sub-circuit; wherein:
the input end of the voltage sampling sub-circuit collects voltage signals of the external equipment and the energy recovery circuit;
the output end of the voltage sampling sub-circuit is electrically connected with the microprocessor;
the input end of the current sampling sub-circuit collects current signals on the external equipment, the first backflow preventing sub-circuit and the second backflow preventing sub-circuit;
the output end of the current sampling sub-circuit is electrically connected with the microprocessor.
5. The supercapacitor system according to claim 4, wherein the supercapacitor system having an independent energy recovery path comprises: the microprocessor adopts an MCU of which the model is STM32F407VET 6.
6. The supercapacitor system according to claim 5, wherein the supercapacitor system having an independent energy recovery path comprises: the communication circuit is a CAN communication circuit.
7. The supercapacitor system according to any one of claims 1 to 6, wherein the supercapacitor system having an independent energy recovery path comprises: the energy recovery circuit comprises a second MOS (metal oxide semiconductor) pipe control sub-circuit, a super capacitor bank and a third MOS pipe control sub-circuit; wherein:
the input end of the second MOS control sub-circuit is electrically connected with the external equipment;
the output end of the second MOS control sub-circuit is electrically connected with the charging end of the super capacitor bank;
the output end of the second power supply circuit is electrically connected with the charging end of the super capacitor bank;
the output end of the super capacitor bank is electrically connected with the input end of the third MOS control sub-circuit;
and the output end of the third MOS control sub-circuit is electrically connected with the external equipment.
8. The supercapacitor system according to claim 7, wherein the supercapacitor system having an independent energy recovery path comprises: the display module is electrically connected with the output end of the microprocessor.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921621443.7U CN211252223U (en) | 2019-09-26 | 2019-09-26 | Super capacitor system with independent energy recovery path |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921621443.7U CN211252223U (en) | 2019-09-26 | 2019-09-26 | Super capacitor system with independent energy recovery path |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117254560A (en) * | 2023-09-21 | 2023-12-19 | 深圳创芯技术股份有限公司 | Charging circuit and charging system with same |
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2019
- 2019-09-26 CN CN201921621443.7U patent/CN211252223U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117254560A (en) * | 2023-09-21 | 2023-12-19 | 深圳创芯技术股份有限公司 | Charging circuit and charging system with same |
| CN117254560B (en) * | 2023-09-21 | 2024-06-07 | 深圳创芯技术股份有限公司 | Charging circuit and charging system with same |
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