CN211239825U - Distributed adapter impedance circuit - Google Patents
Distributed adapter impedance circuit Download PDFInfo
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- CN211239825U CN211239825U CN202020083876.8U CN202020083876U CN211239825U CN 211239825 U CN211239825 U CN 211239825U CN 202020083876 U CN202020083876 U CN 202020083876U CN 211239825 U CN211239825 U CN 211239825U
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Abstract
The utility model discloses a distributing type adapter impedance circuit, include: the temperature detection circuit comprises a detection module, a modulation module, a control module, a signal amplification module and an anti-interference module, wherein a coupler U1 and a resistor R2 in the detection module detect the temperature generated by the circuit, and a diode D1 controls the on-off of the circuit; an operational amplifier U2 and a capacitor C2 in the modulation module comb the interfered signals in the data conversion; a transistor Q4 and an inductor L1 in the control module block redundant data signals generated after modulation, and a resistor R6 limits the flow speed of the data signals; a triode Q5 in the signal amplification module is used as a contactless switch to transmit the data signal improved by the signal amplifier U3 to the anti-interference module; the filtering is stored to the interference wave band that the inductance produced in to the circuit in the anti-interference module, the utility model discloses a data signal who produces the distributing type adapter loses restores, improves data conversion's stability.
Description
Technical Field
The utility model belongs to the technical field of data conditioning and specifically relates to a distributing type adapter impedance circuit.
Background
Along with the rapid development of the times, people upgrade the application of internet equipment and electronic products, and the connection port is not conform to when some equipment needs to be connected with external equipment, and the problem of different equipment connectors is effectively solved by the adapter.
When the existing adapter is used for one-port multi-output, the patch cord and the adapter can cause the heating of the patch cord or the output end of the adapter under the high-load operation of data, so that the data transmission is unstable; the multiple output ports can generate interference sources mutually, and data cannot be quickly transmitted; the data signal that is lost or impaired cannot be repaired.
SUMMERY OF THE UTILITY MODEL
Utility model purpose: the utility model provides a distributed adapter impedance circuit to solve the above-mentioned problem that prior art exists.
The technical scheme is as follows: a distributed adapter impedance circuit, comprising: the temperature detection circuit comprises a detection module, a modulation module, a control module, a signal amplification module and an anti-interference module, wherein a coupler U1 and a resistor R2 in the detection module detect the temperature generated by the circuit, and a diode D1 controls the on-off of the circuit; an operational amplifier U2 and a capacitor C2 in the modulation module comb the interfered signals in the data conversion; a transistor Q4 and an inductor L1 in the control module block redundant data signals generated after modulation, and a resistor R6 limits the flow speed of the data signals; a triode Q5 in the signal amplification module is used as a contactless switch to transmit the data signal improved by the signal amplifier U3 to the anti-interference module; and an inductor L2 in the anti-interference module stores and filters an interference wave band generated in a circuit.
In a further embodiment, the detection module includes a resistor R1, a diode D1, a coupler U1, a resistor R2, a resistor R3, a capacitor C1, and a resistor R4, wherein one end of the resistor R1 is connected to the negative terminal of the diode D1 and the pin 3 of the coupler U1, respectively; the positive end of the diode D1 is respectively connected with one end of the resistor R2 and the ground wire GND; the other end of the resistor R2 is respectively connected with a pin 2 of a coupler U1 and one end of a resistor R3; the other end of the resistor R3 is respectively connected with a pin 5 of a coupler U1, one end of a capacitor C1 and one end of a resistor R4; the other end of the capacitor C1 is connected with the ground line GND.
In a further embodiment, the modulation module includes a resistor R5, a capacitor C2, a resistor R9, an operational amplifier U2, a diode D2, a transistor Q2, a transistor Q1, and a resistor R10, wherein one end of the resistor R5 is connected to the positive terminal of the capacitor C2, the pin 3 of the operational amplifier U2, and the other end of the resistor R4, respectively; the other end of the resistor R5 is respectively connected with one end of a resistor R9, the positive end of a diode D2 and the emitter end of a triode Q2; the negative end of the capacitor C2 is connected with a ground wire GND; the other end of the resistor R9 is respectively connected with a pin 2 of an operational amplifier U2 and a pin 1 of a transistor Q1; pin 3 of the transistor Q1 is connected with a ground wire GND; the pin 7 of the operational amplifier U2 is connected with a power supply + 5V; pin 4 of the operational amplifier U2 is connected with a ground wire GND; pin 6 of the operational amplifier U2 is connected with the negative terminal of the diode D2; the base terminal of the triode Q2 is respectively connected with a pin 2 of a transistor Q1 and one end of a resistor R10; and the collector terminal of the triode Q2 is connected with the other terminal of the resistor R10.
In a further embodiment, the control module includes an inductor L1, a transistor Q4, a resistor R6, a capacitor C7, and a signal amplifier U3, wherein one end of the inductor L1 is connected to pin 1 of the transistor Q4, a collector end of the transistor Q2, and the other end of the resistor R10, respectively; the other end of the inductor L1 is respectively connected with one end of a resistor R6, a pin 3 of a signal amplifier U3 and a ground wire GND; the other end of the resistor R6 is respectively connected with the positive end of the capacitor C7 and a pin 3 of the transistor Q4; the negative end of the capacitor C7 is connected with a pin 2 of a signal amplifier U3; pin 2 of the transistor Q4 is connected with a power supply + 5V; and the pin 4 of the signal amplifier U3 is connected with a +5V power supply.
In a further embodiment, the signal amplification circuit comprises a capacitor C3, an inductor L3, a transistor Q5, a capacitor C4, an inductor L4 and a transistor Q3, wherein the positive terminal of the capacitor C3 is respectively connected with one end of the inductor L4, a power supply +5V and a pin 4 of a signal amplifier U3; the negative end of the capacitor C3 is respectively connected with one end of an inductor L3, an emitter end of a triode Q5, the positive end of a capacitor C4 and a pin 2 of a transistor Q3; the other end of the inductor L3 is respectively connected with a base terminal of a triode Q5 and a pin 6 of a signal amplifier U3; the collector terminal of the triode Q5 is connected with the other end of the inductor L4; pin 3 of the transistor Q3 is connected with +5V of a power supply; the capacitor C4 is connected to ground GND.
In a further embodiment, the anti-jamming module includes a diode D4, an inductor L2, an inductor L6, an inductor L5, a resistor R11, an adjustable resistor RV1, a resistor R7, a capacitor C5, and a signal amplifier U4, where one end of the inductor L2 is connected to one end of the inductor L6, one end of the inductor L5, and one end of the resistor R11, respectively; the other end of the inductor L2 is connected with a pin 1 of a transistor Q3; the other end of the inductor L5 is respectively connected with the other end of the inductor L6, a pin 6 of a signal amplifier U4 and one end of a capacitor C5; the other end of the resistor R11 is connected with a pin 2 of a signal amplifier U4; pin 3 of the signal amplifier U4 is connected with pin 2 of an adjustable resistor RV 1; the pin 1 and the pin 3 of the adjustable resistor RV1 are respectively connected with the cathode end of the diode D4, one end of the resistor R7 and the ground wire GND; the other end of the resistor R7 is connected with the other end of the capacitor C5; and the positive end of the diode D4 is respectively connected with the negative end of the capacitor C4 and the ground wire GND.
In a further embodiment, the diode D1 and the diode D4 are both zener diodes; the capacitor C2, the capacitor C3, the capacitor C4 and the capacitor C7 are electrolytic capacitors; the model of the triode Q2 and the model of the triode Q5 are both NPN.
Has the advantages that: the utility model detects the temperature generated by the circuit through the coupler U1 and the resistor R2 in the detection module, and controls the on-off protection adapter output end of the circuit through the diode D1; in the signal amplification module, the triode Q5 is used as a non-contact switch to transmit data signals improved by the signal amplifier U3, so that interference generated when output ports work mutually is reduced, and the inductor L3 and the inductor L4 convert electric energy into magnetic energy to be stored so as to reduce low noise generated by signal amplification; in the modulation module, the signals interfered in the data conversion are combed through the operational amplifier U2 and the capacitor C2, the stability of the data signals is adjusted, and the quality of data transmission is improved.
Drawings
Fig. 1 is a circuit diagram of the module of the present invention.
Fig. 2 is a circuit diagram of the detection module of the present invention.
Fig. 3 is a circuit diagram of the modulation module of the present invention.
Fig. 4 is a circuit diagram of the control signal amplifying module of the present invention.
Fig. 5 is a circuit diagram of the anti-jamming module of the present invention.
Detailed Description
Referring to fig. 1 to 5, a distributed adapter impedance circuit includes: the detection module comprises a resistor R1, a diode D1, a coupler U1, a resistor R2, a resistor R3, a capacitor C1 and a resistor R4.
The modulation module comprises a resistor R5, a capacitor C2, a resistor R9, an operational amplifier U2, a diode D2, a triode Q2, a transistor Q1 and a resistor R10.
The control module comprises an inductor L1, a transistor Q4, a resistor R6, a capacitor C7 and a signal amplifier U3.
The signal amplifying circuit comprises a capacitor C3, an inductor L3, a triode Q5, a capacitor C4, an inductor L4 and a transistor Q3.
The anti-interference module comprises a diode D4, an inductor L2, an inductor L6, an inductor L5, a resistor R11, an adjustable resistor RV1, a resistor R7, a capacitor C5 and a signal amplifier U4.
One end of the resistor R1 in the detection module is respectively connected with the cathode end of the diode D1 and the pin 3 of the coupler U1; the positive end of the diode D1 is respectively connected with one end of the resistor R2 and the ground wire GND; the other end of the resistor R2 is respectively connected with a pin 2 of a coupler U1 and one end of a resistor R3; the other end of the resistor R3 is respectively connected with a pin 5 of a coupler U1, one end of a capacitor C1 and one end of a resistor R4; the other end of the capacitor C1 is connected with the ground line GND.
One end of the resistor R5 in the modulation module is respectively connected with the positive end of the capacitor C2, the pin 3 of the operational amplifier U2 and the other end of the resistor R4; the other end of the resistor R5 is respectively connected with one end of a resistor R9, the positive end of a diode D2 and the emitter end of a triode Q2; the negative end of the capacitor C2 is connected with a ground wire GND; the other end of the resistor R9 is respectively connected with a pin 2 of an operational amplifier U2 and a pin 1 of a transistor Q1; pin 3 of the transistor Q1 is connected with a ground wire GND; the pin 7 of the operational amplifier U2 is connected with a power supply + 5V; pin 4 of the operational amplifier U2 is connected with a ground wire GND; pin 6 of the operational amplifier U2 is connected with the negative terminal of the diode D2; the base terminal of the triode Q2 is respectively connected with a pin 2 of a transistor Q1 and one end of a resistor R10; and the collector terminal of the triode Q2 is connected with the other terminal of the resistor R10.
One end of an inductor L1 in the control module is respectively connected with a pin 1 of a transistor Q4, a collector terminal of a triode Q2 and the other end of a resistor R10; the other end of the inductor L1 is respectively connected with one end of a resistor R6, a pin 3 of a signal amplifier U3 and a ground wire GND; the other end of the resistor R6 is respectively connected with the positive end of the capacitor C7 and a pin 3 of the transistor Q4; the negative end of the capacitor C7 is connected with a pin 2 of a signal amplifier U3; pin 2 of the transistor Q4 is connected with a power supply + 5V; and the pin 4 of the signal amplifier U3 is connected with a +5V power supply.
The positive end of the capacitor C3 in the signal amplification module is respectively connected with one end of an inductor L4, a power supply +5V and a pin 4 of a signal amplifier U3; the negative end of the capacitor C3 is respectively connected with one end of an inductor L3, an emitter end of a triode Q5, the positive end of a capacitor C4 and a pin 2 of a transistor Q3; the other end of the inductor L3 is respectively connected with a base terminal of a triode Q5 and a pin 6 of a signal amplifier U3; the collector terminal of the triode Q5 is connected with the other end of the inductor L4; pin 3 of the transistor Q3 is connected with +5V of a power supply; the capacitor C4 is connected to ground GND.
One end of the inductor L2 in the anti-interference module is respectively connected with one end of an inductor L6, one end of an inductor L5 and one end of a resistor R11; the other end of the inductor L2 is connected with a pin 1 of a transistor Q3; the other end of the inductor L5 is respectively connected with the other end of the inductor L6, a pin 6 of a signal amplifier U4 and one end of a capacitor C5; the other end of the resistor R11 is connected with a pin 2 of a signal amplifier U4; pin 3 of the signal amplifier U4 is connected with pin 2 of an adjustable resistor RV 1; the pin 1 and the pin 3 of the adjustable resistor RV1 are respectively connected with the cathode end of the diode D4, one end of the resistor R7 and the ground wire GND; the other end of the resistor R7 is connected with the other end of the capacitor C5; and the positive end of the diode D4 is respectively connected with the negative end of the capacitor C4 and the ground wire GND.
The working principle is as follows: the transmitted data signals pass through the detection module, the coupler U1 and the resistor R2 to detect the temperature generated by the circuit, the stability of the on-off protection switching signals of the circuit is controlled through the diode D1, and the resistor R2 and the resistor R3 adjust the current; an operational amplifier U2 and a capacitor C2 comb the interfered signals in the data conversion, adjust the data signal transmission, and a triode Q2 is used for a non-contact switch to adjust the on-off of the data signals; the transistor Q4 and the inductor L1 block redundant data signals generated after modulation, and influence on circuit components is reduced; the resistor R6 limits the flow speed of data signals, and the capacitor C7 provides stored charges for the control module to keep the output voltage stable; the inductor L3 and the inductor L4 convert the electric energy into magnetic energy to be stored, so that low noise generated by signal amplification is reduced; a triode Q5 in the signal amplification module is used as a contactless switch to transmit the data signal improved by the signal amplifier U3 to the anti-interference module; the inductor L2 stores and filters interference wave bands generated in the circuit, and the inductor L5 and the inductor L6 filter the amplified signals again to maintain the stability of data signal transmission of the signal amplifier U4 and improve the data transmission quality.
The preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, however, the present invention is not limited to the details of the above embodiments, and the technical concept of the present invention can be modified to perform various equivalent transformations, which all belong to the protection scope of the present invention.
Claims (5)
1. A distributed adapter impedance circuit, characterized by includes: the temperature detection circuit comprises a detection module, a modulation module, a control module, a signal amplification module and an anti-interference module, wherein a coupler U1 and a resistor R2 in the detection module detect the temperature generated by the circuit, and a diode D1 controls the on-off of the circuit; an operational amplifier U2 and a capacitor C2 in the modulation module comb the interfered signals in the data conversion; a transistor Q4 and an inductor L1 in the control module block redundant data signals generated after modulation, and a resistor R6 limits the flow speed of the data signals; a triode Q5 in the signal amplification module is used as a contactless switch to transmit the data signal improved by the signal amplifier U3 to the anti-interference module; an inductor L2 in the anti-interference module stores and filters an interference wave band generated in a circuit; the detection module comprises a resistor R1, a diode D1, a coupler U1, a resistor R2, a resistor R3, a capacitor C1 and a resistor R4, wherein one end of the resistor R1 is connected with the cathode end of the diode D1 and a pin 3 of a coupler U1 respectively; the positive end of the diode D1 is respectively connected with one end of the resistor R2 and the ground wire GND; the other end of the resistor R2 is respectively connected with a pin 2 of a coupler U1 and one end of a resistor R3; the other end of the resistor R3 is respectively connected with a pin 5 of a coupler U1, one end of a capacitor C1 and one end of a resistor R4; the other end of the capacitor C1 is connected with the ground line GND.
2. The distributed adapter impedance circuit of claim 1, wherein: the modulation module comprises a resistor R5, a capacitor C2, a resistor R9, an operational amplifier U2, a diode D2, a triode Q2, a transistor Q1 and a resistor R10, wherein one end of the resistor R5 is connected with the positive end of the capacitor C2, the pin 3 of the operational amplifier U2 and the other end of the resistor R4 respectively; the other end of the resistor R5 is respectively connected with one end of a resistor R9, the positive end of a diode D2 and the emitter end of a triode Q2; the negative end of the capacitor C2 is connected with a ground wire GND; the other end of the resistor R9 is respectively connected with a pin 2 of an operational amplifier U2 and a pin 1 of a transistor Q1; pin 3 of the transistor Q1 is connected with a ground wire GND; the pin 7 of the operational amplifier U2 is connected with a power supply + 5V; pin 4 of the operational amplifier U2 is connected with a ground wire GND; pin 6 of the operational amplifier U2 is connected with the negative terminal of the diode D2; the base terminal of the triode Q2 is respectively connected with a pin 2 of a transistor Q1 and one end of a resistor R10; and the collector terminal of the triode Q2 is connected with the other terminal of the resistor R10.
3. The distributed adapter impedance circuit of claim 1, wherein: the control module comprises an inductor L1, a transistor Q4, a resistor R6, a capacitor C7 and a signal amplifier U3, wherein one end of the inductor L1 is connected with a pin 1 of a transistor Q4, a collector end of a triode Q2 and the other end of the resistor R10 respectively; the other end of the inductor L1 is respectively connected with one end of a resistor R6, a pin 3 of a signal amplifier U3 and a ground wire GND; the other end of the resistor R6 is respectively connected with the positive end of the capacitor C7 and a pin 3 of the transistor Q4; the negative end of the capacitor C7 is connected with a pin 2 of a signal amplifier U3; pin 2 of the transistor Q4 is connected with a power supply + 5V; and the pin 4 of the signal amplifier U3 is connected with a +5V power supply.
4. The distributed adapter impedance circuit of claim 1, wherein: the signal amplification circuit comprises a capacitor C3, an inductor L3, a triode Q5, a capacitor C4, an inductor L4 and a transistor Q3, wherein the positive end of the capacitor C3 is respectively connected with one end of the inductor L4, a power supply +5V and a pin 4 of a signal amplifier U3; the negative end of the capacitor C3 is respectively connected with one end of an inductor L3, an emitter end of a triode Q5, the positive end of a capacitor C4 and a pin 2 of a transistor Q3; the other end of the inductor L3 is respectively connected with a base terminal of a triode Q5 and a pin 6 of a signal amplifier U3; the collector terminal of the triode Q5 is connected with the other end of the inductor L4; pin 3 of the transistor Q3 is connected with +5V of a power supply; the capacitor C4 is connected to ground GND.
5. The distributed adapter impedance circuit of claim 1, wherein: the anti-interference module comprises a diode D4, an inductor L2, an inductor L6, an inductor L5, a resistor R11, an adjustable resistor RV1, a resistor R7, a capacitor C5 and a signal amplifier U4, wherein one end of the inductor L2 is connected with one end of the inductor L6, one end of the inductor L5 and one end of the resistor R11 respectively; the other end of the inductor L2 is connected with a pin 1 of a transistor Q3; the other end of the inductor L5 is respectively connected with the other end of the inductor L6, a pin 6 of a signal amplifier U4 and one end of a capacitor C5; the other end of the resistor R11 is connected with a pin 2 of a signal amplifier U4; pin 3 of the signal amplifier U4 is connected with pin 2 of an adjustable resistor RV 1; the pin 1 and the pin 3 of the adjustable resistor RV1 are respectively connected with the cathode end of the diode D4, one end of the resistor R7 and the ground wire GND; the other end of the resistor R7 is connected with the other end of the capacitor C5; and the positive end of the diode D4 is respectively connected with the negative end of the capacitor C4 and the ground wire GND.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020083876.8U CN211239825U (en) | 2020-01-15 | 2020-01-15 | Distributed adapter impedance circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020083876.8U CN211239825U (en) | 2020-01-15 | 2020-01-15 | Distributed adapter impedance circuit |
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| Publication Number | Publication Date |
|---|---|
| CN211239825U true CN211239825U (en) | 2020-08-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020083876.8U Active CN211239825U (en) | 2020-01-15 | 2020-01-15 | Distributed adapter impedance circuit |
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| Country | Link |
|---|---|
| CN (1) | CN211239825U (en) |
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2020
- 2020-01-15 CN CN202020083876.8U patent/CN211239825U/en active Active
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