CN211205523U - A photoelectric power meter - Google Patents

Abstract

The application discloses photoelectric power meter includes: the photoelectric conversion circuit, the gain selection circuit, the main controller and the display circuit; the photoelectric conversion circuit is used for converting the collected optical signal of the light source to be detected into a voltage signal; the gain selection circuit is used for comparing the voltage signal with a preset reference voltage and selecting the amplification factor for amplifying the voltage signal in the photoelectric conversion circuit according to the comparison result; the main controller is used for measuring the voltage signal amplified by the amplification factor to obtain corresponding optical power; the display circuit is used for displaying optical power, and solves the technical problems that an existing photoelectric power meter for manual gear shifting is troublesome to operate and easily burns out a circuit.

Description

A photoelectric power meter

technical field

The present application relates to the technical field of power meters, and in particular, to an optoelectronic power meter.

Background technique

With the development of the optical communication industry, higher requirements are put forward for the photoelectric detection module. For the detection of optical power, it is generally required to be in the range of 0dBm to -30dBm or even greater.

Photoelectric power meter is a commonly used photoelectric detection module. The photoelectric power is generally required to be in the range of 0dBm to -30dBm or even larger. However, the existing optical power meters using the "photoelectric characteristics" of photodiodes use manual shifting, that is, changing the magnification to realize photodetection of different powers. The manual shifting method is troublesome to operate, and it is easy to burn the circuit.

Utility model content

In view of this, the present application provides an optoelectronic power meter, which solves the technical problems that the existing manual shifting optoelectronic power meter is troublesome to operate and easy to burn out the circuit.

The application provides a photoelectric power meter, including: a photoelectric conversion circuit, a gain selection circuit main controller and a display circuit;

The photoelectric conversion circuit is used to convert the collected optical signal of the light source to be detected into a voltage signal;

The gain selection circuit is used to compare the voltage signal with a preset reference voltage, and select an amplification factor for amplifying the voltage signal in the photoelectric conversion circuit according to the comparison result;

the main controller, configured to measure the voltage signal amplified by the amplification factor to obtain the corresponding optical power;

The display circuit is used for displaying the optical power.

Optionally, the gain selection circuit includes: a voltage comparison circuit and a self-locking circuit;

The voltage comparison circuit is used to compare the voltage signal with a preset reference voltage to obtain a comparison result;

The self-locking circuit is configured to input the comparison result to the photoelectric conversion circuit, so that the photoelectric conversion circuit selects an amplification factor for amplifying the voltage signal according to the comparison result.

Optionally, the voltage comparison circuit includes: a voltage comparator U1, a relay RL2 and a voltage comparator U8;

The self-locking circuit includes: a first self-locking circuit and a second self-locking circuit;

The positive input terminal of the voltage comparator U1 is connected to the output terminal of the photoelectric conversion circuit, and the output terminal is connected to the pin 1 of the relay RL2 through the first self-locking circuit;

The pin 2 of the relay RL2 is grounded, the pin 3 is connected to the output end of the photoelectric conversion circuit, and the pin 4 is connected to the forward input end of the voltage comparator U8;

The output end of the voltage comparator U8 is connected to the photoelectric conversion circuit through the second self-locking circuit.

Optionally, the first self-locking circuit includes: a relay RL1, a diode D1, a diode D2, an amplifier U3 and a relay RL5;

The pin 1 of the relay RL1 is connected to the output end of the voltage comparator U1, the pin 2 is grounded, the pin 3 is connected to the power supply voltage, and the pin 4 is connected to the forward input end of the amplifier U3 and the diode D1. Positive pole and pin 3 of the relay RL5;

The cathode of the diode D1 is connected to the anode of the diode D2;

The cathode of the diode D2 is connected to the reverse input end of the amplifier U3;

The output end of the amplifier U3 is connected to the pin 1 of the relay RL2;

Pin 1 of the relay RL5 is used to input the first control signal, pin 5 is connected to the pin 1 of the relay RL2, and both pins 2 and 4 are grounded.

Optionally, the second self-locking circuit includes: relay RL3, diode D4, diode D5, amplifier U9 and relay RL4;

The pin 1 of the relay RL3 is connected to the output end of the voltage comparator U8, the pin 2 is grounded, the pin 3 is connected to the power supply voltage, and the pin 4 is connected to the forward input end of the amplifier U9 and the diode D4. Positive pole and pin 3 of the relay RL4;

The cathode of the diode D4 is connected to the anode of the diode D5;

The cathode of the diode D5 is connected to the reverse input end of the amplifier U9;

The output end of the amplifier U9 is connected to the photoelectric conversion circuit;

Pin 1 of the relay RL4 inputs the second control signal, pin 5 is connected to the photoelectric conversion circuit, and both pins 2 and 4 are grounded.

Optionally, it also includes: a peak hold circuit;

The input end of the peak hold circuit is connected to the output end of the gain selection circuit, and the output end is connected to the input end of the main controller;

The peak hold circuit is used for maintaining the peak value of the amplified voltage signal.

Optionally, the peak hold circuit includes: an amplifier U7, a diode D6, a diode D7, a diode D8, a capacitor C20, and a voltage comparator U10;

The forward input end of the amplifier U7 is connected to the output end of the gain selection circuit, the reverse input end is connected to the output end of the voltage comparator U10 and the anode of the diode D8, and the output end is connected to the cathode of the diode D8 and the anode of the diode D6;

The cathode of the diode D6 is connected to the anode of the diode D7;

The cathode of the diode D7 is connected to the first end of the capacitor C20 and the forward input end of the voltage comparator U10;

The second end of the capacitor C20 is grounded;

The inverting input terminal of the voltage comparator U10 is connected to the output terminal of the voltage comparator U10, and the output terminal is connected to the input terminal of the main controller.

Optionally, the peak hold circuit further includes: a triode Q4, a resistor R19 and a resistor R20;

The collector of the triode is connected to the cathode of the diode D7, the base is connected to the first end of the resistor R19 and the first end of the resistor R20, and the emitter is grounded;

The second end of the resistor R20 is grounded;

The second end of the resistor R19 is used for inputting a discharge signal.

Optionally, photodiode PIN, analog switch, resistor R1, resistor R2 and resistor R3;

The input end of the photodiode PIN is used to collect the light signal of the light source to be detected, and the output end is respectively connected to the first end of the resistor R1, the first end of the resistor R2 and the first end of the resistor R3;

The second end of the resistor R1, the second end of the resistor R2 and the second end of the resistor R3 are respectively connected to the first transmission channel, the second transmission channel and the third transmission channel of the analog switch, wherein the The resistance values of the resistance R1, the resistance R2 and the resistance R3 are different;

The input end of the analog switch is connected with the gain selection circuit, and the output end is connected with the voltage comparison circuit and the main controller.

Optionally, the photoelectric conversion circuit further includes: an amplifier U4;

The reverse input terminal of the amplifier U4 is connected to the output terminal of the photodiode PIN, the forward input terminal is grounded, and the output terminal is negatively fed back to the reverse input terminal of the amplifier U4.

As can be seen from the above technical solutions, the present application has the following advantages:

A photoelectric power meter provided by the present application includes: a photoelectric conversion circuit, a main controller of a gain selection circuit, and a display circuit; a photoelectric conversion circuit for converting a collected optical signal of a light source to be detected into a voltage signal; a gain selection circuit , used to compare the voltage signal and the preset reference voltage, and select the amplification factor used to amplify the voltage signal in the photoelectric conversion circuit according to the comparison result; the main controller is used to measure the voltage signal amplified by the amplification factor, and obtain the corresponding optical Power; display circuit for displaying optical power.

In the present application, after the photoelectric conversion circuit converts the detected optical signal into a voltage signal, the gain selection circuit automatically and adaptively adjusts the voltage used for amplification in the photoelectric conversion circuit according to the comparison result between the voltage signal and the preset reference voltage The amplification factor of the signal, then the main controller measures the optical power of the amplified voltage signal, and finally the optical power is output by the display circuit. Compared with the manual shifting photoelectric power meter in the prior art, the operation is simple, and The circuit structure is protected, thereby solving the technical problems that the existing manual shift photoelectric power meter is troublesome to operate and easy to burn the circuit.

Description of drawings

1 is a schematic structural diagram of a photoelectric power meter in an embodiment of the application;

2 is a schematic structural diagram of a gain selection circuit in an embodiment of the present application;

3 is a schematic structural diagram of a peak hold circuit in an embodiment of the application;

4 is a schematic structural diagram of a photoelectric conversion circuit in an embodiment of the application;

FIG. 5 is a schematic flowchart of an application example of an optoelectronic power meter according to an embodiment of the present application.

Detailed ways

The embodiment of the present application provides an optoelectronic power meter, which solves the technical problems that the existing manual shifting optoelectronic power meter is troublesome to operate and easy to burn out the circuit.

The technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the embodiments of the present application, all other embodiments obtained by persons of ordinary skill in the art without creative work fall within the protection scope of the embodiments of the present application.

In the description of the embodiments of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" The orientation or positional relationship indicated by ” etc. is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation, It is constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the embodiments of the present application. Furthermore, the terms "first", "second", and "third" are used for descriptive purposes only and should not be construed to indicate or imply relative importance.

In the description of the embodiments of the present application, it should be noted that, unless otherwise expressly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it may be a fixed connection or a The interchangeable connection, or the integral connection, can be a mechanical connection, an electrical connection, a direct connection, an indirect connection through an intermediate medium, or an internal communication between two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in the embodiments of the present application in specific situations.

For ease of understanding, a photoelectric power meter provided by the present application will be described in detail below.

The embodiment of the present application provides a first embodiment of an optoelectronic power meter, and please refer to FIG. 1 for details.

The photoelectric power meter in this embodiment includes: a photoelectric conversion circuit, a gain selection circuit main controller and a display circuit; a photoelectric conversion circuit for converting the collected light signal of the light source to be detected into a voltage signal; a gain selection circuit, It is used to compare the voltage signal and the preset reference voltage, and select the amplification factor used to amplify the voltage signal in the photoelectric conversion circuit according to the comparison result; the main controller is used to measure the voltage signal amplified by the amplification factor to obtain the corresponding optical power ; Display circuit for displaying optical power.

In this embodiment, after the photoelectric conversion circuit converts the detected optical signal into a voltage signal, the gain selection circuit automatically and adaptively adjusts the signal used for amplification in the photoelectric conversion circuit according to the comparison result between the voltage signal and the preset reference voltage. The amplification factor of the voltage signal, then the main controller measures the optical power of the amplified voltage signal, and finally the optical power is output by the display circuit. Compared with the manual shifting photoelectric power meter in the prior art, the operation is simple, Moreover, the circuit structure is protected, thereby solving the technical problems that the existing manual shifting photoelectric power meter is troublesome to operate and easy to burn the circuit.

The above is the first embodiment of an optoelectronic power meter provided by the embodiment of the present application, and the following is the second embodiment of an optoelectronic power meter provided by the embodiment of the present application, please refer to FIG. 1 for details.

The photoelectric power meter in this embodiment includes: a photoelectric conversion circuit, a gain selection circuit main controller, and a display circuit; a photoelectric conversion circuit for converting the collected optical signal of the light source to be detected into a voltage signal; a gain selection circuit for For comparing the voltage signal and the preset reference voltage, and selecting the amplification factor used to amplify the voltage signal in the photoelectric conversion circuit according to the comparison result; the main controller is used to measure the voltage signal amplified by the amplification factor to obtain the corresponding optical power; Display circuit for displaying optical power.

Specifically, as shown in FIG. 2 , the gain selection circuit includes: a voltage comparison circuit and a self-locking circuit; a voltage comparison circuit for comparing the voltage signal and a preset reference voltage to obtain a comparison result; a self-locking circuit for comparing the comparison result Input to the photoelectric conversion circuit, so that the photoelectric conversion circuit selects the amplification factor of the amplified voltage signal according to the comparison result.

Specifically, as shown in FIG. 1 and FIG. 2 , the voltage comparison circuit includes: a voltage comparator U1, a relay RL2 and a voltage comparator U8; the self-locking circuit includes: a first self-locking circuit and a second self-locking circuit; the voltage comparator The positive input end of U1 is connected to the output end of the photoelectric conversion circuit, and the output end is connected to the pin 1 of the relay RL2 through the first self-locking circuit; the pin 2 of the relay RL2 is grounded, and the pin 3 is connected to the output end of the photoelectric conversion circuit, Pin 4 is connected to the positive input end of the voltage comparator U8; the output end of the voltage comparator U8 is connected to the photoelectric conversion circuit through the second self-locking circuit.

It should be noted that, the voltage comparison circuit in this embodiment is composed of an operational amplifier to form a comparator. In order to understand the relationship between the ADC reference voltage and the amplifier circuit in real time to avoid exceeding the range, a voltage comparison circuit is used to compare the size of the two. When the amplified voltage (amplified voltage signal, referred to as the amplified voltage for short) > the reference voltage, the maximum forward undistorted voltage is output; when the amplified voltage < the reference voltage, the reverse maximum undistorted voltage is output. If a single power supply op amp is used, the reverse power supply of the op amp is grounded. Then the comparator either outputs the maximum forward undistorted voltage, or outputs 0, which is equivalent to a digital signal of "0" and "1". Compared with the method of collecting and judging by the single-chip microcomputer, this voltage comparison method has a short acquisition time, so it can respond to the situation that the optical signal changes rapidly.

It can be understood that, because of the selection of three magnifications in this embodiment, that is, there are three feedback resistors, different resistance values represent different magnifications. The design idea of the circuit is that, by default, the feedback resistor is 100K, because the measurement is a weak and small signal, so the magnification should be large enough. Then it will enter the comparison circuit. When the weak and small signal is amplified by 100K times, that is, 105 times, the converted voltage is higher than the reference voltage. At this time, the voltage signal cannot be transmitted to the ADC, otherwise the main controller will be easily burned out, so replace it. A feedback resistor of 10K, that is, the conversion magnification, but if the converted voltage is still greater than the reference voltage, it will be converted to 1k.

During operation, the comparison sequence is to compare the voltage comparator U1 first and then compare the voltage comparator U8. Because if the amplified voltage converted at this time is higher than the reference voltage, the voltage comparator U1 outputs a high level, and the self-locking circuit locks it to a high level. This high level controls relay RL2, enabling the voltage signal to enter voltage comparator U8 for further comparison.

Specifically, as shown in Figures 1 and 2, the first self-locking circuit includes: a relay RL1, a diode D1, a diode D2, an amplifier U3 and a relay RL5; the pin 1 of the relay RL1 is connected to the output end of the voltage comparator U1, leading to Pin 2 is grounded, pin 3 is connected to the power supply voltage, pin 4 is connected to the forward input of amplifier U3, the positive electrode of diode D1 and pin 3 of relay RL5; the negative electrode of diode D1 is connected to the positive electrode of diode D2; the negative electrode of diode D2 is connected The reverse input end of the amplifier U3; the output end of the amplifier U3 is connected to the pin 1 of the relay RL2; the pin 1 of the relay RL5 is used to input the first control signal, the pin 5 is connected to the pin 1 of the relay RL2, the pin 2 and Pin 4 is both grounded.

The output end of the first self-locking circuit is also connected with a resistor R11 and a resistor R12, and the inverting input end of the amplifier U9 is also connected with a resistor R9 and a resistor R10.

It should be noted that, as shown in Figures 1 and 2, the second self-locking circuit includes: relay RL3, diode D4, diode D5, amplifier U9 and relay RL4; pin 1 of relay RL3 is connected to the output end of voltage comparator U8 , pin 2 is grounded, pin 3 is connected to the power supply voltage, pin 4 is connected to the positive input of amplifier U9, the anode of diode D4 and pin 3 of relay RL4; the cathode of diode D4 is connected to the anode of diode D5; the anode of diode D5 The negative pole is connected to the reverse input end of the amplifier U9; the output end of the amplifier U9 is connected to the photoelectric conversion circuit; the pin 1 of the relay RL4 inputs the second control signal, the pin 5 is connected to the photoelectric conversion circuit, and the pins 2 and 4 are both grounded.

The output end of the second self-locking circuit is also connected with a resistor R15 and a resistor R16, and the inverting input end of the amplifier U9 is also connected with a resistor R13 and a resistor R14.

It should be noted that when the amplified voltage is greater than the reference voltage, the voltage comparison circuit outputs a forward voltage, thereby changing the transmission channel of the analog switch, so the result is pulsed. However, the channel selection pin of the analog switch needs to be level, so it needs a "self-locking" circuit to keep it high all the time. Therefore, a "self-locking" circuit is designed.

When the amplified voltage is higher than the reference voltage, for example, the input of the forward input terminal of the voltage comparator U8 is the converted voltage. If it is higher than the reference voltage input by the reverse input terminal, the output of the voltage comparator U8 is the amplifier. The positive power supply voltage value, that is, +5V. For the relay RL3, a path is formed on the left side, so the armature is attracted, the switch inside the relay is closed, and +5V is connected to the self-locking circuit. For U9, the reverse input terminal is connected to the 2.5V voltage obtained by dividing 5V, while the forward input terminal and reverse input terminal of U9 are connected through diodes D4 and D5, and the diode conducts voltage is about 0.7V, so the voltage U _in+ of the forward input terminal will be about 1.4V higher than the voltage of the reverse input terminal U _in- , that is, U _in+ =U _in- +2*0.7, and U9 forms a positive feedback loop through RL4, Therefore, U9 will always amplify the voltage until saturation, that is, the output positive power supply voltage value is 5V. For RL4, P1.5 controls the self-locking circuit to stop working. Because when the P1.5 pin of the single-chip microcomputer outputs a high level, it forms a path with the ground, so the armature of RL4 is attracted downward, U9 has no positive feedback, and RL3 is also disconnected, so the output of U9 is slowly reduced to 0V, waiting for the next comparison.

It should be noted that, for the input of the peak hold circuit, because the amplified voltage fluctuates, if the conversion time of the ADC is not fast enough, it is easy to cause misjudgment/misdetection. As shown in FIG. 1 and FIG. 3 , the photoelectric power meter in this embodiment further includes: a peak hold circuit; the input end of the peak hold circuit is connected to the output end of the gain selection circuit, and the output end is connected to the input end of the main controller; A circuit for maintaining the peak value of the amplified voltage signal.

Specifically, the peak hold circuit includes: an amplifier U7, a diode D6, a diode D7, a diode D8, a capacitor C20 and a voltage comparator U10; the forward input end of the amplifier U7 is connected to the output end of the gain selection circuit, and the reverse input end is connected to the voltage comparator The output terminal of the device U10 and the anode of the diode D8, the output terminal is connected to the cathode of the diode D8 and the anode of the diode D6; the cathode of the diode D6 is connected to the anode of the diode D7; the cathode of the diode D7 is connected to the first terminal of the capacitor C20 and the voltage comparator U10 The forward input terminal of the capacitor C20 is grounded; the reverse input terminal of the voltage comparator U10 is connected to the output terminal of the voltage comparator U10, and the output terminal is connected to the input terminal of the main controller.

It should be noted that when the amplified voltage is input, because the voltage of the output pin 6 of the amplifier U7 is higher than the voltage of the capacitor C20, the diode D6 and the diode D7 conduct forward, so the capacitor C20 is charged, and C20 can be charged to this amplified voltage When it is smaller than the input amplifying voltage, that is, the voltage of pin 6 is lower than the voltage across C20, due to the unidirectional conductivity of the diode, the input voltage cannot charge the capacitor, so from the back, the output is still the same as the input. maintain constant amplification voltage.

Further, in order to prevent the voltage on the capacitor C20 from not leaking out in time to cause errors in the next detection, the peak hold circuit also includes: a triode Q4, a resistor R19 and a resistor R20; the collector of the triode is connected to the cathode of the diode D7, The base stage is connected to the first end of the resistor R19 and the first end of the resistor R20, and the emitter is grounded; the second end of the resistor R20 is grounded; the second end of the resistor R19 is used to input a discharge signal.

It can be understood that, in order to maintain the stability of the circuit structure, the peak hold circuit may also be connected with a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C18, a capacitor C19, a resistor R17 and a resistor R18.

It should be noted that transistor Q4, resistor R19 and resistor R20 form a discharge circuit, that is, resistor R19 controlled by P1.7, resistor R20, and transistor Q4. When P1.7 outputs a discharge signal, that is, a high level, Q4 is turned on and C20 is discharged to ground.

It should be noted that, as shown in Figure 4, the photoelectric conversion circuit includes: a photodiode PIN, an analog switch, a resistor R1, a resistor R2 and a resistor R3; the input end of the photodiode PIN is used to collect the optical signal of the light source to be detected, and the output end Connect the first end of the resistor R1, the first end of the resistor R2 and the first end of the resistor R3 respectively; the second end of the resistor R1, the second end of the resistor R2 and the second end of the resistor R3 are respectively connected to the first end of the analog switch. The transmission channel, the second transmission channel and the third transmission channel, wherein the resistance values of the resistance R1, the resistance R2 and the resistance R3 are different; the input end of the analog switch is connected with the gain selection circuit, and the output end is connected with the voltage comparison circuit and the main controller .

Further, the photoelectric conversion circuit further includes: an amplifier U4; the reverse input terminal of the amplifier U4 is connected to the output terminal of the photodiode PIN, the forward input terminal is grounded, and the output terminal is negatively fed back to the reverse input terminal of the amplifier U4.

It should be noted that the amplifier U4 is connected with a negative feedback loop, so it has the characteristics of "virtual short" and "virtual off", and the positive input terminal is grounded, that is, the potential to ground is 0V. Therefore, according to the "virtual short" characteristic, the voltage at the reverse input terminal is also 0V. At the same time, the input current of the reverse input terminal is also 0A from the "virtual break" characteristic. Therefore, the relationship between the input current I _in and the output voltage V _out can be obtained as:

V _out =I _in *R,

In the formula, R is the resistance value corresponding to the selected feedback resistor.

It can be understood that, as shown in FIG. 4 , in order to stabilize the circuit structure, a capacitor C7 , a capacitor C2 and a capacitor C1 are also connected to the photoelectric conversion circuit.

Specifically, the main controller in this embodiment adopts the STC12C5A chip, which is an enhanced version of the 8051 single-chip microcomputer, which has the advantages of high speed, low power consumption, and strong anti-interference, and is low in price, which can reduce product manufacturing costs.

Specifically, the display circuit LCD12864 in this embodiment is used as a display screen to display the optical power result on the screen. Because the response of the diode's current to the input light is given in the manual, or it has been measured by itself. Therefore, in the program, as long as the detected ADC value is converted into the corresponding analog voltage value, and then the analog voltage value is divided by the magnification to obtain the photoresponse current value, and the optical power can be obtained from the corresponding relationship.

As shown in FIG. 5 , the working principle of the optical power meter in this embodiment is as follows: first, the PIN diode receives the light emitted by the light source to be detected, and responds to the corresponding photocurrent. Then the photocurrent enters the amplifier U4, because the positive power supply is supplied to the transmission channel A pin of the analog switch, that is, it is always high, so the default transmission channel of the analog switch is channel 1, that is, the resistor R3 is selected as the feedback resistor. The amplified voltage is output through a transmission channel. Then enter the voltage comparator U1. If the amplified voltage is less than the reference voltage Vref, the output of U1 is the negative power supply voltage value, and the negative power supply terminal of U1 is grounded, so the output is low level 0V at this time, and the transmission channel of the analog switch remains unchanged. Then the amplified voltage is kept stable through the peak hold circuit, and then the main controller performs ADC to detect the peak voltage and display the detected optical power value.

If the amplified voltage > ADC reference voltage Vref, the voltage comparator U1 outputs the voltage value of the forward power supply terminal of U1, which is +5V, and then the relay core coil is energized to attract the armature, so that 5V is connected to the self-locking circuit. In the self-locking circuit, because the amplifier U3 introduces positive feedback, and the forward input terminal of the amplifier U3 is higher than the reverse input terminal by two diode conduction voltages, the self-locking is realized through positive feedback, and finally the amplifier U3 outputs +5V voltage. The +5V voltage output by the amplifier U3 is input to the pin of the analog switch to control the B pin, thereby changing the transmission channel, and the level status of the channel selection pin "CBA" of the analog switch becomes 011, so the channel 3 is turned on, that is Choose resistor 10K as feedback resistor. If there is no self-locking circuit, once the transmission channel of the analog switch is changed, the output of the voltage comparator U1 returns to a low level, which will cause the analog switch to be turned on again. Therefore, in order to obtain a high level for the transmission channel pin of the analog switch, a "self-locking" circuit is added. The reverse terminal voltage of the op amp in the "self-locking" circuit is 0.5VCC, so when the self-locking circuit has no input, the output of the amplifier U3 is always low.

In addition, when the output of the amplifier U3 is a high level, the iron core coil of the relay RL2 is energized, and the armature is attracted, thereby entering the voltage comparator U8. Its working principle is the same as above, when 10k is used as a feedback resistor, that is, the amplification factor is 104, and the amplified voltage is higher than the ADC reference voltage Vref, then the comparator U8 outputs a high level, and the output of the self-locking circuit always outputs a high level, thus The level of the three-channel control pin "CBA" of the analog switch is set to 111, and the 1k resistor is selected as the feedback resistor, that is, the adjustment of the magnification is realized again. Through this method, adaptive range detection is realized. When a test is completed, the discharge pin of the relay is controlled by the single-chip microcomputer, the operational amplifier in the "self-locking" circuit is disconnected and the capacitor in the peak hold circuit is discharged, thereby restoring the initial state.

In the gain selection circuit diagram, P2.3 and P2.4 are detection pins, which are used to determine which feedback resistor the ADC result is in, that is, the result obtained under the amplification factor.

In this embodiment, after the photoelectric conversion circuit converts the detected optical signal into a voltage signal, the gain selection circuit automatically and adaptively adjusts the signal used for amplification in the photoelectric conversion circuit according to the comparison result between the voltage signal and the preset reference voltage. The amplification factor of the voltage signal, then the main controller measures the optical power of the amplified voltage signal, and finally the optical power is output by the display circuit. Compared with the manual shifting photoelectric power meter in the prior art, the operation is simple, Moreover, the circuit structure is protected, thereby solving the technical problems that the existing manual shifting photoelectric power meter is troublesome to operate and easy to burn the circuit.

As mentioned above, the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand: The technical solutions described in the embodiments are modified, or some technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions in the embodiments of the present application.

Claims (10)

1. a photoelectric power meter, is characterized in that, comprises: main controller, photoelectric conversion circuit, gain selection circuit, main controller and display circuit; The photoelectric conversion circuit is used to convert the collected optical signal of the light source to be detected into a voltage signal; The gain selection circuit is used to compare the voltage signal with a preset reference voltage, and select an amplification factor for amplifying the voltage signal in the photoelectric conversion circuit according to the comparison result; the main controller, configured to measure the voltage signal amplified by the amplification factor to obtain the corresponding optical power; The display circuit is used for displaying the optical power. 2. The photoelectric power meter according to claim 1, wherein the gain selection circuit comprises: a voltage comparison circuit and a self-locking circuit; The voltage comparison circuit is used to compare the voltage signal with a preset reference voltage to obtain a comparison result; The self-locking circuit is configured to input the comparison result to the photoelectric conversion circuit, so that the photoelectric conversion circuit selects an amplification factor for amplifying the voltage signal according to the comparison result. 3. The photoelectric power meter according to claim 2, wherein the voltage comparison circuit comprises: a voltage comparator U1, a relay RL2 and a voltage comparator U8; The self-locking circuit includes: a first self-locking circuit and a second self-locking circuit; The positive input terminal of the voltage comparator U1 is connected to the output terminal of the photoelectric conversion circuit, and the output terminal is connected to the pin 1 of the relay RL2 through the first self-locking circuit; The pin 2 of the relay RL2 is grounded, the pin 3 is connected to the output end of the photoelectric conversion circuit, and the pin 4 is connected to the forward input end of the voltage comparator U8; The output end of the voltage comparator U8 is connected to the photoelectric conversion circuit through the second self-locking circuit. 4. The photoelectric power meter according to claim 3, wherein the first self-locking circuit comprises: a relay RL1, a diode D1, a diode D2, an amplifier U3 and a relay RL5; The pin 1 of the relay RL1 is connected to the output end of the voltage comparator U1, the pin 2 is grounded, the pin 3 is connected to the power supply voltage, and the pin 4 is connected to the forward input end of the amplifier U3 and the diode D1. Positive pole and pin 3 of the relay RL5; The cathode of the diode D1 is connected to the anode of the diode D2; The cathode of the diode D2 is connected to the reverse input end of the amplifier U3; The output end of the amplifier U3 is connected to the pin 1 of the relay RL2; Pin 1 of the relay RL5 is used to input the first control signal, pin 5 is connected to the pin 1 of the relay RL2, and both pins 2 and 4 are grounded. 5. The photoelectric power meter according to claim 3, wherein the second self-locking circuit comprises: a relay RL3, a diode D4, a diode D5, an amplifier U9 and a relay RL4; The pin 1 of the relay RL3 is connected to the output end of the voltage comparator U8, the pin 2 is grounded, the pin 3 is connected to the power supply voltage, and the pin 4 is connected to the forward input end of the amplifier U9 and the diode D4. Positive pole and pin 3 of the relay RL4; The cathode of the diode D4 is connected to the anode of the diode D5; The cathode of the diode D5 is connected to the reverse input end of the amplifier U9; The output end of the amplifier U9 is connected to the photoelectric conversion circuit; Pin 1 of the relay RL4 inputs the second control signal, pin 5 is connected to the photoelectric conversion circuit, and both pins 2 and 4 are grounded. 6. The photoelectric power meter according to claim 1, further comprising: a peak hold circuit; The input end of the peak hold circuit is connected to the output end of the gain selection circuit, and the output end is connected to the input end of the main controller; The peak hold circuit is used for maintaining the peak value of the amplified voltage signal. 7. The photoelectric power meter according to claim 6, wherein the peak hold circuit comprises: an amplifier U7, a diode D6, a diode D7, a diode D8, a capacitor C20 and a voltage comparator U10; The forward input end of the amplifier U7 is connected to the output end of the gain selection circuit, the reverse input end is connected to the output end of the voltage comparator U10 and the positive electrode of the diode D8, and the output end is connected to the negative electrode of the diode D8 and the anode of the diode D6; The cathode of the diode D6 is connected to the anode of the diode D7; The cathode of the diode D7 is connected to the first end of the capacitor C20 and the forward input end of the voltage comparator U10; The second end of the capacitor C20 is grounded; The inverting input terminal of the voltage comparator U10 is connected to the output terminal of the voltage comparator U10, and the output terminal is connected to the input terminal of the main controller. 8. The photoelectric power meter according to claim 7, wherein the peak hold circuit further comprises: a triode Q4, a resistor R19 and a resistor R20; The collector of the triode is connected to the cathode of the diode D7, the base is connected to the first end of the resistor R19 and the first end of the resistor R20, and the emitter is grounded; The second end of the resistor R20 is grounded; The second end of the resistor R19 is used for inputting a discharge signal. 9. The photoelectric power meter according to claim 1, wherein the photoelectric conversion circuit comprises: a photodiode PIN, an analog switch, a resistor R1, a resistor R2 and a resistor R3; The input end of the photodiode PIN is used to collect the light signal of the light source to be detected, and the output end is respectively connected to the first end of the resistor R1, the first end of the resistor R2 and the first end of the resistor R3; The second end of the resistor R1, the second end of the resistor R2 and the second end of the resistor R3 are respectively connected to the first transmission channel, the second transmission channel and the third transmission channel of the analog switch, wherein all the The resistance values of the resistance R1, the resistance R2 and the resistance R3 are different; The input end of the analog switch is connected with the gain selection circuit, and the output end is connected with the voltage comparison circuit and the main controller. 10. The photoelectric power meter according to claim 9, wherein the photoelectric conversion circuit further comprises: an amplifier U4; The reverse input terminal of the amplifier U4 is connected to the output terminal of the photodiode PIN, the forward input terminal is grounded, and the output terminal is negatively fed back to the reverse input terminal of the amplifier U4.

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