CN211148788U - Super capacitor capacity and internal resistance rapid detection device - Google Patents
Super capacitor capacity and internal resistance rapid detection device Download PDFInfo
- Publication number
- CN211148788U CN211148788U CN201921138379.7U CN201921138379U CN211148788U CN 211148788 U CN211148788 U CN 211148788U CN 201921138379 U CN201921138379 U CN 201921138379U CN 211148788 U CN211148788 U CN 211148788U
- Authority
- CN
- China
- Prior art keywords
- super capacitor
- switch
- internal resistance
- capacity
- port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 148
- 238000001514 detection method Methods 0.000 title description 5
- 238000012360 testing method Methods 0.000 claims abstract description 92
- 238000005259 measurement Methods 0.000 claims abstract description 21
- 238000012031 short term test Methods 0.000 claims abstract 2
- 230000001276 controlling effect Effects 0.000 claims description 15
- 230000001105 regulatory effect Effects 0.000 claims description 4
- 238000000034 method Methods 0.000 abstract description 12
- 238000004458 analytical method Methods 0.000 abstract description 4
- 238000004364 calculation method Methods 0.000 abstract description 4
- 238000004134 energy conservation Methods 0.000 abstract description 3
- 238000012545 processing Methods 0.000 abstract description 3
- 238000007599 discharging Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000003825 pressing Methods 0.000 description 4
- 230000001131 transforming effect Effects 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000013024 troubleshooting Methods 0.000 description 1
Images
Abstract
The utility model discloses a super capacitor capacity and internal resistance short-term test device. The device consists of a singlechip IC1, a display output module IC2, a power supply module, a controllable quick-charging branch circuit IC4, a standard super capacitor bank and a binding clip, wherein two pole terminals of the super capacitor to be tested are connected into a test circuit through the binding clip. The device carries out measurement and calculation according to the charge conservation and energy conservation principles, and achieves the purpose of measuring the capacity and the internal resistance of the super capacitor to be measured in a short time. The device can complete the measurement work of the capacity and the internal resistance of 1 super capacitor within the shortest 5s of 2 times of key operations of an operator, has the characteristics of high speed and high precision, and can directly guide data in the measurement process into a PC (personal computer) or other intelligent electronic equipment for analysis and processing besides local display of the measurement result.
Description
Technical Field
The invention belongs to the technical field of automatic measuring instruments.
Background
At present, super capacitors are increasingly adopted as standby power supplies in distribution automation terminals, electric energy metering devices and the like applied to power grids, and the characteristics of multiple charging and discharging times and long service life of a single super capacitor are mainly benefited. However, when a plurality of super capacitors are used in series, the fault rate is very high in daily operation and maintenance work, the fault type is basically overvoltage damage, and through troubleshooting and analysis, the fault reason is mainly due to the fact that the rated voltage of the single super capacitor is very low, for example: the maximum working voltage of the 100F super capacitor is only 2.7V, a plurality of super capacitors are connected in series to be used, the individual capacities and the internal resistances of the super capacitors are greatly different, even if the super capacitors are manufactured by the same manufacturer, the same model, the same capacity and the same production batch, and overvoltage is generated on partial super capacitors to damage the super capacitors after the super capacitors are charged and discharged for many times. If the super capacitor is strictly detected before use, the super capacitors with similar capacity meeting the application requirement are screened out and then put together for use, and the problem can be solved undoubtedly. However, the existing multimeter can measure the capacitance of 20uF at most, the capacitance and the internal resistance of the super capacitor cannot be detected, and other meters are not available in the market for selection, so that a set of simple and easy-to-use super capacitor capacitance and internal resistance rapid detection device is urgently needed to be developed.
Disclosure of Invention
In order to solve the above problems, the present invention provides a device for rapidly detecting the capacity and the internal resistance of a super capacitor, comprising: the power supply module is used for supplying power to the single chip module, and a single chip working power supply output terminal Vcc of the power supply module is connected with a power supply pin of the single chip; the system comprises a singlechip IC1, an IO1 port of the singlechip IC1 is used for connecting and controlling an electronic switch K6, an IO2 port is used for connecting and controlling an electronic switch K7, an AD1 port is used for measuring the terminal voltage of a standard super capacitor, an IO3 port is used for connecting and controlling the electronic switch K9, an AD2 port is used for measuring the terminal voltage of the super capacitor to be measured, an AD3 port is used for measuring the terminal voltage of a discharge resistor, an interrupt 1 port IRQ1 receives a capacity test interrupt request generated by a capacity test key double switch K4, and an interrupt 2 port IRQ2 receives an internal resistance test interrupt request generated by K5; the display output module IC2 is connected with the singlechip IC1 through a serial port, is used for displaying the measurement result of the capacity and the internal resistance of the super capacitor to be tested and outputting dynamic data in the test, and can receive the parameter setting and the operation request of a user; one terminal of two external connecting terminals of the controllable quick charging branch circuit IC4 is connected with one end of a charging switch K2, and the other terminal is connected with a common terminal of a standard super capacitor selection switch K3, so that the controllable quick charging branch circuit IC4 is used for quickly charging a standard capacitor and preventing overcharging; the standard super capacitor bank is at least composed of 4 super capacitors with different capacity grades, the anodes of the super capacitors with different capacity grades are respectively connected with one branch terminal of the standard super capacitor selection switch K3, and the cathodes of the super capacitors with different capacity grades are grounded after being connected in parallel; one end of one switch of the capacity test key double switch K4 is connected with the public end of the standard super capacitor selection switch K3, the other end of one switch of the capacity test key double switch K4 is connected with one end of the current-limiting resistor R3, the other end of the current-limiting resistor R3 is connected with one end of the capacity test electronic switch K6, the other end of the capacity test electronic switch K6 is connected with the anode of the super capacitor to be tested, and the cathode of the super capacitor to be tested is grounded; one end of the other switch in the capacity test key double switch K4 is grounded, and the other end of the other switch in the capacity test key double switch K4 is connected with an interrupt pin IRQ1 of the singlechip IC 1; one end of one switch in the internal resistance test key double switch K5 is connected with the anode of the super capacitor to be tested, the other end of one switch in the internal resistance test key double switch K5 is connected with one end of an internal resistance test electronic switch K7, the other end of the internal resistance test electronic switch K7 is connected with one end of a discharge resistor R4, and the other end of the discharge resistor R4 is grounded; one end of the other switch in the internal resistance test electronic switch K7 is grounded, and the other end of the other switch in the internal resistance test electronic switch K7 is connected with an interrupt pin IRQ2 of the singlechip IC 1; and the two ends of the super capacitor to be measured are connected into the measuring device through the jointing clamp.
Preferably, the power supply module consists of a stabilized voltage power supply IC3, a power switch K1, an external power supply input terminal, a stabilized voltage charging output terminal Vi and a singlechip working power supply output terminal Vcc; the external power source input terminal is the terminal with 220V commercial power connection, and the live wire of 220V commercial power is connected through the external power source input terminal to K1 one end, and constant voltage power supply IC3 is connected to the K1 other end, and two output terminal of constant voltage power supply IC3 are steady voltage output terminal Vi, singlechip working power supply output terminal Vcc that charges respectively, steady voltage charge output terminal Vi with charge switch K2's one end links to each other, singlechip working power supply output terminal Vcc links to each other with singlechip IC1 power pin.
Preferably, the controllable fast charging branch circuit is formed by connecting a branch of a current-limiting resistor R1, a branch formed by connecting an electronic switch K8 and a current-limiting resistor R2 in series, and a branch of an electronic switch K9 in parallel.
In a preferred mode, the method for measuring the capacitance of the super capacitor to be measured comprises the following steps:
s1, controlling K6 to be in a position division by a port of a singlechip IO1, and measuring and recording the terminal voltage of a standard super capacitor by the singlechip IC1 through an AD1 port and the terminal voltage of a super capacitor to be measured through an AD2 port;
s2, pressing the capacity test key double switch K4, the standard super capacitor is opposite to the super capacitor C to be testedX0The charging loop of the single-chip microcomputer IC1 is conducted, and the capacity test key double switch K4 generates a capacity test interrupt request to the single-chip microcomputer IC1 through the interrupt 1 port IRQ 1;
s3, the single chip microcomputer IC1 responds to the capacity test interruption request and starts a single chip microcomputer capacity test interruption service program, the single chip microcomputer IO1 port in the single chip microcomputer capacity test interruption service program controls the capacity test electronic switch K6 to be closed, and the standard super capacitor continuously charges the super capacitor to be tested for a period of time;
s4, controlling K6 to be positioned again by the port of the single chip IO1, standing for a period of time, measuring the terminal voltage of the standard super capacitor by the port AD1 and the terminal voltage of the super capacitor to be measured by the port AD2 again by the single chip IC1, and recording;
s5 and the singlechip IC1 calculate the end voltage of the standard super capacitor and the super capacitor to be measured in the open circuit state through measuring the end voltage of the standard super capacitor and the end voltage of the super capacitor to be measured before and after charging and discharging according to the charge conservation principle, and obtain the capacity C of the super capacitor to be measured in a short timeX0Capacity C of the super capacitor to be measuredX0The calculation formula of (2) is as follows:
CX0=[(Un1-Un2)*Cn]/(UX2-UX1) (5)
in the formula, CX0For the capacity of the super capacitor to be measured, Un1Before capacity test operation, the singlechip IC1 measures the terminal voltage, U, of the standard super capacitor through an AD1 portn2Measuring the terminal voltage of a standard super capacitor for the AD1 port after the capacity test is finished, CnFor the standard supercapacitor capacity used, UX1For capacity testingThe front singlechip IC1 measures the terminal voltage U of the super capacitor to be measured through the AD2 portX2After the capacity test is finished, the singlechip IC1 measures the terminal voltage of the super capacitor to be tested through the AD2 port.
In a preferred mode, the method for measuring the internal resistance of the super capacitor to be measured comprises the following steps:
s1, controlling the internal resistance test electronic switch K7 to be in a branch position by the port of the single chip IO2, and measuring and recording the terminal voltage of the super capacitor to be tested by the port AD2 of the single chip IC 1;
s2, pressing the internal resistance test key double switch K5, conducting a discharging loop of the super capacitor to be tested to a discharging resistor R4, and generating an internal resistance test interrupt request to the singlechip IC1 through the internal resistance test key double switch K5 through an interrupt 2 port IRQ 2;
s3, the single chip microcomputer IC1 responds to the capacity test interrupt request and starts a single chip microcomputer internal resistance test interrupt service program, the single chip microcomputer IO2 port in the single chip microcomputer internal resistance test interrupt service program controls an internal resistance test electronic switch K7 to be closed, the single chip microcomputer IC1 starts to continuously measure the terminal voltage of the discharge resistor R4 in a short period through an AD3 port and calculates and records the terminal voltage, and when the preset measuring times are reached, the single chip microcomputer IC1 controls the internal resistance test electronic switch K7 to be in a position division mode;
s4, standing for a period of time, and measuring and recording the terminal voltage of the super capacitor to be measured through an AD2 port by the singlechip IC 1;
s5, the single chip microcomputer IC1 calculates the internal resistance R of the super capacitor to be measured in a short time according to the energy conservation principle by measuring the terminal voltage of the super capacitor to be measured in the open circuit state before and after discharge and the terminal voltage of the precise discharge resistor in the discharge process in a continuous short period and multiple timesXAnd simultaneously, the capacity C of the super capacitor to be measured can be calculated according to the charge conservation lawX1The calculation formula is as follows:
CX1=X/[R4*(UX3-UX4)](7)
RX=2*R4*Y/[(UX3+UX4)*X-2*Y](8)
in the formula of U3iTerminal voltages across the discharge resistor R4 measured for each short period, num is the number of times of continuously measuring the voltages across the discharge resistor R4, X is the average value of the terminal voltages across the discharge resistor R4 measured, Y is the average value of the squares of the terminal voltages across the discharge resistor R4 measured, R4 is the resistance of the discharge resistor, U is the voltage across the discharge resistor R4 measured for each short period, andX3before the operation of measuring the internal resistance, the singlechip IC1 measures the terminal voltage U of the super capacitor to be measured through an AD2 portX4After the internal resistance measurement is finished, the singlechip IC1 measures the end voltage C of the super capacitor to be measured through the AD2 portX1For measuring the capacity, R, of the supercapacitor to be measured during the internal resistance of the supercapacitorXThe resistance value of the super capacitor to be detected is obtained;
s6, mixing CX1And CX0Comparing, alarming when the relative error exceeds the limit value, and taking the capacity test result of the super capacitor to be tested as CX0And when the relative error is an accurate value and does not exceed a preset value, the single chip microcomputer outputs a measurement result to the display output module through a serial port.
The invention has the beneficial effects that: the device can complete the measurement of the capacity and the internal resistance of 1 super capacitor within the shortest 5s of 2 times of key operations of an operator, has the characteristics of high speed and high precision, and can directly guide data in the measurement process into a PC (personal computer) or other intelligent electronic equipment for analysis and processing besides local display of the measurement result.
Drawings
FIG. 1 is a schematic diagram of the overall structure of the device;
FIG. 2 is a schematic diagram of a power module configuration;
FIG. 3 is a schematic diagram of the structure of the single chip microcomputer and the display output module;
FIG. 4 is a circuit diagram of a controllable fast charge branch;
FIG. 5 is a schematic diagram of a supercapacitor capacity detection;
FIG. 6 is a schematic diagram of the detection of the internal resistance of the super capacitor.
Detailed Description
As shown in fig. 1, the device for rapidly detecting the capacity and the internal resistance of the super capacitor comprises a power module, wherein a single chip microcomputer working power supply output terminal Vcc of the power module is connected with a power pin of a single chip microcomputer and used for supplying power to the single chip microcomputer module; the system comprises a singlechip IC1, an IO1 port of the singlechip IC1 is used for connecting and controlling an electronic switch K6, an IO2 port is used for connecting and controlling an electronic switch K7, an AD1 port is used for measuring the terminal voltage of a standard super capacitor, an IO3 port is used for connecting and controlling the electronic switch K9, an AD2 port is used for measuring the terminal voltage of the super capacitor to be measured, an AD3 port is used for measuring the terminal voltage of a discharge resistor, an interrupt 1 port IRQ1 receives a capacity test interrupt request generated by a capacity test key double switch K4, and an interrupt 2 port IRQ2 receives an internal resistance test interrupt request generated by K5; the display output module IC2 is connected with the singlechip IC1 through a serial port, is used for displaying the measurement result of the capacity and the internal resistance of the super capacitor to be tested and outputting dynamic data in the test, and can receive the parameter setting and the operation request of a user; one terminal of two external connecting terminals of the controllable quick charging branch circuit IC4 is connected with one end of a charging switch K2, and the other terminal is connected with a common terminal of a standard super capacitor selection switch K3, so that the controllable quick charging branch circuit IC4 is used for quickly charging a standard capacitor and preventing overcharging; the standard super capacitor bank is at least composed of 4 super capacitors with different capacity grades, the anodes of the super capacitors with different capacity grades are respectively connected with one branch terminal of the standard super capacitor selection switch K3, and the cathodes of the super capacitors with different capacity grades are grounded after being connected in parallel; one end of one switch of the capacity test key double switch K4 is connected with the public end of the standard super capacitor selection switch K3, the other end of one switch of the capacity test key double switch K4 is connected with one end of the current-limiting resistor R3, the other end of the current-limiting resistor R3 is connected with one end of the capacity test electronic switch K6, the other end of the capacity test electronic switch K6 is connected with the anode of the super capacitor to be tested, and the cathode of the super capacitor to be tested is grounded; one end of the other switch in the capacity test key double switch K4 is grounded, and the other end of the other switch in the capacity test key double switch K4 is connected with an interrupt pin IRQ1 of the singlechip IC 1; one end of one switch in the internal resistance test key double switch K5 is connected with the anode of the super capacitor to be tested, the other end of one switch in the internal resistance test key double switch K5 is connected with one end of an internal resistance test electronic switch K7, the other end of the internal resistance test electronic switch K7 is connected with one end of a discharge resistor R4, and the other end of the discharge resistor R4 is grounded; one end of the other switch in the internal resistance test electronic switch K7 is grounded, and the other end of the other switch in the internal resistance test electronic switch K7 is connected with an interrupt pin IRQ2 of the singlechip IC 1; and the two ends of the super capacitor to be measured are connected into the measuring device through the jointing clamp.
The standard super capacitor bank in this embodiment is composed of 4 100F, 10F, 4F, and 1F nominal super capacitors, the standard super capacitor is a super capacitor whose capacity is measured by manually adopting a discharge method, a constant current source charging method, and a high-precision stopwatch timing method, and the actual measurement results of the standard super capacitor in this embodiment are 89.61F, 9.87F, 3.45F, and 0.91F.
The electronic switches can adopt at least one of a relay and a field effect transistor, the electronic switches K6, K7, K8 and K9 in the embodiment are 5V relays directly controlled by an IO port of a single chip microcomputer, and normally open contacts of K6, K7, K8 and K9 are connected into a loop.
As shown in fig. 3, the single chip microcomputer in this embodiment is a 5V single chip microcomputer, and the maximum IO output driving current of the single chip microcomputer can reach 20 mA. The display output module can adopt at least one of a liquid crystal panel, a Bluetooth serial port, a USB-to-serial port chip and the like, the display output module IC2 in the embodiment adopts the Bluetooth serial port chip and is connected with the single chip microcomputer through a serial port for finishing the display of the capacity and the internal resistance measurement result of the super capacitor to be tested and the dynamic data output in the test, and the parameter setting and the operation request of a user through the APP software of the smart phone can be received.
As shown in fig. 2, the power supply module is composed of a regulated power supply IC3, a power switch K1, an external power supply input terminal, a regulated charging output terminal Vi, and a single chip microcomputer working power supply output terminal Vcc; the external power supply input terminal is the terminal with 220V commercial power connection, and the live wire of 220V commercial power is connected through external power supply input terminal to K1's one end, and constant voltage power supply IC3 is connected to K1's the other end, and two output terminal of constant voltage power supply IC3 are steady voltage charging output terminal Vi, singlechip working power supply output terminal Vcc respectively, steady voltage charging output terminal Vi with charge switch K2's one end links to each other, singlechip working power supply output terminal Vcc links to each other with singlechip IC 1's power pin.
As shown in fig. 4, the controllable fast charging branch circuit is formed by connecting in parallel a branch formed by connecting in series a current-limiting resistor R1-10 Ω, an electronic switch K8 and a current-limiting resistor R2-2 Ω, and an electronic switch K9 branch; when the charging switch K2 is switched on, the standard super capacitor is charged by the branch R1, the single chip microcomputer automatically switches on the branch K8 and the branch K9 in sequence by detecting the rising rate of the end voltage of the standard super capacitor, the aim of rapidly charging the standard super capacitor is achieved by gradually reducing the resistance on a charging loop, and meanwhile, the phenomenon that the charging large current damages the device is avoided.
The process of measuring the capacitance of the super capacitor to be measured is as follows:
s1, controlling K6 to be in a position division by a port of a singlechip IO1, and measuring and recording the terminal voltage of a standard super capacitor by the singlechip IC1 through an AD1 port and the terminal voltage of a super capacitor to be measured through an AD2 port;
s2, pressing the capacity test key double switch K4, the standard super capacitor is opposite to the super capacitor C to be testedX0The charging loop of the single-chip microcomputer IC1 is conducted, and the capacity test key double switch K4 generates a capacity test interrupt request to the single-chip microcomputer IC1 through the interrupt 1 port IRQ 1;
s3, the single chip microcomputer IC1 responds to the capacity test interruption request and starts a single chip microcomputer capacity test interruption service program, the single chip microcomputer IO1 port in the single chip microcomputer capacity test interruption service program controls a capacity test electronic switch K6 to be closed, and the standard super capacitor continuously charges the super capacitor to be tested for 1S;
s4, controlling K6 to be positioned again by the port of the single chip IO1, standing for a period of time, measuring the terminal voltage of the standard super capacitor by the port AD1 and the terminal voltage of the super capacitor to be measured by the port AD2 again by the single chip IC1, and recording;
s5 and the singlechip IC1 calculate according to the charge conservation principle by measuring the terminal voltage of the standard super capacitor and the super capacitor to be measured in the open circuit state before and after charging and discharging, and obtain the super capacitor to be measured in a short timeCapacity C ofX0;
As shown in FIG. 5, a standard super capacitor CnAnd the super capacitor C to be testedX0When heavy discharge is carried out in a series circuit, the law of conservation of charge is observed, namely the total charge quantity of the two is not changed. When the initial end voltage is Un1C of (A)nTo an initial voltage of UX1C of (A)X0Charging through a series circuit, over a period of time, CnTerminal voltage of is decreased to Un2,CX0Terminal voltage of is increased to UX2;
According to the principle of charge conservation:
[(Un1-Un2)*Cn]=(UX2-UX1)*CX0(9)
transforming the formula to obtain:
CX0=[(Un1-Un2)*Cn]/(UX2-UX1) (10)
in the formula, CX0For the capacity of the super capacitor to be measured, Un1Before capacity test operation, the singlechip IC1 measures the terminal voltage, U, of the standard super capacitor through an AD1 portn2Measuring the terminal voltage of a standard super capacitor for the AD1 port after the capacity test is finished, CnFor the standard supercapacitor capacity used, UX1Before capacity test operation, the singlechip IC1 measures the terminal voltage U of the super capacitor to be tested through an AD2 portX2After the capacity test is finished, the singlechip IC1 measures the terminal voltage of the super capacitor to be tested through the AD2 port.
The process of measuring the internal resistance of the super capacitor to be measured comprises the following steps:
s1, controlling the internal resistance test electronic switch K7 to be in a branch position by the port of the single chip IO2, and measuring and recording the terminal voltage of the super capacitor to be tested by the port AD2 of the single chip IC 1;
s2, pressing the internal resistance test key double switch K5, conducting a discharging loop of the super capacitor to be tested to a discharging resistor R4, and generating an internal resistance test interrupt request to the singlechip IC1 through the internal resistance test key double switch K5 through an interrupt 2 port IRQ 2;
s3, the single chip microcomputer IC1 responds to the capacity test interrupt request and starts a single chip microcomputer internal resistance test interrupt service program, the single chip microcomputer IO2 port in the single chip microcomputer internal resistance test interrupt service program controls the internal resistance test electronic switch K7 to be closed, the single chip microcomputer IC1 continuously measures the terminal voltage of the discharge resistor R4 in a period of 0-10 ms through the AD3 port, calculates and records the terminal voltage, and when the number of times reaches 100, the single chip microcomputer IC1 controls the internal resistance test electronic switch K7 to be in a position division mode;
s4, standing for a period of time, and measuring and recording the terminal voltage of the super capacitor to be measured through an AD2 port by the singlechip IC 1;
s5, the single chip microcomputer IC1 calculates the internal resistance R of the super capacitor to be measured in a short time according to the energy conservation principle by measuring the terminal voltage of the super capacitor to be measured in the open circuit state before and after discharge and the terminal voltage of the precise discharge resistor in the discharge process in a continuous short period and multiple timesXMeanwhile, according to the law of conservation of charge, namely the integral of the current flowing through the discharge resistor to the time is equal to the reduction of the charge of the super capacitor to be measured, the capacity C of the super capacitor to be measured can be calculatedX1(ii) a As shown in FIG. 6, the capacity C of the super capacitor to be measuredX1And internal resistance RXThe calculation method of (2) is as follows:
according to the principle of charge conservation, the following can be obtained:
CX1*(UX3-UX4)=X/R4(12)
transforming the formula to obtain:
CX1=X/[R4*(UX3-UX4)](13)
according to the law of conservation of energy, the following can be obtained:
0.5*CX1*(UX3 2-UX4 2)-Y/R4=Y/RX(14)
transforming the formula to obtain:
RX=2*R4*Y/[(UX3+UX4)*X-2*Y](15)
in the formula, U3iTerminal voltage values across the discharge resistor R4 measured for each short period, num is the number of times of continuously measuring the voltage across the discharge resistor R4, X is the average value of the terminal voltages across the discharge resistor R4 measured, Y is the average value of the squares of the terminal voltages across the discharge resistor R4 measured, R4 is the resistance value of the discharge resistor, U is the value of the terminal voltage across the discharge resistor R4 measured for each short period, andX3before the operation of measuring the internal resistance, the singlechip IC1 measures the terminal voltage U of the super capacitor to be measured through an AD2 portX4After the internal resistance measurement is finished, the singlechip IC1 measures the end voltage C of the super capacitor to be measured through the AD2 portX1For measuring the capacity, R, of the supercapacitor to be measured during the internal resistance of the supercapacitorXThe resistance value of the super capacitor to be measured is obtained.
S6, the single chip microcomputer measures the volume value C of the current measurementX1And a capacity value C measured in a capacity test interrupt service routineX0By comparison, when (C)X1-CX0)/CX1When the error is more than 0.1, namely the relative error exceeds 10%, the singlechip sends a device measurement abnormal alarm signal to the display output module through the serial port to prompt an operator to check and replace the corresponding standard super capacitor or discharge resistor, and when the deviation does not exceed the preset value, the capacity test result of the super capacitor to be tested is CX0And the single chip microcomputer outputs the measurement result to the display output module through a serial port if the value is an accurate value.
The device can complete the measurement of the capacity and the internal resistance of 1 super capacitor within the shortest 5s of 2 times of key operations of an operator, has the characteristics of high speed and high precision, and can directly guide data in the measurement process into a PC (personal computer) or other intelligent electronic equipment for analysis and processing besides local display of the measurement result.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be able to cover the technical solutions and the inventive concepts of the present invention with the equivalent alternatives or modifications within the technical scope of the present invention.
Claims (3)
1. The utility model provides a super capacitor capacity and internal resistance short-term test device which characterized in that includes: the power supply module is used for supplying power to the single chip module, and a single chip working power supply output terminal Vcc of the power supply module is connected with a power supply pin of the single chip; the system comprises a singlechip IC1, an IO1 port of the singlechip IC1 is used for connecting and controlling an electronic switch K6, an IO2 port is used for connecting and controlling an electronic switch K7, an AD1 port is used for measuring the terminal voltage of a standard super capacitor, an IO3 port is used for connecting and controlling the electronic switch K9, an AD2 port is used for measuring the terminal voltage of the super capacitor to be measured, an AD3 port is used for measuring the terminal voltage of a discharge resistor, an interrupt 1 port IRQ1 receives a capacity test interrupt request generated by a capacity test key double switch K4, and an interrupt 2 port IRQ2 receives an internal resistance test interrupt request generated by K5; the display output module IC2 is connected with the singlechip IC1 through a serial port, is used for displaying the measurement result of the capacity and the internal resistance of the super capacitor to be tested and outputting dynamic data in the test, and can receive the parameter setting and the operation request of a user; one terminal of two external connecting terminals of the controllable quick charging branch circuit IC4 is connected with one end of a charging switch K2, and the other terminal is connected with a common terminal of a standard super capacitor selection switch K3, so that the controllable quick charging branch circuit IC4 is used for quickly charging a standard capacitor and preventing overcharging; the standard super capacitor bank is at least composed of 4 super capacitors with different capacity grades, the anodes of the super capacitors with different capacity grades are respectively connected with one branch terminal of the standard super capacitor selection switch K3, and the cathodes of the super capacitors with different capacity grades are grounded after being connected in parallel; one end of one switch of the capacity test key double switch K4 is connected with the public end of the standard super capacitor selection switch K3, the other end of one switch of the capacity test key double switch K4 is connected with one end of a current-limiting resistor R3, the other end of the current-limiting resistor R3 is connected with one end of the capacity test electronic switch K6, the other end of the capacity test electronic switch K6 is connected with the anode of the super capacitor to be tested, and the cathode of the super capacitor to be tested is grounded; one end of the other switch in the capacity test key double switch K4 is grounded, and the other end of the other switch in the capacity test key double switch K4 is connected with an interrupt pin IRQ1 of the singlechip IC 1; one end of one switch in the internal resistance test key double switch K5 is connected with the anode of the super capacitor to be tested, the other end of one switch in the internal resistance test key double switch K5 is connected with one end of an internal resistance test electronic switch K7, the other end of the internal resistance test electronic switch K7 is connected with one end of a discharge resistor R4, and the other end of the discharge resistor R4 is grounded; one end of the other switch in the internal resistance test electronic switch K7 is grounded, and the other end of the other switch in the internal resistance test electronic switch K7 is connected with an interrupt pin IRQ2 of the singlechip IC 1; and the two ends of the super capacitor to be measured are connected into the measuring device through the jointing clamp.
2. The device for rapidly detecting the capacity and the internal resistance of the super capacitor as claimed in claim 1, wherein the power module is composed of a regulated power supply IC3, a power switch K1, an external power supply input terminal, a regulated charging output terminal Vi and a singlechip working power supply output terminal Vcc; the external power source input terminal is the terminal with 220V commercial power connection, and the live wire of 220V commercial power is connected through the external power source input terminal to K1 one end, and constant voltage power supply IC3 is connected to the K1 other end, and two output terminal of constant voltage power supply IC3 are steady voltage output terminal Vi, singlechip working power supply output terminal Vcc that charges respectively, steady voltage charge output terminal Vi with charge switch K2's one end links to each other, singlechip working power supply output terminal Vcc links to each other with singlechip IC1 power pin.
3. The device for rapidly detecting the capacity and the internal resistance of the super capacitor as claimed in claim 1, wherein the controllable fast charging branch circuit is formed by connecting a branch of a current limiting resistor R1, a branch of an electronic switch K8 connected in series with a current limiting resistor R2, and a branch of an electronic switch K9 in parallel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201921138379.7U CN211148788U (en) | 2019-07-19 | 2019-07-19 | Super capacitor capacity and internal resistance rapid detection device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201921138379.7U CN211148788U (en) | 2019-07-19 | 2019-07-19 | Super capacitor capacity and internal resistance rapid detection device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN211148788U true CN211148788U (en) | 2020-07-31 |
Family
ID=71761021
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201921138379.7U Active CN211148788U (en) | 2019-07-19 | 2019-07-19 | Super capacitor capacity and internal resistance rapid detection device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN211148788U (en) |
-
2019
- 2019-07-19 CN CN201921138379.7U patent/CN211148788U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110687356B (en) | Super capacitor capacity and internal resistance rapid detection device | |
US4918368A (en) | System for charging batteries and measuring capacities and efficiencies thereof | |
US4746854A (en) | Battery charging system with microprocessor control of voltage and current monitoring and control operations | |
CN103308865B (en) | Method and electric equipment for calculating secondary battery SOC (system on a chip) and self-learning OCV (open circuit voltage)-SOC curve | |
CN101140316B (en) | Method and apparatus for monitoring the condition of a battery by measuring its internal resistance | |
CA2765824C (en) | Power pack partial failure detection and remedial charging control | |
US11374419B2 (en) | Portable electrical energy system and method for measuring a remaining electric quantity of a battery pack | |
CN102098368B (en) | Mobile phone | |
US8073644B2 (en) | Automatic voltage-identifying power supply device and method thereof | |
CN108490364B (en) | Device and method for testing consistency of lead-acid storage battery monomer | |
CN114726040A (en) | Power battery module equalization system and control method thereof | |
CN211148788U (en) | Super capacitor capacity and internal resistance rapid detection device | |
JP3977071B2 (en) | Vehicle power supply monitoring apparatus and method | |
CN211348477U (en) | Lithium battery protection board detection device | |
CN110828917B (en) | Storage battery online sulfur removal system and method based on variable frequency signals | |
CN107370859A (en) | Method of testing, test device and the storage device of the voltameter of mobile terminal | |
CN107390142B (en) | Transformer substation direct-current power supply state monitoring system and power supply state monitoring method | |
CN216563283U (en) | Online self-maintenance system for storage battery | |
CN111403830B (en) | Lithium battery safety monitoring system | |
CN213181889U (en) | Test circuit, PCBA controller and electrical equipment | |
CN2336506Y (en) | Control device for charger | |
US20220285957A1 (en) | Cell Fault Detection in Batteries with Parallel Cells | |
CN108562863A (en) | The test method and device that remaining capacity is shown | |
CN201909830U (en) | Test circuit of mobile power source protective plate | |
CN206557329U (en) | A kind of USB electric discharge agings electronic constant current load device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |