CN211127727U - Identification circuit for money storage box - Google Patents
Identification circuit for money storage box Download PDFInfo
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- CN211127727U CN211127727U CN201922237875.4U CN201922237875U CN211127727U CN 211127727 U CN211127727 U CN 211127727U CN 201922237875 U CN201922237875 U CN 201922237875U CN 211127727 U CN211127727 U CN 211127727U
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Abstract
The utility model discloses an identification circuit of storage cash case for produce a low frequency emission signal, low frequency emission signal reads through the ID number to the storage cash case, and discernment storage cash case, identification circuit includes: the power supply input end of the power supply management module is connected with power supply voltage; the power supply end of the analog counting module is connected with the power supply output end of the power supply management module; the power supply end of the frequency generation module is connected with the power supply output end of the power supply management module, and the input end of the frequency generation module is connected with the signal output end of the analog counting module; and the power end of the power amplification module is connected with the power output end of the power management module, and the input end of the power amplification module is connected with the output end of the frequency generation module. Has the advantages that: the identification circuit is used for generating a low-frequency emission signal, reading the ID number of the storage money box and identifying the storage money box, and is simple in structure, high in identification efficiency and convenient to popularize.
Description
Technical Field
The utility model relates to an integrated circuit technical field especially relates to a recognition circuit of storage cash case.
Background
With the rapid development of economy in China, the bank vault relates to a large amount of work of cash warehousing and leaving everyday. In the process of cash warehousing, the safety problem is extremely important. How to rapidly access or take out the storage money box is also an important problem for bank personnel or escort personnel.
At present, the signal identification between the cabinet body and the money storage box is easily interfered by various peripheral signals, the existing identification mode is more complex, and simultaneously, the identification is inaccurate, so that the problem of poor identification efficiency is caused. Therefore, there is a need for an identification circuit that can quickly identify or efficiently identify a stored money case.
SUMMERY OF THE UTILITY MODEL
In view of the above problems in the prior art, an identification circuit for a deposit box is provided.
The specific technical scheme is as follows:
the utility model discloses an identification circuit of storage cash case, wherein, identification circuit is used for producing a low frequency emission signal, the low frequency emission signal reads through the ID number to the storage cash case, and discerns the storage cash case, identification circuit includes:
the power supply input end of the power supply management module is connected with a power supply voltage;
the power end of the analog counting module is connected with the power output end of the power management module;
the power end of the frequency generation module is connected with the power output end of the power management module, and the input end of the frequency generation module is connected with the signal output end of the analog counting module;
and the power end of the power amplification module is connected with the power output end of the power management module, and the input end of the power amplification module is connected with the output end of the frequency generation module.
Preferably, the power management module includes:
the power supply input end is connected with the power supply voltage;
the base electrode of the first triode is connected to the power input end through a first resistor, and the emitting electrode of the first triode is connected with the ground terminal;
the base electrode of the second triode is connected to the collector electrode of the first triode through a second resistor, the emitter electrode of the second triode is connected to a first power supply end, and the collector electrode of the second triode is connected to the power supply output end of the power supply management module;
the third resistor is connected between the base electrode and the emitting electrode of the second triode;
the anode of the first diode is connected to the collector of the second triode, and the cathode of the first diode is connected to the emitter of the second triode;
and the first capacitor is connected between the collector electrode of the second triode and the grounding end.
Preferably, the analog counting module includes:
the power end of the counting chip is connected with the power output end of the power management module;
the crystal oscillator is connected to the first clock signal end and the second clock signal end of the counting chip through a fourth resistor;
the fifth resistor is connected with the first clock signal end and the second clock signal end of the counting chip;
the second capacitor is connected between the fourth resistor and the grounding end;
and the third capacitor is connected between the fifth resistor and the grounding end.
Preferably, the frequency generation module includes:
the power end of the frequency generation unit is connected with the power output end of the power management module, and the input end of the frequency generation unit is connected with the signal output end of the analog counting module;
the input end of the frequency adjusting unit is connected with the output end of the frequency generating unit, and the input end of the power amplifying module is connected with the output end of the frequency adjusting unit.
Preferably, the frequency generation unit includes:
a base electrode of the third triode is connected to the signal output end of the analog counting module through a sixth resistor, a collector electrode of the third triode is connected to the power output end of the power management module, and an emitting electrode of the third triode is connected to the output end of the frequency generation unit through a seventh resistor;
and the base electrode of the fourth triode is connected to the base electrode of the third triode, the collector electrode of the fourth triode is connected with the grounding end, and the emitter electrode of the fourth triode is connected with the emitter electrode of the third triode.
Preferably, the frequency adjustment unit includes:
a first end of the wireless interface is connected with the output end of the frequency generation unit;
the fourth capacitor is connected between the second end of the wireless interface and the grounding end;
the anode of the second diode is connected to the second end of the wireless interface through an eighth resistor, and the cathode of the second diode is connected to the ground end through a fifth capacitor;
the sixth capacitor is connected between the cathode of the second diode and the output end of the frequency adjusting unit;
the seventh capacitor is connected between the output end of the frequency adjusting unit and the grounding end;
the ninth resistor is connected between the output end of the frequency adjusting unit and the grounding end;
the tenth resistor is connected between the output end of the frequency adjusting unit and the grounding end;
the anode of the third diode is connected to the output end of the frequency adjusting unit, and the cathode of the third diode is connected to the ground end;
and the anode of the fourth diode is connected to the ground terminal, and the cathode of the fourth diode is connected to the output end of the frequency adjusting unit.
Preferably, the power amplification module includes:
the positive phase input end of the first operational amplifier is connected with the output end of the frequency adjusting unit, and the negative phase input end of the first operational amplifier is connected to the ground end through an eleventh resistor;
a twelfth resistor connected between the inverting input terminal of the first operational amplifier and the output terminal of the first operational amplifier;
the eighth capacitor is connected between the inverting input end of the first operational amplifier and the output end of the first operational amplifier;
a ninth capacitor connected between the output terminal of the first operational amplifier and a thirteenth resistor;
a power supply terminal of the second operational amplifier is connected to the power supply output terminal of the power supply management module, a positive phase input terminal of the second operational amplifier is connected to the thirteenth resistor, and an inverted phase input terminal of the second operational amplifier is connected to the ground terminal through a fourteenth resistor;
a fifteenth resistor connected between the inverting input terminal of the second operational amplifier and a second power supply terminal;
a sixteenth resistor connected between the inverting input terminal of the second operational amplifier and the non-inverting input terminal of the second operational amplifier;
a seventeenth resistor connected between the sixteenth resistor and the ground terminal;
the eighteenth resistor is respectively connected between the positive phase input end of the second operational amplifier and the output end of the second operational amplifier;
and the tenth capacitor is connected between the power supply end and the grounding end of the second operational amplifier.
The technical scheme of the utility model beneficial effect lies in: the utility model provides an identification circuit of storage cash case for produce the low frequency transmission signal, this low frequency transmission signal reads through the ID number to the storage cash case to discernment storage cash case, this identification circuit simple structure, recognition efficiency is high, facilitate promotion.
Drawings
Embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings. The drawings are, however, to be regarded as illustrative and explanatory only and are not restrictive of the scope of the invention.
Fig. 1 is a circuit block diagram of an identification circuit of a cash box according to an embodiment of the present invention;
fig. 2 is a circuit diagram of a power management module of an identification circuit of a cash box according to an embodiment of the present invention;
fig. 3 is a circuit diagram of an analog counting module of the identification circuit of the money box according to the embodiment of the present invention;
fig. 4 is a circuit diagram of a frequency generation unit of an identification circuit of a cash box according to an embodiment of the present invention;
fig. 5 is a circuit diagram of a frequency adjustment unit of an identification circuit of a cash box according to an embodiment of the present invention;
fig. 6 is a circuit diagram of a power amplification module of an identification circuit of a money box according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that, in the present invention, the embodiments and features of the embodiments may be combined with each other without conflict.
The present invention will be further described with reference to the accompanying drawings and specific embodiments, but the present invention is not limited thereto.
The utility model discloses an identification circuit 1 of storage cash case, wherein, identification circuit 1 is used for producing a low frequency emission signal, and low frequency emission signal reads through the ID number to the storage cash case to discernment storage cash case, identification circuit 1 includes:
the power supply management module 10 is characterized in that a power supply input end ANT _ ON of the power supply management module 10 is connected with a power supply voltage;
the POWER supply end VCC of the analog counting module 11 is connected with the POWER supply output end ANT _ POWER of the POWER supply management module 10;
a frequency generation module 12, wherein a POWER supply end of the frequency generation module 12 is connected to a POWER output end ANT _ POWER of the POWER management module 10, and an input end of the frequency generation module 12 is connected to a signal output end C L K _ OUT of the analog counting module 11;
and a POWER supply end of the POWER amplification module 13 is connected to the POWER output end ANT _ POWER of the POWER management module 10, and an input end of the POWER amplification module 13 is connected to the output end of the frequency generation module 12.
Through the technical scheme of the identification circuit of the money storage box, as shown in fig. 1, the identification circuit 1 of the money storage box is an identification part between a deposit cabinet body and the money storage box, wherein the deposit cabinet body is used for storing money boxes, ticket packages or money package/pickup business, and the financial handover operation of banks is realized.
In this embodiment, the analog counting module is used for generating a pulse signal with a fixed frequency to simulate and form a high-low pulse signal with a fixed period; the frequency generation module is used for receiving high and low pulse signals, generating a pulse signal with a fixed period through periodic control, sending out a low-frequency signal according to an electromagnetic induction principle, and setting an RC resonant circuit to adjust the low-frequency signal; the power amplification module is used for receiving the adjusted low-frequency signal and amplifying the low-frequency signal so as to output a high-power low-frequency signal; namely, the identification circuit is adopted to generate a low-frequency signal with larger power, so that the ID card of the money box can be read, and the money box can be identified.
Further, the identification circuit 1 of this storage cash box is used for producing the low frequency transmission signal, and this low frequency transmission signal reads through the ID number to the storage cash box to discernment storage cash box, this identification circuit 1 of storage cash box can reach real-time identification, has improved recognition efficiency, and circuit structure is simple, and recognition efficiency is high, the facilitate promotion.
In the above technical solution, as a preferred embodiment, as shown in fig. 2, the power management module 1 includes:
the power input end ANT _ ON is connected with power voltage;
a first triode Q1, wherein the base of the first triode Q1 is connected to the power input terminal ANT _ ON through a first resistor R1, and the emitter of the first triode Q1 is connected to the ground terminal GND;
a second transistor Q2, wherein the base of the second transistor Q2 is connected to the collector of the first transistor Q1 through a second resistor R2, the emitter of the second transistor Q2 is connected to a first POWER terminal S1, and the collector of the second transistor Q2 is connected to the POWER output ANT _ POWER of the POWER management module 10;
a third resistor R3 connected between the base and the emitter of the second triode Q1;
a first diode D1, the anode of the first diode D1 is connected to the collector of the second triode Q2, and the cathode of the first diode D1 is connected to the emitter of the second triode Q2;
a first capacitor C1 is connected between the collector of the second transistor Q2 and the ground GND.
In this embodiment, the power supply of the analog counting module 11, the frequency generating module 12 and the power amplifying module 13 is controlled by the second transistor Q2, that is, the power management module 1 serves as a core power supply unit of the entire identification circuit 21. The first triode Q1 is an NPN triode, the model of the first triode Q1 can be 9013, the second triode Q2 is a PNP triode, the model of the second triode Q2 can be FZT751, the model of the first diode D1 can be 1N4007, the first power supply end S1 is 5V, the parameter of the first resistor R1 is 1K ohm, the parameter of the second resistor R2 is 2K ohm, the parameter of the third resistor R3 is 10K ohm, and the parameter of the first capacitor C1 is 0.1 uF.
In the above technical solution, as a preferred embodiment, as shown in fig. 3, the analog counting module 11 includes:
the POWER supply end VCC of the counting chip U1 is connected with the POWER supply output end ANT _ POWER of the POWER supply management module 10;
a crystal oscillator X1 connected to the first clock signal terminal C L K and the second clock signal terminal C L K of the counting chip U1 through a fourth resistor R4;
a fifth resistor R5 connected to the first clock signal terminal C L K and the second clock signal terminal C L K1 of the counting chip U1;
a second capacitor C2 connected between the fourth resistor R4 and the ground GND;
a third capacitor C3 connected between the fifth resistor R5 and the ground GND;
a fourth capacitor C4 connected between the power terminal of the counting chip U1 and the ground GND.
In this embodiment, the counting chip U1 generates a pulse signal with a fixed frequency by count modulation to form a signal with a fixed frequency in an analog manner, wherein the crystal oscillator X1 is a crystal oscillator with a fixed frequency for generating a specific pulse signal, the counting chip U1 is 74HC4060, the output pin C L K _ RST1 of the counting chip U1 is connected to the reset pin of the input pin C L K _ RST2, after counting to a certain value, the output pin C L K _ RST1 generates a high pulse, the high pulse is sent to the reset pin C L K _ RST2, the circuit performs pulse counting of a new period for simulating a fixed frequency period, and a regular high-low pulse is output through the output pin C L K _ OUT.
In the above technical solution, the parameter of the crystal oscillator X1 is 4MHz, the parameter of the fourth resistor R4 is 330 ohms, the parameter of the fifth resistor R5 is 1M ohms, the parameter of the second capacitor C2 is 22pF, the parameter of the third capacitor C3 is 22pF, and the parameter of the fourth capacitor C4 is 0.1 uF.
In the above technical solution, as a preferred embodiment, as shown in fig. 4, the frequency generation module 12 includes:
a frequency generating unit 120, wherein a POWER supply end of the frequency generating unit 120 is connected to the POWER output end ANT _ POWER of the POWER management module 10, and an input end of the frequency generating unit 120 is connected to the signal output end C L K _ OUT of the analog counting module 11;
wherein, the frequency generation unit 120 includes:
a third transistor Q3, wherein the base of the third transistor Q3 is connected to the signal output terminal C L K _ OUT of the analog counting module 11 through a sixth resistor R6, the collector of the third transistor Q3 is connected to the POWER output terminal ANT _ POWER of the POWER management module 10, and the emitter of the third transistor Q3 is connected to the output terminal ANT _ IN of the frequency generation unit 120 through a seventh resistor R7;
and a fourth triode Q4, wherein the base of the fourth triode Q4 is connected to the base of the third triode Q3, the collector of the fourth triode Q4 is connected with the ground terminal GND, and the emitter of the fourth triode Q4 is connected with the emitter of the third triode Q3.
In this embodiment, the output of the output terminal C L K _ OUT of the counting chip U1 is a high-low pulse with a certain rule, when the output terminal C L K _ OUT is a high pulse, the third transistor Q3 is turned on, a current flows through the antenna, when the output terminal C L K _ OUT is a low pulse, the third transistor Q3 is turned off, no current flows, that is, by periodically controlling the on-off of the third transistor Q3, a pulse signal with a fixed period is generated, and a low-frequency signal is emitted according to the electromagnetic induction principle.
In the above technical solution, the third triode Q3 is an NPN type triode with a model number of 8050, the fourth triode Q4 is a PNP type triode with a model number of 8550, the parameter of the sixth resistor R6 is 100 ohms, and the parameter of the seventh resistor R7 is 15 ohms.
In the above technical solution, as a preferred embodiment, as shown in fig. 5, the frequency generation module 12 includes:
the input end of the frequency adjusting unit 121 is connected to the output end OUT of the frequency generating unit 120, and the input end of the power amplifying module 13 is connected to the output end OUT of the frequency adjusting unit 120.
Wherein, the frequency adjusting unit 121 includes:
a wireless interface J1, a first end of the wireless interface J1 is connected to the output ANT _ IN of the frequency generation unit 120;
a fifth capacitor C5 connected between the second terminal of the wireless interface J1 and the ground GND;
a second diode D2, wherein the anode of the second diode D2 is connected to the second end of the wireless interface J2 through an eighth resistor R8, and the cathode of the second diode D2 is connected to the ground GND through a sixth capacitor C6;
a seventh capacitor C7 connected between the cathode of the second diode D2 and the output terminal OUT of the frequency adjustment unit 121;
an eighth capacitor C8 connected between the output terminal OUT of the frequency adjustment unit 121 and the ground terminal GND;
a ninth resistor R9 connected between the output terminal OUT of the frequency adjustment unit 121 and the ground GND;
a tenth resistor R10 connected between the output terminal OUT of the frequency adjustment unit 121 and the ground terminal GND;
a third diode D3, wherein the anode of the third diode D3 is connected to the output terminal OUT of the frequency adjustment unit 121, and the cathode of the third diode D3 is connected to the ground GND;
a fourth diode D4, wherein the anode of the fourth diode D4 is connected to the ground GND, and the cathode of the fourth diode D4 is connected to the output OUT of the frequency adjustment unit 121.
In this embodiment, the second tube D2 controls the current flow according to the one-way conductivity, and the series resistor and the parallel capacitor form an RC resonant circuit to adjust the low frequency signal. The parameter of the fifth capacitor C5 is 1nF, the parameter of the sixth capacitor C6 is 2200pF, the parameter of the seventh capacitor C7 is 0.01uF, the parameter of the eighth capacitor C8 is 1000pF, the parameter of the eighth resistor R8 is 100 ohms, the parameter of the ninth resistor R9 is 470K ohms, the parameter of the tenth resistor R10 is 470K ohms, and the models of the second diode D2, the third diode D3, and the fourth diode D4 are all 1N 4148.
In the above-described technical solution, as a preferred embodiment, as shown in fig. 6, the power amplification module 13 includes:
a first operational amplifier U2, wherein the non-inverting input terminal of the first operational amplifier U2 is connected to the output terminal OUT of the frequency adjustment unit 121, and the inverting input terminal of the first operational amplifier U2 is connected to the ground GND through an eleventh resistor R11;
a twelfth resistor R12 connected between the inverting input terminal of the first operational amplifier U2 and the output terminal of the first operational amplifier U2;
a ninth capacitor C9 connected between the inverting input terminal of the first operational amplifier U2 and the output terminal of the first operational amplifier U2;
a tenth capacitor C10 connected between the output terminal of the first operational amplifier U2 and a thirteenth resistor R13;
a second operational amplifier U3, in which a POWER supply terminal of the second operational amplifier U3 is connected to the POWER output terminal ANT _ POWER of the POWER management module 10, a non-inverting input terminal of the second operational amplifier U3 is connected to the thirteenth resistor R13, and an inverting input terminal of the second operational amplifier U3 is connected to the ground GND through a fourteenth resistor R14;
a fifteenth resistor R15 connected between the inverting input terminal of the second operational amplifier U3 and a second power source terminal S2;
a sixteenth resistor R16 connected between the inverting input terminal of the second operational amplifier U3 and the non-inverting input terminal of the second operational amplifier U3;
a seventeenth resistor R17 connected between the sixteenth resistor R16 and the ground GND;
an eighteenth resistor R18 connected between the non-inverting input terminal of the second operational amplifier U3 and the output terminal of the second operational amplifier U2, respectively;
an eleventh capacitor C11 is connected between the power terminal of the second operational amplifier U3 and the ground GND.
In this embodiment, the power amplifying module 13 includes a first operational amplifier U2, a second operational amplifier U3, a filter circuit, and a feedback gain circuit, wherein the types of the first operational amplifier U2 and the second operational amplifier U3 are L M358, the non-inverting input terminal of the first operational amplifier U2 is connected to the low-frequency signal adjusted by the frequency adjusting unit 121, the low-frequency signal is enhanced by the feedback gain circuit and output by the output terminal D _ OUT, in order to avoid noise interference of the power supply, the power filter circuit is also added to remove noise, and finally the 125k low-frequency signal is amplified to generate a high-power low-frequency signal.
In the above technical solution, the second power source terminal S2 provides a voltage of +5V, the parameter of the eleventh resistor R11 is 620 ohms, the parameter of the twelfth resistor R12 is 68K ohms, the parameter of the thirteenth resistor R13 is 1K ohms, the parameter of the fourteenth resistor R14 is 10K ohms, the parameter of the fifteenth resistor R15 is 10K ohms, the parameter of the sixteenth resistor R16 is 220K ohms, the parameter of the seventeenth resistor R17 is 4M7 ohms, the parameter of the eighteenth resistor R18 is 2M2 ohms, the parameter of the ninth capacitor C9 is 56pF, the parameter of the tenth capacitor C10 is 0.1uF, and the parameter of the eleventh capacitor C11 is 0.1 uF.
Further, this identification circuit 1 is used for producing the low frequency emission signal, and this low frequency emission signal reads through the ID number to the storage cash case to discernment storage cash case, this identification circuit simple structure, the discernment is efficient, facilitate promotion.
The above description is only an example of the preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and those skilled in the art should be able to realize the equivalent alternatives and obvious variations of the present invention.
Claims (7)
1. An identification circuit for a stored chest of money, said identification circuit being adapted to generate a low frequency transmission signal which identifies said stored chest of money by reading an ID number of said stored chest of money, said identification circuit comprising:
the power supply input end of the power supply management module is connected with a power supply voltage;
the power end of the analog counting module is connected with the power output end of the power management module;
the power end of the frequency generation module is connected with the power output end of the power management module, and the input end of the frequency generation module is connected with the signal output end of the analog counting module;
and the power end of the power amplification module is connected with the power output end of the power management module, and the input end of the power amplification module is connected with the output end of the frequency generation module.
2. The identification circuit of claim 1, wherein the power management module comprises:
the power supply input end is connected with the power supply voltage;
the base electrode of the first triode is connected to the power input end through a first resistor, and the emitting electrode of the first triode is connected with the ground terminal;
the base electrode of the second triode is connected to the collector electrode of the first triode through a second resistor, the emitter electrode of the second triode is connected to a first power supply end, and the collector electrode of the second triode is connected to the power supply output end of the power supply management module;
the third resistor is connected between the base electrode and the emitting electrode of the second triode;
the anode of the first diode is connected to the collector of the second triode, and the cathode of the first diode is connected to the emitter of the second triode;
and the first capacitor is connected between the collector electrode of the second triode and the grounding end.
3. The identification circuit of claim 1, wherein the analog counting module comprises:
the power end of the counting chip is connected with the power output end of the power management module;
the crystal oscillator is connected to the first clock signal end and the second clock signal end of the counting chip through a fourth resistor;
the fifth resistor is connected with the first clock signal end and the second clock signal end of the counting chip;
the second capacitor is connected between the fourth resistor and the grounding end;
the third capacitor is connected between the fifth resistor and the grounding end;
and the fourth capacitor is connected between the power supply end and the grounding end of the counting chip.
4. The identification circuit of claim 1, wherein the frequency generation module comprises:
the power end of the frequency generation unit is connected with the power output end of the power management module, and the input end of the frequency generation unit is connected with the signal output end of the analog counting module;
the input end of the frequency adjusting unit is connected with the output end of the frequency generating unit, and the input end of the power amplifying module is connected with the output end of the frequency adjusting unit.
5. The identification circuit of claim 4, wherein the frequency generation unit comprises:
a base electrode of the third triode is connected to the signal output end of the analog counting module through a sixth resistor, a collector electrode of the third triode is connected to the power output end of the power management module, and an emitting electrode of the third triode is connected to the output end of the frequency generation unit through a seventh resistor;
and the base electrode of the fourth triode is connected to the base electrode of the third triode, the collector electrode of the fourth triode is connected with the grounding end, and the emitter electrode of the fourth triode is connected with the emitter electrode of the third triode.
6. The identification circuit of claim 4, wherein the frequency adjustment unit comprises:
a first end of the wireless interface is connected with the output end of the frequency generation unit;
the fifth capacitor is connected between the second end of the wireless interface and the grounding end;
the anode of the second diode is connected to the second end of the wireless interface through an eighth resistor, and the cathode of the second diode is connected to the ground end through a sixth capacitor;
the seventh capacitor is connected between the cathode of the second diode and the output end of the frequency adjusting unit;
the eighth capacitor is connected between the output end of the frequency adjusting unit and the grounding end;
the ninth resistor is connected between the output end of the frequency adjusting unit and the grounding end;
the tenth resistor is connected between the output end of the frequency adjusting unit and the grounding end;
the anode of the third diode is connected to the output end of the frequency adjusting unit, and the cathode of the third diode is connected to the ground end;
and the anode of the fourth diode is connected to the ground terminal, and the cathode of the fourth diode is connected to the output end of the frequency adjusting unit.
7. The identification circuit of claim 4, wherein the power amplification module comprises:
the positive phase input end of the first operational amplifier is connected with the output end of the frequency adjusting unit, and the negative phase input end of the first operational amplifier is connected to the ground end through an eleventh resistor;
a twelfth resistor connected between the inverting input terminal of the first operational amplifier and the output terminal of the first operational amplifier;
the ninth capacitor is connected between the inverting input end of the first operational amplifier and the output end of the first operational amplifier;
a tenth capacitor connected between the output terminal of the first operational amplifier and a thirteenth resistor;
a power supply terminal of the second operational amplifier is connected to the power supply output terminal of the power supply management module, a positive phase input terminal of the second operational amplifier is connected to the thirteenth resistor, and an inverted phase input terminal of the second operational amplifier is connected to the ground terminal through a fourteenth resistor;
a fifteenth resistor connected between the inverting input terminal of the second operational amplifier and a second power supply terminal;
a sixteenth resistor connected between the inverting input terminal of the second operational amplifier and the non-inverting input terminal of the second operational amplifier;
a seventeenth resistor connected between the sixteenth resistor and the ground terminal;
the eighteenth resistor is respectively connected between the positive phase input end of the second operational amplifier and the output end of the second operational amplifier;
and the eleventh capacitor is connected between the power supply end and the grounding end of the second operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922237875.4U CN211127727U (en) | 2019-12-13 | 2019-12-13 | Identification circuit for money storage box |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922237875.4U CN211127727U (en) | 2019-12-13 | 2019-12-13 | Identification circuit for money storage box |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211127727U true CN211127727U (en) | 2020-07-28 |
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ID=71706980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922237875.4U Expired - Fee Related CN211127727U (en) | 2019-12-13 | 2019-12-13 | Identification circuit for money storage box |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211127727U (en) |
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2019
- 2019-12-13 CN CN201922237875.4U patent/CN211127727U/en not_active Expired - Fee Related
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Granted publication date: 20200728 |