CN211090045U

CN211090045U - Peak-valley current controlled dimming circuit

Info

Publication number: CN211090045U
Application number: CN201921789669.8U
Authority: CN
Inventors: 王纪周; 董云鹏; 柯乃泉; 毛昭祺
Original assignee: Hangzhou Upowertek Power Supply Co ltd
Current assignee: Hangzhou Upowertek Power Supply Co ltd
Priority date: 2019-10-23
Filing date: 2019-10-23
Publication date: 2020-07-24
Anticipated expiration: 2029-10-23

Abstract

The utility model relates to an electronic circuit technical field, concretely relates to peak-valley current control's dimming circuit, including dimming circuit, control circuit and dimmer, dimming circuit includes sampling resistor R, inductance L, electric capacity C1, electronic switch Q1 and electronic switch Q2, electronic switch Q1 one end is connected with power Vin, the electronic switch Q1 other end is connected with electronic switch Q2 one end, electronic switch Q2 other end ground connection, electric capacity C1 is parallelly connected with load R L, electric capacity C1 one end is connected with inductance L one end, the inductance L other end is connected with electronic switch Q1 and electronic switch Q2's link, electric capacity C1 other end is through sampling resistor R ground connection, sampling resistor R and electric capacity C1's tie point regard as the sampling point and is connected with control circuit.

Description

Peak-valley current controlled dimming circuit

Technical Field

The utility model relates to an electronic circuit technical field, concretely relates to peak-valley current control's dimmer circuit.

Background

The light emitting diode is abbreviated as L ED, a commonly used light emitting device emits light by energy released by electron and hole recombination, the commonly used light emitting device is widely applied in the field of illumination, L ED can efficiently convert electric energy into light energy and has wide application in modern society, such as illumination, flat panel display, medical devices and the like, a load L ED lamp needs a driving circuit to drive the light to work, rectifying alternating current into stable direct current to drive a load L ED lamp is an important dimming technology at present, wherein a PWM dimming mode is the most important dimming mode at present.

For example, Chinese patent CN108235502A, published 2018, 6.29, discloses a constant current driving method and circuit for dimming a load L ED lamp, wherein the constant current driving method and circuit comprises a triode transistor and a load L ED lamp, the triode transistor comprises a field effect transistor or a triode, and the load L ED lamp is electrically connected with a source or a drain of the field effect transistor or an emitter or a collector of the triode, the method comprises the following steps of arranging a voltage adjusting module electrically connected with a grid of the field effect transistor or a base of the triode, wherein the voltage adjusting module adjusts the voltage of the source of the field effect transistor or the emitter of the triode by adjusting the voltage of the grid of the field effect transistor or the base of the triode, so that the current output to the load L ED lamp is adjusted to achieve the purpose of dimming, the constant current driving method and circuit for dimming the load L ED lamp can adjust the brightness of the load L ED lamp to be very low, and the flicker of the load L ED lamp cannot be visible to naked eyes, but in the technical scheme, the flicker condition of the load L ED lamp requires very high power consumption and the high cost and rectification are required under the condition that the input power is.

Disclosure of Invention

The to-be-solved technical problem of the utility model is: the current dimming technology has the technical problems of high cost, large ripple and poor dimming stability. A low power consumption peak-to-valley current controlled dimmer circuit is provided which requires low power supply voltage stability.

In order to solve the technical problem, the invention adopts the technical scheme that the dimming circuit controlled by peak-valley current comprises a dimming circuit, a control circuit and a dimmer, wherein the dimming circuit comprises a sampling resistor R, an inductor L, a capacitor C1, an electronic switch Q1 and an electronic switch Q2, one end of the electronic switch Q1 is connected with a power Vin, the other end of the electronic switch Q1 is connected with one end of the electronic switch Q2, the other end of the electronic switch Q2 is grounded, the capacitor C1 is connected with the load R L in parallel, one end of the capacitor C9 is connected with one end of the inductor L, the other end of the inductor L is connected with the connection ends of the electronic switch Q1 and the electronic switch Q2, the other end of the capacitor C1 is grounded through the sampling resistor R, the connection point of the sampling resistor R and the capacitor C1 serves as a sampling point and is connected with the control circuit, the dimmer, the control end of the electronic switch Q1 and the control end of the electronic switch Q2 are connected with the control circuit, the dimmer, the control end of the inductor C2 serves as a sampling resistor R2, when the alternating current flowing through the inductor R is filtered, the alternating current is lower limit value of the charging current of the inductor ED, the alternating current is set as a high limit value, and the alternating current can be set as a high limit value which is set when the alternating current which is lower limit value of the alternating current which is lower limit value of the alternating current of.

Preferably, the control circuit comprises an integrated operational amplifier U1, an integrated operational amplifier U2, an integrated operational amplifier U3, an integrated operational amplifier U4, an integrated operational amplifier U5, a sampling resistor R1, a sampling resistor R2, a sampling resistor R3, a diode D1, a diode D2 and an RS trigger, wherein a sampling point is connected with the in-phase end of the integrated operational amplifier U1 and the first end of the sampling resistor R3, the inverting input end of the integrated operational amplifier U1 is grounded through the sampling resistor R1, one end of the sampling resistor R2 is connected with the inverting input end of the integrated operational amplifier U1, the other end of the sampling resistor R2 is connected with the output end of the integrated operational amplifier U1, the output end of the integrated operational amplifier U1 is connected with the in-phase end of the integrated operational amplifier U3 and the inverting input end of the integrated operational amplifier U4, the inverting input end of the integrated operational amplifier U3 is connected with a reference signal Ihigh, the in-phase end of, the output end of the integrated operational amplifier U3 is connected with the S end of the RS trigger, the output end of the integrated operational amplifier U4 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the R end of the RS trigger, the Q end of the RS trigger is connected with the control end of the electronic switch Q2, the non-end of the RS trigger Q is connected with the control end of the electronic switch Q1, one end of the sampling resistor R3 is connected with the sampling point, the other end of the sampling resistor R3 is connected with one end of the sampling resistor R4 and the inverting input end of the integrated operational amplifier U2, the inverting end of the integrated operational amplifier U2 is grounded, the output end of the integrated operational amplifier U2 is connected with the other end of the sampling resistor R4 and the inverting end of the integrated operational amplifier U5, the inverting input end of the integrated operational amplifier U5 is connected with the reference signal Ilow, the output end of the integrated operational amplifier U5 is connected with the anode of the diode D2.

The working process of the circuit is that when the current of a sampling point is between a reference signal Ihigh and a reference signal Ilow, the R input end and the S input end of an RS trigger are both at a low level, the RS trigger keeps a state unchanged, an inductor L and a capacitor C1 keep discharging or charging, when an inductor L and a capacitor C1 are in a discharging state, after a period of time, the current flowing through an inductor L0 is lower than a set lower limit value, an integrated operational amplifier U4 outputs a high level to enable the RS trigger to overturn, an electronic switch Q1 is turned on, the electronic switch Q2 is turned off, a capacitor C1 is charged through an inductor L1, at the moment when an electronic switch Q1 is turned on, an inductor L also obtains charging energy, the current flowing through a sampling resistor R is from right to left, the sampling point is at a positive potential, the sampling current is marked as a small positive current, when the voltage of the capacitor C1 is continuously charged and is higher than a set upper limit value, the current of the capacitor C1 causes the load L to be too high, the current flowing through an inductor L and the inductor R L and the sampling resistor R reaches a set upper limit value, the integrated operational amplifier U28 drives the inductor U L to start to drive the lamp to be lower limit value, the lamp discharge of the inductor RS switch RS 847, the lamp, the inductor R, the lamp discharge of the inductor R5 is started to be stable discharge voltage, the inductor R, the lamp discharge of the inductor R, the inductor R95 is set lower limit value is set lower limit value.

When the brightness of the load L ED lamp is adjusted to be higher, the sampling current of the inductor L is lower than the set lower limit value before the discharge is finished, the sampling point is always at a positive potential, when the brightness of the load L ED lamp is adjusted to be lower, if the discharge of the inductor L is finished, and the sampling current is still higher than the set lower limit value, the capacitor C1 discharges through the inductor L and the sampling resistor R, the current flowing through the sampling resistor R is from left to right, a negative potential, namely a negative current, is collected at the sampling point, when the negative potential is collected at the sampling point, the integrated operational amplifier U3 outputs a low level, the negative potential is reversely amplified by the integrated operational amplifier U2 and then outputs a high level together with the reference signal Ilow, if the negative potential is greater than the reference signal Ilow, the integrated operational amplifier U5 outputs a high level, the RS flip-flop is turned over, the inductor L and the capacitor C1 are recharged, and the set upper limit.

Preferably, the electronic switch Q1 and the electronic switch Q2 are both N-MOS transistors.

Preferably, the capacitor C1 is an electrolytic capacitor, the positive electrode of the electrolytic capacitor is connected to the inductor, and the negative electrode of the electrolytic capacitor is connected to the sampling resistor R.

Preferably, the dimmer comprises a single chip microcomputer U7 and a 0-10V dimming signal generator, the 0-10V dimming signal generator is connected to a port of the single chip microcomputer U7 through a voltage dividing resistor, the single chip microcomputer U7 converts the 0-10V dimming signal into two paths of PWM signals, the two paths of PWM signals are filtered by an RC and then serve as reference signals Ihigh and Ilow, and the difference value between the Ihigh and the Ilow is a constant value.

Instead, the dimmer comprises a conductor seat, an insulating frame, a plurality of left resistance wires, a plurality of right resistance wires, a left contact block, a right contact block, an insulating sliding handle, a sampling resistor R13 and a sampling resistor R14, wherein the plurality of left resistance wires are arranged and fixed on the left side of the conductor seat, the plurality of right resistance wires are arranged and fixed on the right side of the conductor seat, the left resistance wires and the right resistance wires are arranged in an aligned mode, the lower ends of the left resistance wires and the right resistance wires are conducted with the conductor seat, the upper ends of the left resistance wires and the right resistance wires are fixedly connected with the insulating frame, the insulating sliding handle is connected onto the insulating frame in a sliding mode, the left contact block and the right contact block are both fixed onto the insulating sliding handle, the left contact block and the right contact block are both equal in length to the arrangement length of the left resistance wires and the right resistance wires, the left contact block is abutted against the left resistance wires, the right contact block is abutted against the right resistance wires, the left resistance wires are smaller in diameter than the right resistance wires, the left contact block is connected with a direct current power supply Vcc, the right contact block is connected with the sampling resistor R14 and the electrical group R13 in sequence, the voltage is used as a signal Ihigh, the sampling resistor R14 and the output of the sampling resistor R358625, so that the left resistance wire is kept as a single reference resistance wire, and the left resistance wire, and the output resistance.

Instead, the dimmer comprises an upper contact block, a lower contact block, an upper resistance wire, a lower resistance wire, a dimming knob, a sampling resistor R13 and a sampling resistor R14, wherein a rotating arm is fixedly installed on the dimming knob, the upper contact block and the lower contact block are both installed on the rotating arm, the lower contact block is closer to the dimming knob relative to the upper contact block, the upper contact block is abutted to the upper resistance wire, the lower contact block is abutted to the lower resistance wire, the upper resistance wire and the lower resistance wire are the same in thickness and conductivity, the left end of the upper resistance wire is connected to the left end of the lower resistance wire, the lower contact block is connected to a direct current power supply Vcc, the upper contact block is sequentially connected to the sampling resistor R14 and a resistor group R13 and then is grounded, the voltage at the connection position of the upper resistance wire and the lower resistance wire is used as a reference signal Ihigh, the connection end of the sampling resistor R14 and the sampling resistor R13 is used as a reference signal Il, when the dimming knob rotates, the rotating arm is driven to rotate, and the resistance wire and the resistance of the upper resistance wire and the lower resistance wire and the sampling.

The utility model has the advantages of use inductance L storage electric energy, electric capacity C1 plays the effect of the alternating current component in the electric current of energy storage and filtering flow through inductance L, through sampling resistance R both ends voltage, can obtain the electric current of flowing through inductance L, when inductance L's electric current is less than and sets for the lower limit value, charge for inductance L through the circuit, when inductance L's electric current is higher than and sets for the upper limit value, stop charging, thereby obtain enough little load L ED lamp drive current of electric current fluctuation range through this technical scheme, the technical scheme who adjusts luminance of direct current linearity is provided, the circuit is simple, the power supply electric energy almost all is consumed by load L ED lamp, the energy consumption of circuit is little.

Drawings

Fig. 1 is a schematic diagram of a dimming circuit according to an embodiment.

FIG. 2 is a schematic diagram of a control circuit according to an embodiment.

Fig. 3 is a schematic diagram of a three-dimmer embodiment.

Fig. 4 and 5 are schematic structural diagrams of three dimmers according to an embodiment.

Fig. 6 is a schematic diagram of a four-dimmer configuration according to an embodiment.

Fig. 7 is a timing diagram of the voltage at each punctuation point during dimming of the control circuit.

Fig. 8 is a timing chart of voltages at respective points in the dimming process of the control circuit when the dimming voltage is small.

Wherein: 1. the light-adjusting device comprises a left contact block, 2, a left resistance wire, 3, a conductor seat, 4, an insulating frame, 5, an insulating sliding handle, 6, a right contact block, 7, a right resistance wire, 8, an upper contact block, 9, a lower contact block, 10, an upper resistance wire, 11, a lower resistance wire, 12, a rotating arm, 13 and a light-adjusting knob.

Detailed Description

The following provides a more detailed description of the present invention, with reference to the accompanying drawings.

The first embodiment is as follows:

a dimming circuit controlled by peak-valley current is disclosed, as shown in FIG. 1, the present embodiment includes a dimming circuit, a control circuit and a dimmer, the dimming circuit includes a sampling resistor R, an inductor L, a capacitor C1, an electronic switch Q1 and an electronic switch Q2, one end of the electronic switch Q1 is connected with a power source Vin, the other end of the electronic switch Q1 is connected with one end of the electronic switch Q2, the other end of the electronic switch Q2 is grounded, the capacitor C2 is connected in parallel with a lamp of a load 2 ED, one end of the capacitor C2 is connected with one end of the inductor 2, the other end of the inductor 2 is connected with the connection end of the electronic switch Q2 and the electronic switch Q2, the other end of the capacitor C2 is grounded through the sampling resistor R, the connection point of the sampling resistor R and the capacitor C2 serves as a sampling point and is connected with the control circuit, the sampling point collects current flowing through the inductor 2, the control terminal of the dimmer, the control terminal of the electronic switch Q2 and the control terminal of the electronic switch Q2 are connected with the control circuit, when the magnitude of the AC current flowing through the inductor C2 is lower limit value of the half-wave of the inductor ED is set as the charging current of the inductor, the inductor ED is lower limit value of the inductor, the charging circuit is set as the lower limit value of the charging current of the inductor C2.

As shown in fig. 2, the control circuit includes an integrated operational amplifier U1, an integrated operational amplifier U2, an integrated operational amplifier U3, an integrated operational amplifier U4, an integrated operational amplifier U5, a sampling resistor R1, a sampling resistor R2, a sampling resistor R3, a diode D1, a diode D2, and an RS flip-flop, the sampling point is connected to the non-inverting terminal of the integrated operational amplifier U1 and the first terminal of the sampling resistor R3, the non-inverting terminal of the integrated operational amplifier U1 is grounded through the sampling resistor R1, one terminal of the sampling resistor R2 is connected to the non-inverting terminal of the integrated operational amplifier U1, the other terminal of the sampling resistor R2 is connected to the output terminal of the integrated operational amplifier U1, the output terminal of the integrated operational amplifier U1 is connected to the non-inverting terminal of the integrated operational amplifier U3 and the non-inverting terminal of the integrated operational amplifier U4, the non-inverting terminal of the integrated operational amplifier U3 is connected to the reference, the output end of the integrated operational amplifier U3 is connected with the S end of the RS trigger, the output end of the integrated operational amplifier U4 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the R end of the RS trigger, the Q end of the RS trigger is connected with the control end of the electronic switch Q2, the non-end of the RS trigger Q is connected with the control end of the electronic switch Q1, one end of the sampling resistor R3 is connected with the sampling point, the other end of the sampling resistor R3 is connected with one end of the sampling resistor R4 and the inverting input end of the integrated operational amplifier U2, the inverting end of the integrated operational amplifier U2 is grounded, the output end of the integrated operational amplifier U2 is connected with the other end of the sampling resistor R4 and the inverting end of the integrated operational amplifier U5, the inverting input end of the integrated operational amplifier U5 is connected with the reference signal Ilow, the output end of the integrated operational amplifier U5 is connected with the anode of the diode D2.

The operation process of the circuit is that as shown in fig. 7, when the sampling point current is between the reference signal Ihigh and the reference signal Ilow, the R input end and the S input end of the RS flip-flop are both at low level, the RS flip-flop is kept in a constant state, the inductor L and the capacitor C1 are kept discharged or charged, when the inductor L and the capacitor C1 are in a discharged state, the current flowing through the inductor L0 is lower than a set lower limit value after a period of time, the integrated operational amplifier U4 outputs a high level to turn over the RS flip-flop, the electronic switch Q1 is turned on, the electronic switch Q2 is turned off, the capacitor C1 is charged through the inductor L1, at the instant the electronic switch Q1 is turned on, the inductor L is also charged, the current flowing through the right-side sampling resistor R is from left, the sampling point is at a small positive level, the sampling current is marked as a positive current, when the capacitor C1 is continuously charged and has a voltage higher than a set upper limit value, the current flowing through the inductor R L is higher than a set upper limit value, the inductor R L is kept higher than a set upper limit value, the integrated operational amplifier C3, the integrated operational amplifier C switch Q L and the inductor C8656 is started to drive the lamp is started to discharge current, the lamp is kept at a lower limit value, the lower limit value of the inductor 847, the inductor islanded switch isn, the lamp is set lower limit value of the lamp is set, the lamp is set lower limit value of the lamp is reached.

When the brightness of the load L ED lamp is adjusted to be higher, the sampling current before the end of the discharge of the inductor L is lower than the set lower limit value, and the sampling point is always at a positive potential, as shown in fig. 8, when the brightness of the load L ED lamp is adjusted to be lower, if the discharge of the inductor L is completed, and the sampling current is still higher than the set lower limit value, the capacitor C1 discharges through the inductor L and the sampling resistor R, the current flowing through the sampling resistor R is from left to right, a negative potential, i.e., a negative current, is collected at the sampling point, when the negative potential is collected at the sampling point, the integrated operational amplifier U3 outputs a low level, the negative potential is reversely amplified by the integrated operational amplifier U2 and then outputs a high level together with the reference signal Ilow, if the negative potential is greater than the reference signal Ilow, the integrated operational amplifier U5 inverts the RS trigger, and recharges the inductor L and the capacitor C1, and sets the upper limit.

Example two:

the embodiment provides an alternative technical scheme of a dimmer on the basis of the first embodiment, wherein the dimmer comprises a single chip microcomputer U7 and a 0-10V dimming signal generator, the 0-10V dimming signal generator is connected to a port of the single chip microcomputer U7 through a voltage division resistor, the single chip microcomputer U7 converts the 0-10V dimming signal into a PWM signal, and the PWM signal is used as reference signals Ihigh and Ilow after RC filtering. The other structures are the same as the first embodiment, the PWM signal is generated by the singlechip, and the PWM signal is a mature and common prior art, so that the embodiment does not relate to software improvement and improvement of any method.

Example three:

in this embodiment, on the basis of the first embodiment, an alternative technical scheme of a dimmer is provided, as shown in fig. 4 and 5, in this embodiment, the dimmer includes a conductor base 3, an insulating frame 4, a plurality of left resistance wires 2, a plurality of right resistance wires 7, a left contact block 1, a right contact block 6, an insulating sliding handle 5, a sampling resistor R13 and a sampling resistor R14, the plurality of left resistance wires 2 are arranged and fixed on the left side of the conductor base 3, the plurality of right resistance wires 7 are arranged and fixed on the right side of the conductor base 3, the left resistance wires 2 and the right resistance wires 7 are arranged in alignment, the lower ends of the left resistance wires 2 and the right resistance wires 7 are conducted with the conductor base 3, the upper ends of the left resistance wires 2 and the right resistance wires 7 are fixedly connected with the insulating frame 4, the insulating sliding handle 5 is slidably connected with the insulating frame 4, the left contact block 1 and the right contact block 6 are both fixed on the insulating sliding handle 5, the lengths of the left contact block 1 and the right contact block 6, the left contact block 1 is abutted with the left resistance wire 2, the right contact block 6 is abutted with the right resistance wire 7, the diameter of the left resistance wire 2 is smaller than that of the right resistance wire 7, the left contact block 1 is connected with a direct-current power supply Vcc, the right contact block 6 is sequentially connected with a sampling resistor R14 and an electric group R13 and then is grounded, the voltage at the conductor base 3 is used as a reference signal Ihigh, and the output voltage of the connection end of the sampling resistor R14 and the sampling resistor R13 is used as a reference signal Ilow. The rest of the structure is the same as the first embodiment.

As shown in fig. 3, the circuit illustrated therein explains the principle of maintaining the current difference △ I of the load L ED lamp constant, maintaining the current difference 630I = Ihigh-Ilow of the load L ED lamp constant, and considering the equivalent sampling resistance Rdet of the load L ED lamp as a constant value, the voltage U across the load L ED lamp is satisfied, when the adjustable resistance R11 is adjusted, U/(R11+ R12+ R13) R12= △ 1I Rdet = △ U, and when the adjustable resistance R11 is adjusted, the modified adjustable resistance R △ = U/(U- △ U) R △, i.e. as long as it is ensured that R △ = U/(U- △ U) R △, the adjustable resistance R △ is proportional to the change of R △ U, i.e. the value of the current difference △ I is maintained constant, the adjustable resistance R △ is considered as an operational input signal, and the operational current input to the operational amplifier is a constant value of the operational amplifier, and the operational amplifier may be considered as a signal input signal, and the operational current of the operational amplifier may be a constant value of the operational amplifier may be input of the operational amplifier △.

In the embodiment, the left contact block is in contact with N left resistance wires, the total resistance is 1/N of a single resistance wire, and the left resistance wire and the right resistance wire are different in thickness, so that when the insulating sliding handle slides in the same way, the R11 and the R12 can keep a fixed ratio relation, and △ U is kept unchanged, namely, the value of the current difference △ I is kept unchanged.

Example four:

in this embodiment, as shown in fig. 6, the dimmer includes an upper contact block 8, a lower contact block 9, an upper resistance wire 10, a lower resistance wire 11, a dimming knob 13, a sampling resistor R13, and a sampling resistor R14, the dimming knob 13 is fixedly installed with a rotating arm 12, the upper contact block 8 and the lower contact block 9 are both installed on the rotating arm 12, the lower contact block 9 is closer to the dimming knob 13 than the upper contact block 8, the upper contact block 8 abuts against the upper resistance wire 10, the lower contact block 9 abuts against the lower resistance wire 11, the upper resistance wire 10 and the lower resistance wire 11 have the same thickness and the same conductivity, the left end of the upper resistance wire 10 is connected to the left end of the lower resistance wire 11, the lower contact block 9 is connected to a dc power supply Vcc, the upper contact block 8 is connected to a sampling resistor R14 and a resistor group R13 in sequence and then grounded, the voltage at the connection point of the upper resistance wire 10 and the lower resistance wire 11 is used as a reference signal Ihigh 14, the output voltage of the sampling resistor R2 is used as an output voltage of a reference signal, and the upper resistance wire 13 is kept as a reference signal when the rotating arm 13, the rotating arm is rotated, and the rotating arm 13, the rotating arm is kept at a distance equal to be equal to a distance, I, the rotating arm 13.

The above-described embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention in any way, and other variations and modifications may be made without departing from the scope of the claims.

Claims

1. A peak-to-valley current controlled dimming circuit,

the dimming circuit comprises a dimming circuit, a control circuit and a dimmer, wherein the dimming circuit comprises a sampling resistor R, an inductor L, a capacitor C1, an electronic switch Q1 and an electronic switch Q2, one end of the electronic switch Q1 is connected with a power Vin, the other end of the electronic switch Q1 is connected with one end of the electronic switch Q2, the other end of the electronic switch Q2 is grounded, the capacitor C1 is connected with a load L ED lamp in parallel, one end of the capacitor C1 is connected with one end of the inductor L, the other end of the inductor L is connected with the connection ends of the electronic switch Q1 and the electronic switch Q2, the other end of the capacitor C1 is grounded through the sampling resistor R, the connection point of the sampling resistor R and the capacitor C1 serves as a sampling point and is connected with the control circuit, the sampling point collects current flowing through the inductor Q L, the dimmer, the control terminal of the electronic switch Q1 and the control terminal of the electronic switch Q2 are connected with the control circuit, and the control circuit periodically controls the on-off of the load ED lamp which flows through the electronic switch Q1 and the.

2. The peak-to-valley current controlled dimming circuit of claim 1,

the control circuit comprises an integrated operational amplifier U1, an integrated operational amplifier U2, an integrated operational amplifier U3, an integrated operational amplifier U4, an integrated operational amplifier U5, a sampling resistor R1, a sampling resistor R2, a sampling resistor R3, a diode D1, a diode D2 and an RS trigger, wherein a sampling point is connected with the in-phase end of the integrated operational amplifier U1 and the first end of the sampling resistor R3, the inverting input end of the integrated operational amplifier U1 is grounded through the sampling resistor R1, one end of the sampling resistor R2 is connected with the inverting input end of the integrated operational amplifier U1, the other end of the sampling resistor R2 is connected with the output end of the integrated operational amplifier U1, the output end of the integrated operational amplifier U1 is connected with the in-phase end of the integrated operational amplifier U3 and the inverting input end of the integrated operational amplifier U4, the inverting input end of the integrated operational amplifier U3 is connected with a reference signal Ihigh, the in-phase end, the output end of the integrated operational amplifier U3 is connected with the S end of the RS trigger, the output end of the integrated operational amplifier U4 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the R end of the RS trigger, the Q end of the RS trigger is connected with the control end of the electronic switch Q2, the non-end of the RS trigger Q is connected with the control end of the electronic switch Q1, one end of the sampling resistor R3 is connected with the sampling point, the other end of the sampling resistor R3 is connected with one end of the sampling resistor R4 and the inverting input end of the integrated operational amplifier U2, the inverting end of the integrated operational amplifier U2 is grounded, the output end of the integrated operational amplifier U2 is connected with the other end of the sampling resistor R4 and the inverting end of the integrated operational amplifier U5, the inverting input end of the integrated operational amplifier U5 is connected with the reference signal Ilow, the output end of the integrated operational amplifier U5 is connected with the anode of the diode D2.

3. A peak-to-valley current controlled dimming circuit according to claim 1 or 2,

the electronic switch Q1 and the electronic switch Q2 are both N-MOS tubes.

4. A peak-to-valley current controlled dimming circuit according to claim 1 or 2,

the capacitor C1 is an electrolyte capacitor, the anode of the electrolyte capacitor is connected with the inductor, and the cathode of the electrolyte capacitor is connected with the sampling resistor R.

5. A peak-to-valley current controlled dimming circuit according to claim 1 or 2,

the dimmer comprises a single chip microcomputer U7 and a 0-10V dimming signal generator, wherein the 0-10V dimming signal generator is connected to a port of the single chip microcomputer U7 through a voltage dividing resistor, the single chip microcomputer U7 converts the 0-10V dimming signal into two paths of PWM signals, the two paths of PWM signals are filtered by RC and then serve as reference signals Ihigh and Ilow, and the difference value of the Ihigh and the Ilow is a fixed value.

6. A peak-to-valley current controlled dimming circuit according to claim 1 or 2,

the dimmer comprises a conductor seat, an insulating frame, a plurality of left resistance wires, a plurality of right resistance wires, a left contact block, a right contact block, an insulating sliding handle, a sampling resistor R13 and a sampling resistor R14, wherein the left resistance wires are arranged and fixed on the left side of the conductor seat, the right resistance wires are arranged and fixed on the right side of the conductor seat, the left resistance wires and the right resistance wires are arranged in an aligned mode, the lower ends of the left resistance wires and the right resistance wires are conducted with the conductor seat, the upper ends of the left resistance wires and the right resistance wires are fixedly connected with the insulating frame, the insulating sliding handle is connected onto the insulating frame in a sliding mode, the left contact block and the right contact block are both fixed onto the insulating sliding handle, the lengths of the left contact block and the right contact block are equal to the arrangement lengths of the left resistance wires and the right resistance wires, the left contact block is abutted to the left resistance, the left contact block is connected with a direct current power supply Vcc, the right contact block is connected with a sampling resistor R14 and an electric group R13 in sequence and then grounded, the voltage at the conductor seat is used as a reference signal Ihigh, and the output voltage of the connection end of the sampling resistor R14 and the sampling resistor R13 is used as a reference signal Ilow.

7. A peak-to-valley current controlled dimming circuit according to claim 1 or 2,

the dimmer comprises an upper contact block, a lower contact block, an upper resistance wire, a lower resistance wire, a dimming knob, a sampling resistor R13 and a sampling resistor R14, wherein a rotary arm is fixedly installed on the dimming knob, the upper contact block and the lower contact block are installed on the rotary arm, the lower contact block is closer to the dimming knob relative to the upper contact block, the upper contact block is abutted to the upper resistance wire, the lower contact block is abutted to the lower resistance wire, the upper resistance wire and the lower resistance wire are identical in thickness and conductivity, the left end of the upper resistance wire is connected with the left end of the lower resistance wire, the lower contact block is connected with a direct current power supply Vcc, the upper contact block is sequentially connected with the sampling resistor R14 and an electric group R13 and then grounded, the voltage of the connection part of the upper resistance wire and the lower resistance wire is used as a reference signal Ihigh, and the output voltage of the connection end of the sampling resistor R36.