CN211063597U - Key scanning circuit based on AD sampling and electronic equipment - Google Patents
Key scanning circuit based on AD sampling and electronic equipment Download PDFInfo
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- CN211063597U CN211063597U CN201922006468.2U CN201922006468U CN211063597U CN 211063597 U CN211063597 U CN 211063597U CN 201922006468 U CN201922006468 U CN 201922006468U CN 211063597 U CN211063597 U CN 211063597U
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Abstract
The embodiment of the utility model provides a key scanning circuit and electronic equipment based on AD sampling relates to key scanning field, include: at least two keys; one end of each main voltage-dividing circuit is connected with a corresponding key, the other end of each main voltage-dividing circuit is connected with a sampling node, and the sampling node is electrically connected with the controller; one end of each slave voltage division circuit is respectively connected with one corresponding main voltage division circuit and one corresponding key; when any combination of at least two keys is pressed, the main voltage division circuit corresponding to each pressed key forms a first equivalent circuit, the main voltage division circuit corresponding to each non-pressed key is connected with the auxiliary voltage division circuit in series to form a second equivalent circuit, so that scanning voltages corresponding to different key combinations are output at sampling nodes, and the voltage difference percentage of the scanning voltages corresponding to different key combinations is greater than a first preset threshold value. The embodiment of the utility model provides a can expand application range, promote the suitability.
Description
[ technical field ] A method for producing a semiconductor device
The embodiment of the utility model provides a relate to the button scanning field, especially relate to a button scanning circuit and electronic equipment based on AD sampling.
[ background of the invention ]
The key scanning circuit based on AD sampling has the advantage of occupying few ports, so the key scanning circuit is widely applied to electronic equipment, and along with the development of the functions of the electronic equipment, some functions need to be realized by simultaneously pressing at least two keys. However, when at least two keys are pressed down simultaneously, the voltages sampled by the AD sampling terminal of the controller are approximately equal, so that the controller cannot identify a specific key combination, and the application range of the controller is limited.
[ Utility model ] content
The embodiment of the utility model provides a aim at providing a button scanning circuit and electronic equipment based on AD sampling, its application range that can expand the button scanning circuit based on AD sampling promotes the suitability.
In order to solve the above technical problem, an embodiment of the present invention provides the following technical solution:
the embodiment of the utility model provides a button scanning circuit based on AD sampling, include:
at least two keys;
one end of each main voltage-dividing circuit is connected with one corresponding key, the other end of each main voltage-dividing circuit is connected with a sampling node, and the sampling node is further used for being electrically connected with a controller;
one end of each slave voltage division circuit is respectively connected with one corresponding main voltage division circuit and one corresponding key;
when any combination of the at least two keys is pressed, the main voltage division circuit corresponding to each pressed key forms a first equivalent circuit, the main voltage division circuit corresponding to each non-pressed key and the slave voltage division circuit are respectively connected in series to form a second equivalent circuit, the first equivalent circuit and the second equivalent circuit are both electrically connected to the sampling node, so that scanning voltages corresponding to different key combinations are output at the sampling node, and the voltage difference percentage of the scanning voltages corresponding to the different key combinations is greater than a first preset threshold value.
Optionally, the AD sampling-based key scanning circuit further includes a filter circuit electrically connected between the sampling node and the controller.
Optionally, when the other end of each slave voltage division circuit is connected with an external power supply, the at least two keys are grounded, and the slave voltage division circuit is a pull-up circuit;
when the other end of each slave voltage division circuit is grounded, the at least two keys are connected with the external power supply, and the slave voltage division circuits are pull-down circuits.
Optionally, the pull-up circuit includes a first resistor, one end of the first resistor is connected to one of the main voltage-dividing circuits and one of the keys, and the other end of the first resistor is connected to the external power supply.
Optionally, when the slave voltage divider circuit is a pull-up circuit, the master voltage divider circuit includes a second resistor, one end of the second resistor is connected to one end of the first resistor and a corresponding one of the keys, and the other end of the second resistor is connected to the sampling node.
Optionally, the resistance value of each second resistor exceeds 10 times the resistance value of the corresponding first resistor.
Optionally, the resistance precision of the first resistance and the second resistance is 1%.
Optionally, the pull-down circuit includes a third resistor, one end of the third resistor is connected to one of the main voltage-dividing circuits and one of the keys, respectively, and the other end of the third resistor is grounded.
Optionally, when the slave voltage divider circuit is a pull-down circuit, the master voltage divider circuit includes a fourth resistor, one end of the fourth resistor is connected to one end of the third resistor and one corresponding key, and the other end of the fourth resistor is connected to the sampling node.
The embodiment of the utility model provides an electronic equipment is still provided, include:
a controller;
the key scanning circuit based on AD sampling as described in any one of the above, is connected with the AD sampling end of the controller.
The utility model has the advantages that: compared with the prior art, the embodiment of the utility model provides a button scanning circuit and electronic equipment based on AD sampling is provided. Through at least two keys, a main voltage-dividing circuit and a slave voltage-dividing circuit, wherein one end of each main voltage-dividing circuit is connected with a corresponding key, the other end of each main voltage-dividing circuit is connected with a sampling node, and the sampling node is also used for electrically connecting the controller, one end of each slave voltage division circuit is respectively connected with one corresponding main voltage division circuit and one corresponding key, when any combination of at least two keys is pressed, the main voltage division circuit corresponding to each pressed key forms a first equivalent circuit, the main voltage division circuit corresponding to each non-pressed key and the auxiliary voltage division circuit are respectively connected in series to form a second equivalent circuit, moreover, the first equivalent circuit and the second equivalent circuit are both electrically connected at the sampling node to output the scanning voltage corresponding to different key combinations at the sampling node, and the voltage difference percentage of the scanning voltages corresponding to different key combinations is greater than a first preset threshold value. Therefore, the embodiment of the utility model provides a through two at least buttons to and the main divider circuit that corresponds when the button of the arbitrary combination of two at least buttons is pressed and the partial pressure network that constitutes from the divider circuit, make different scanning voltage that key combination output corresponds, and different scanning voltage's that key combination output corresponds voltage difference percentage is greater than first threshold value of predetermineeing, thereby make the different key combinations of controller accurate discernment, and then expanded the application range of the key scanning circuit based on AD sampling, the suitability has been promoted.
[ description of the drawings ]
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a schematic structural diagram of one of the key scanning circuits based on AD sampling provided in the embodiment of the present invention;
fig. 2 is a schematic structural diagram of one of the key scanning circuits based on AD sampling provided in the embodiment of the present invention;
fig. 3 is a schematic circuit connection diagram of one of the key scanning circuits based on AD sampling provided in the embodiment of the present invention;
fig. 4 is a schematic circuit connection diagram of one of the key scanning circuits based on AD sampling provided in the embodiment of the present invention;
fig. 5 is an equivalent circuit diagram of a key scanning circuit based on AD sampling according to an embodiment of the present invention when the key S1 in fig. 3 is pressed;
fig. 6 is an equivalent circuit diagram of a key scanning circuit based on AD sampling according to an embodiment of the present invention when the key S1 in fig. 3 is pressed;
fig. 7 is an equivalent circuit diagram of a key scanning circuit based on AD sampling according to an embodiment of the present invention when the key S1 and the key S2 in fig. 3 are pressed simultaneously;
fig. 8 is an equivalent circuit diagram of a key scanning circuit based on AD sampling according to an embodiment of the present invention when the key S1 and the key S2 in fig. 3 are pressed simultaneously.
[ detailed description ] embodiments
To facilitate an understanding of the present application, the present application is described in more detail below with reference to the accompanying drawings and detailed description. It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may be present. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
An embodiment of the utility model provides an electronic equipment, including controller and following arbitrary embodiment the button scanning circuit based on AD sampling, wherein, button scanning circuit based on AD sampling with the AD sample end of controller is connected.
It is understood that the controller comprises at least one of the AD sampling terminals, and preferably, the controller comprises one of the AD sampling terminals, so as to reduce the cost of the controller. One AD sampling end can be used for receiving scanning voltage generated by the AD sampling-based key scanning circuit consisting of at least two keys, converting the scanning voltage into a voltage signal which can be accepted by the controller through an AD conversion circuit or an AD conversion chip, further converting the voltage signal into 8 bits, 10 bits, 12 bits or higher bits, and performing calculation processing on the controller.
The AD conversion circuit or the AD conversion chip mainly adopts a successive approximation method, a double integration method or a voltage frequency conversion method to convert the scanning voltage into a voltage signal which can be accepted by the controller. Taking the successive approximation method of the AD conversion chip as an example, the AD conversion chip is composed of a comparator, a D/a converter, a buffer register and a control logic circuit, and the conversion process is as follows: resetting each bit of the successive approximation register during initialization; when the conversion starts, the highest position 1 of the successive approximation register is firstly sent to a D/A converter, the analog quantity generated after the D/A conversion is sent to a comparator, called Vo, and is compared with the analog quantity Vi to be converted sent to the comparator, if Vo < Vi, the position 1 is reserved, otherwise, the position is cleared. Then, the second highest bit of the successive approximation register is set to be 1, new digital quantity in the register is sent to a D/A converter, the output Vo is compared with Vi, if Vo < Vi, the bit 1 is reserved, otherwise, the bit is cleared. This process is repeated until the lowest bit of the register is approached. After the conversion is finished, the digital quantity in the successive approximation register is sent to a buffer register to obtain the output (8 bits, 10 bits, 12 bits or higher) of the digital quantity.
In this embodiment, the electronic device includes an intelligent household appliance, and the AD sampling-based key scanning circuit is used as an input module of human-computer interaction of the intelligent household appliance, and is specifically configured to respond to a user key operation (different key combinations), generate a scanning voltage, and send the scanning voltage to the AD sampling terminal of the controller, so that the controller identifies the user key operation according to the scanning voltage, and executes operations corresponding to different key combinations according to different key combinations. For example, when the controller identifies that the key S1 and the key S2 in the AD sampling-based key scanning circuit are simultaneously pressed according to the scanning voltage, the controller searches for the corresponding operation that the key S1 and the key S2 are simultaneously pressed according to the corresponding relationship between different key combinations and different operations preset in the controller, and controls a circuit module, a device or a system connected with the controller to execute the operation.
The embodiment of the utility model provides an electronic equipment, through following arbitrary embodiment the button scanning circuit based on AD sampling for different scanning voltage that key combination output corresponds, and different scanning voltage's that key combination output corresponds voltage difference percentage is greater than first predetermined threshold value, thereby makes the different button combinations of controller accurate discernment, and then has expanded the application range based on the button scanning circuit of AD sampling, has promoted the suitability.
Please refer to fig. 1, which is a schematic structural diagram of a key scanning circuit based on AD sampling according to an embodiment of the present invention. As shown in fig. 1, the AD sampling based key scan circuit 100 includes at least two keys 10, a master voltage divider circuit 20, and a slave voltage divider circuit 30.
The keys 10, the main voltage-dividing circuits 20 and the slave voltage-dividing circuits 30 are in one-to-one correspondence, that is, the numbers of the keys 10, the main voltage-dividing circuits 20 and the slave voltage-dividing circuits 30 are the same. For example, when the at least two keys 10 include a key S1 and a key S2, the key S1 is connected to a corresponding one of the master voltage-dividing circuits 20 and a corresponding one of the slave voltage-dividing circuits 30, respectively, and the key S2 is connected to a corresponding one of the master voltage-dividing circuits 20 and a corresponding one of the slave voltage-dividing circuits 30, respectively.
One end of each of the main voltage-dividing circuits 20 is connected to a corresponding one of the keys 10, the other end of each of the main voltage-dividing circuits 10 is connected to a sampling node 101, and the sampling node 101 is further configured to be electrically connected to a controller 200.
One end of each of the slave voltage-dividing circuits 30 is connected to a corresponding one of the master voltage-dividing circuits 20 and a corresponding one of the keys 10.
When the other end of each slave voltage divider 30 is connected to an external power source, the at least two keys 10 are grounded, and the slave voltage divider 30 is a pull-up circuit. When the other end of each slave voltage divider circuit 30 is grounded, the at least two keys 10 are connected to the external power source, and the slave voltage divider circuit 30 is a pull-down circuit.
The pull-up circuit includes a first resistor, one end of the first resistor is connected to a corresponding one of the main voltage-dividing circuits 20 and one of the keys 10, and the other end of the first resistor is connected to the external power supply. When the slave voltage divider circuit 30 is a pull-up circuit, the master voltage divider circuit 20 includes a second resistor, one end of the second resistor is connected to one end of the first resistor and a corresponding one of the keys 10, and the other end of the second resistor is connected to the sampling node 101.
As shown in fig. 3, the at least two keys 10 include a key S1, a key S2, a key S3, and a key S4, the pull-up circuit includes first resistors R1 to R4, and the main voltage divider circuit 20 includes second resistors R5 to R8.
Specifically, one end of the key S1 is grounded, the other end of the key S1 is connected to one end of the first resistor R1 and one end of the second resistor R5, respectively, the other end of the first resistor R1 is connected to the external power supply, and the other end of the second resistor R5 is connected to the sampling node 101; one end of the key S2 is grounded, the other end of the key S2 is respectively connected to one end of the first resistor R2 and one end of the second resistor R6, the other end of the first resistor R2 is connected to the external power supply, and the other end of the second resistor R6 is connected to the sampling node 101; one end of the key S3 is grounded, the other end of the key S3 is respectively connected to one end of the first resistor R3 and one end of the second resistor R7, the other end of the first resistor R3 is connected to the external power supply, and the other end of the second resistor R7 is connected to the sampling node 101; one end of the key S4 is grounded, the other end of the key S4 is connected to one end of the first resistor R4 and one end of the second resistor R8, the other end of the first resistor R4 is connected to the external power supply, and the other end of the second resistor R8 is connected to the sampling node 101.
In this embodiment, each key is used as one bit of the BCD code, and is 0 when the key is pressed effectively, otherwise it is 1.
TABLE 1
As shown in table 1, if no key is pressed, the BCD code corresponding to the key combination is 1111; if the key S1 is pressed, the BCD code corresponding to the key combination is 1110; if the key S2 is pressed, the BCD code corresponding to the key combination is 1101; if the key S3 is pressed, the BCD code corresponding to the key combination is 1011; if the key S4 is pressed, the BCD code corresponding to the key combination is 0111; if the key S1 and the key S2 are pressed simultaneously, the BCD code corresponding to the key combination is 1100; if the key S1 and the key S3 are pressed simultaneously, the BCD code corresponding to the key combination is 1010; if the key S1 and the key S4 are pressed simultaneously, the BCD code corresponding to the key combination is 0110; if the key S2 and the key S3 are pressed simultaneously, the BCD code corresponding to the key combination is 1001; if the key S3 and the key S4 are pressed simultaneously, the BCD code corresponding to the key combination is 0011; if the key S1, the key S2 and the key S3 are pressed simultaneously, the BCD code corresponding to the key combination is 1000; if the key S1, the key S2 and the key S4 are pressed simultaneously, the BCD code corresponding to the key combination is 0100; if the key S1, the key S3 and the key S4 are pressed simultaneously, the BCD code corresponding to the key combination is 0010; if the key S2, the key S3 and the key S4 are pressed simultaneously, the BCD code corresponding to the key combination is 0001; if the key S1, the key S2, the key S3 and the key S4 are pressed simultaneously, the BCD code corresponding to the key combination is 0000.
To sum up, different key combinations correspond to different BCD codes, and according to the BCD code preset in the controller 200 and the correspondence between the BCD code and the operation, the circuit module, the device, or the system connected to the controller 200 is controlled to execute the operation. For example, if the key S1 and the key S2 are pressed simultaneously, the BCD code corresponding to the key combination is 1100, the controller 200 acquires the BCD code "1100", the preset BCD code "1100" is operated to illuminate the screen backlight, and the current is controlled to flow through the screen backlight, thereby illuminating the screen backlight.
When any combination of the at least two keys 10 is pressed, the main voltage dividing circuit 20 corresponding to each pressed key 10 forms a first equivalent circuit, the main voltage dividing circuit 20 corresponding to each non-pressed key 10 and the slave voltage dividing circuit 30 are respectively connected in series to form a second equivalent circuit, and the first equivalent circuit and the second equivalent circuit are both electrically connected to the sampling node 101, so as to output scanning voltages corresponding to different key combinations at the sampling node 101, and the voltage difference percentages of the scanning voltages corresponding to different key combinations are greater than a first preset threshold value.
As shown in fig. 5, when the key S1 is pressed, the first resistor R1 does not contribute to voltage division, and the second resistor R5 constitutes a first equivalent circuit, which corresponds to a pull-down resistor of the corresponding voltage division circuit when the key S1 is pressed.
As shown in fig. 6, the first resistor R2 and the second resistor R6, the first resistor R3 and the second resistor R7, and the first resistor R4 and the second resistor R8 are respectively connected in series and then connected in parallel to form a second equivalent circuit.
The equivalent resistor in series between the first resistor R2 and the second resistor R6 is a resistor R26, i.e., the impedance of the voltage divider circuit formed by the first resistor R2 and the second resistor R6 is equal to the resistance of the resistor R26. The equivalent resistor in series between the first resistor R3 and the second resistor R7 is a resistor R37, i.e., the impedance of the voltage divider circuit formed by the first resistor R3 and the second resistor R7 is equal to the resistance of the resistor R37. The equivalent resistor in series between the first resistor R4 and the second resistor R8 is a resistor R48, i.e., the impedance of the voltage divider circuit formed by the first resistor R4 and the second resistor R8 is equal to the resistance of the resistor R48.
The series equivalent resistor R26, the series equivalent resistor R37 and the series equivalent resistor R48 are connected in parallel to be equivalent to a pull-up resistor of a corresponding voltage division circuit when the key S1 is pressed, the series equivalent resistor R26, the series equivalent resistor R37 and the series equivalent resistor R48 are connected in parallel and then connected in series with the second resistor R5 for voltage division, the voltage Vad of the sampling node 101 is equal to the voltage at two ends of the second resistor R5, and the voltage Vad can be obtained,
namely, it is
By analogy, when the button S2 is pressed, the voltage Vad at the sampling node 101 is equal to the voltage across the second resistor R6,
namely, it is
When the button S3 is pressed, the voltage Vad at the sampling node 101 is equal to the voltage across the second resistor R7,
namely, it is
When the button S4 is pressed, the voltage Vad at the sampling node 101 is equal to the voltage across the second resistor R8,
namely, it is
As shown in fig. 7, when the key S1 and the key S2 are pressed simultaneously, the first resistor R1 and the first resistor R2 do not contribute to voltage division, and the second resistor R5 and the first resistor R6 are connected in parallel to form a first equivalent circuit, which is equivalent to a pull-down resistor of the voltage division circuit corresponding to the key S1 and the key S2 when they are pressed simultaneously.
As shown in fig. 8, the first resistor R3 and the second resistor R7, and the first resistor R4 and the second resistor R8 are connected in series and then connected in parallel to form a second equivalent circuit.
The equivalent resistor in series between the first resistor R3 and the second resistor R7 is a resistor R37, i.e., the impedance of the voltage divider circuit formed by the first resistor R3 and the second resistor R7 is equal to the resistance of the resistor R37. The equivalent resistor in series between the first resistor R4 and the second resistor R8 is a resistor R48, i.e., the impedance of the voltage divider circuit formed by the first resistor R4 and the second resistor R8 is equal to the resistance of the resistor R48.
The parallel connection of the series equivalent resistor R37 and the series equivalent resistor R48 is equivalent to the pull-up resistor of the corresponding voltage division circuit when the key S1 and the key S2 are pressed simultaneously, after the parallel connection of the series equivalent resistor R37 and the series equivalent resistor R48, the resistance value of the parallel connection of the second resistor R5 and the first resistor R6 is divided in series, then the voltage Vad of the sampling node 101 is equal to the voltage of the two ends of the parallel equivalent circuit of the second resistor R5 and the first resistor R6, and can be obtained,
namely, it is
Similarly, the scanning voltage output by the sampling node 101 when two or more other keys are pressed simultaneously can be calculated.
In this embodiment, the resistance of each of the second resistors exceeds 10 times of the corresponding resistance of the first resistor, and the resistance precision of the first resistor and the second resistor is 1%.
Assuming that the resistances of the first resistors R1-R4 are all 1K Ω, the resistance precision is 1%, the second resistor R5 is 10K Ω, the resistance precision is 1%, the second resistor R6 is 30K Ω, the resistance precision is 1%, the second resistor R7 is 75K Ω, the resistance precision is 1%, the second resistor R8 is 150K Ω, and the resistance precision is 1%. The resistance of the second resistor R5 is 10 times the resistance of the first resistor R1, the resistance of the second resistor R6 is 30 times the resistance of the first resistor R2, the resistance of the second resistor R7 is 75 times the resistance of the first resistor R3, and the resistance of the second resistor R8 is 150 times the resistance of the first resistor R4.
It can be understood that the disclosed second resistance of this embodiment's resistance and the relation of the resistance of the first resistance that corresponds are not used for the restriction the utility model discloses, as long as the resistance of second resistance and the resistance of the first resistance that corresponds are not at an order of magnitude, the resistance of second resistance is far more than the resistance of the first resistance that corresponds promptly and all falls into the utility model discloses a protection scope. In addition, the smaller the values of the first resistors R1-R4 are, the smaller the influence on the voltage division of the main voltage division circuit 20 is, but in consideration of the power consumption when the key 10 is pressed, the appropriate resistance values of the first resistors R1-R4 should be selected to avoid the short circuit between the external power supply and the ground when the key is pressed.
In some embodiments, the second resistor R5, the second resistor R6, the second resistor R7, and the second resistor R8 are in a multiple relationship. For example, the second resistor R6 is equal to 2 times the second resistor R5, the second resistor R7 is equal to 2 times the second resistor R6, and the second resistor R8 is equal to 2 times the second resistor R7; alternatively, the second resistor R5 is equal to 2 times the second resistor R6, the second resistor R6 is equal to 2 times the second resistor R7, and the second resistor R7 is equal to 2 times the second resistor R8. It can be understood that the multiple relationship between the second resistor R5, the second resistor R6, the second resistor R7, and the second resistor R8 can be adaptively adjusted according to the actual circuit design requirement, the recognition accuracy of the AD conversion chip, the resistor resistance selection, and the like.
Referring to table 1 again, according to the above calculation method, the scan voltages corresponding to the 16 key combinations corresponding to the four keys 10 are obtained, the scan voltages are sorted from small to large, and the voltage percentages of the AD pins corresponding to different key combinations are calculated, where the voltage percentage of the AD pins P1 is Vad/VCC 100%. And calculating the voltage difference percentage corresponding to the key combination according to the voltage percentages of the AD pins, wherein the voltage difference percentage P2 is equal to the absolute value of the difference of the voltage percentages of the two adjacent AD pins.
For example, when the key S1, the key S2, the key S3 and the key S4 are pressed simultaneously, the AD pin voltage percentage P1 is equal to 0%, the key S1, the key S2 and the key S3 are pressed simultaneously, the AD pin voltage percentage P1 is equal to 4.32%, so that the voltage difference percentage P2 when the key S1, the key S2, the key S3 and the key S4 are pressed simultaneously is 4.32% -0% -4.32%; the key S1, the key S2, and the key S4 are pressed simultaneously, the voltage percentage P1 of the AD pin is equal to 8.59%, so that the voltage difference percentage P2-8.59% -4.32% -4.27% when the key S1, the key S2, and the key S3 are pressed simultaneously, and so on.
In summary, the voltage difference percentage P2 is at least equal to 4.27%, which avoids the problem that the voltages sampled by the AD sampling terminal of the controller 200 are approximately equal when at least two keys 10 are pressed simultaneously, so that the controller 200 can accurately identify different key combinations. Meanwhile, the at least two keys 10 do not have priority relationship, so that the problem that when a key with high priority is pressed down, other key operations are invalid is avoided.
In addition, the AD conversion value of 8 bits AD is equal to voltage percentage 256, the AD conversion value of 10 bits AD is equal to voltage percentage 1024, the difference between the AD conversion values of 8 bits AD is equal to the absolute value of the difference between the AD conversion values of two adjacent 8 bits AD, and the difference between the AD conversion values of 10 bits AD is equal to the absolute value of the difference between the AD conversion values of two adjacent 10 bits AD.
For example, the key S1, the key S2, the key S3, and the key S4 are pressed simultaneously, the AD pin voltage percentage P1 is equal to 0%, the AD conversion value H1 of 8 bits AD is 0% 256 to 0, and the AD conversion value H1 of 10 bits AD is 0% 1024 to 0; the key S1, the key S2, and the key S3 are pressed simultaneously, the AD pin voltage percentage P1 is equal to 4.32%, the AD conversion value H1 for 8-bit AD is 4.32% × 256 ═ 11, the AD conversion value H1 for 10-bit AD is 4.32% × 1024 ═ 44, so the AD conversion value difference H2 for 8-bit AD corresponding to the keys S1, S2, S3, and S4 being pressed simultaneously is 11-0 ═ 11, and the AD conversion value difference H2 for 10-bit AD is 44-0 ═ 44.
The pull-down circuit comprises a third resistor, one end of the third resistor is respectively connected with one corresponding main voltage-dividing circuit 20 and one corresponding key 10, and the other end of the third resistor is grounded. When the slave voltage divider circuit is a pull-down circuit, the master voltage divider circuit 20 includes a fourth resistor, one end of the fourth resistor is connected to one end of the third resistor and one corresponding key 10, and the other end of the fourth resistor is connected to the sampling node 101.
As shown in fig. 4, the at least two keys 10 include a key S1, a key S2, a key S3, and a key S4, the pull-down circuit includes third resistors R9 to R12, and the main voltage divider circuit 20 includes fourth resistors R13 to R16.
Specifically, one end of the key S1 is connected to an external power source, the other end of the key S1 is connected to one end of the third resistor R9 and one end of the fourth resistor R13, respectively, the other end of the third resistor R9 is grounded, and the other end of the fourth resistor R13 is connected to the sampling node 101; one end of the key S2 is connected to an external power supply, the other end of the key S2 is connected to one end of the third resistor R10 and one end of the fourth resistor R14, the other end of the third resistor R10 is grounded, and the other end of the fourth resistor R14 is connected to the sampling node 101; one end of the key S3 is connected to an external power supply, the other end of the key S3 is connected to one end of the third resistor R11 and one end of the fourth resistor R15, the other end of the third resistor R11 is grounded, and the other end of the fourth resistor R15 is connected to the sampling node 101; one end of the key S4 is connected to an external power source, the other end of the key S4 is connected to one end of the third resistor R12 and one end of the fourth resistor R16, the other end of the third resistor R12 is grounded, and the other end of the fourth resistor R16 is connected to the sampling node 101.
It should be noted that please refer to the above embodiments for the calculation of the scan voltages corresponding to different key combinations, which is not described herein again.
Referring to fig. 2, the key scanning circuit 300 based on AD sampling includes the key scanning circuit 100 based on AD sampling according to any of the embodiments described above, and please refer to the embodiments described above for the same points, which are not described in detail herein. The difference is that the AD sampling-based key scanning circuit 300 further includes a filter circuit 40, and the filter circuit 40 is electrically connected between the sampling node 101 and the controller 200.
In this embodiment, the filter circuit 40 includes a passive filter circuit, and the passive filter circuit includes a capacitor filter circuit, an inductor filter circuit, an L C filter circuit, a L C-pi filter circuit, an RC-pi filter circuit, and the like, where the filter circuit 40 is configured to filter the scan voltage output by the sampling node 101, reduce an ac component in the scan voltage, retain a dc component, reduce a ripple coefficient of the scan voltage, and smooth an output voltage waveform, so as to improve accuracy of the recognition result of the controller 200.
The embodiment of the utility model provides a button scanning circuit based on AD sampling, through at least two buttons, main divider circuit and follow bleeder circuit, wherein, the one end of each main divider circuit all with a key connection that corresponds, the other end of each main divider circuit all connects at the sampling node, and, the sampling node still is used for the electric connection controller, the one end of each follows bleeder circuit respectively with a main divider circuit that corresponds and a corresponding button connection, make when the button of arbitrary combination of at least two buttons is pressed, the main divider circuit that each button that is pressed corresponds constitutes first equivalent circuit, the main divider circuit that each button that is not pressed corresponds and follow divider circuit establish ties respectively and constitute second equivalent circuit, and, first equivalent circuit all is connected at the sampling node with second equivalent circuit electricity, in order to export the scanning voltage that different button combinations correspond at the sampling node, and the voltage difference percentage of the scanning voltages corresponding to different key combinations is greater than a first preset threshold value. Therefore, the embodiment of the utility model provides a through two at least buttons to and the main divider circuit that corresponds when the button of the arbitrary combination of two at least buttons is pressed and the partial pressure network that constitutes from the divider circuit, make different scanning voltage that key combination output corresponds, and different scanning voltage's that key combination output corresponds voltage difference percentage is greater than first threshold value of predetermineeing, thereby make the different key combinations of controller accurate discernment, and then expanded the application range of the key scanning circuit based on AD sampling, the suitability has been promoted.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments can be combined, steps can be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.
Claims (10)
1. A key scanning circuit based on AD sampling is characterized by comprising:
at least two keys;
one end of each main voltage-dividing circuit is connected with one corresponding key, the other end of each main voltage-dividing circuit is connected with a sampling node, and the sampling node is further used for being electrically connected with a controller;
one end of each slave voltage division circuit is respectively connected with one corresponding main voltage division circuit and one corresponding key;
when any combination of the at least two keys is pressed, the main voltage division circuit corresponding to each pressed key forms a first equivalent circuit, the main voltage division circuit corresponding to each non-pressed key and the slave voltage division circuit are respectively connected in series to form a second equivalent circuit, the first equivalent circuit and the second equivalent circuit are both electrically connected to the sampling node, so that scanning voltages corresponding to different key combinations are output at the sampling node, and the voltage difference percentage of the scanning voltages corresponding to the different key combinations is greater than a first preset threshold value.
2. The AD sampling-based key scan circuit of claim 1, further comprising a filter circuit electrically connected between the sampling node and the controller.
3. The AD sampling-based key scan circuit of claim 1,
when the other end of each slave voltage division circuit is connected with an external power supply, the at least two keys are grounded, and the slave voltage division circuits are pull-up circuits;
when the other end of each slave voltage division circuit is grounded, the at least two keys are connected with the external power supply, and the slave voltage division circuits are pull-down circuits.
4. The AD sampling-based key scanning circuit as recited in claim 3, wherein the pull-up circuit comprises a first resistor, one end of the first resistor is connected with a corresponding one of the main voltage-dividing circuits and one of the keys, and the other end of the first resistor is connected with the external power supply.
5. The AD sampling-based key scanning circuit according to claim 4, wherein when the slave voltage dividing circuit is a pull-up circuit, the master voltage dividing circuit comprises a second resistor, one end of the second resistor is connected with one end of the first resistor and a corresponding one of the keys, and the other end of the second resistor is connected with the sampling node.
6. The AD sampling-based key scanning circuit as recited in claim 5, wherein the resistance of each second resistor exceeds 10 times the resistance of the corresponding first resistor.
7. The AD sampling based key scan circuit of claim 6, wherein the resistance precision of the first and second resistors is 1%.
8. The AD sampling-based key scanning circuit as recited in claim 3, wherein the pull-down circuit comprises a third resistor, one end of the third resistor is connected with a corresponding one of the main voltage-dividing circuits and one of the keys, and the other end of the third resistor is grounded.
9. The AD sampling-based key scanning circuit as claimed in claim 8, wherein when the slave voltage divider circuit is a pull-down circuit, the master voltage divider circuit comprises a fourth resistor, one end of the fourth resistor is connected to one end of the third resistor and a corresponding one of the keys, and the other end of the fourth resistor is connected to the sampling node.
10. An electronic device, comprising:
a controller;
the AD sampling-based key scanning circuit as claimed in any one of claims 1-9, connected to the AD sampling terminal of the controller.
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| CN201922006468.2U CN211063597U (en) | 2019-11-19 | 2019-11-19 | Key scanning circuit based on AD sampling and electronic equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113365178A (en) * | 2021-04-28 | 2021-09-07 | 广东朝阳电子科技股份有限公司 | Method for realizing input port expansion by sharing temperature detection port of Bluetooth headset |
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2019
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113365178A (en) * | 2021-04-28 | 2021-09-07 | 广东朝阳电子科技股份有限公司 | Method for realizing input port expansion by sharing temperature detection port of Bluetooth headset |
| CN113365178B (en) * | 2021-04-28 | 2022-09-30 | 广东朝阳电子科技股份有限公司 | Method for realizing input port expansion by sharing temperature detection port of Bluetooth headset |
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Address after: 518000 Guangdong science and technology innovation and Research Institute, Shenzhen, Shenzhen, Nanshan District No. 6, science and technology innovation and Research Institute, Shenzhen, D 10, 1004, 10 Patentee after: Shenzhen Hetai intelligent home appliance controller Co.,Ltd. Address before: 518000 Guangdong science and technology innovation and Research Institute, Shenzhen, Shenzhen, Nanshan District No. 6, science and technology innovation and Research Institute, Shenzhen, D 10, 1004, 10 Patentee before: SHENZHEN H&T DATA RESOURCES AND CLOUD TECHNOLOGY Ltd. |