CN211043554U - Zero line fault early warning device - Google Patents
Zero line fault early warning device Download PDFInfo
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- CN211043554U CN211043554U CN201921615888.4U CN201921615888U CN211043554U CN 211043554 U CN211043554 U CN 211043554U CN 201921615888 U CN201921615888 U CN 201921615888U CN 211043554 U CN211043554 U CN 211043554U
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Abstract
The utility model provides a zero line fault early warning device, including the voltage acquisition module, the voltage contrast module includes that the zero line draws preceding voltage sampling circuit and a plurality of zero lines draw back voltage sampling circuit, and AD converter data input end is connected to voltage acquisition module voltage detection signal output end, and CPU controller contrast feedback signal receiving terminal is connected to AD converter data output end, and alarm output system is connected to CPU controller alarm output end. The fault point with poor zero line contact can be effectively detected, fault alarm is carried out, workers are prompted to carry out troubleshooting, economic loss and casualties are reduced, and power utilization safety is improved.
Description
Technical Field
The utility model relates to an electricity consumption protection technical field, concretely relates to zero line trouble early warning device.
Background
In a three-phase four-wire low-voltage power distribution network, zero line poor contact is caused due to the fact that zero line current is too large or joint poor contact is caused, load neutral point potential offset is caused, voltage is increased, phase voltage of one phase or two phases can be increased to more than 300V in serious conditions, great threat is caused to user-side electric equipment, and household appliances are often burnt due to faults. According to the long-life statistics, the household appliance burnout times in 2012 and 2017 are up to 128, wherein 102 household appliance burnout events caused by poor zero line contact occur, and the percentage of the household appliance burnout events is up to 80%; the compensation amount is 94.9596 ten thousand yuan, wherein 72.1525 ten thousand yuan is consumed by the household appliance due to poor contact of the zero line, and the percentage is up to 76%. The basic team and group pay a large amount of manpower for matters such as claim, loss assessment, maintenance, payment, wherein, the contact failure of zero line and change causes the temperature rise zero line to burn out, is the leading cause that causes zero line contact failure. Therefore, a low-voltage zero line poor contact early warning device needs to be developed.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at solving the technical problem who exists among the prior art at least, innovated a zero line trouble early warning device very much, can effectively detect out zero line bad contact fault point to report to the police.
In order to realize the utility model discloses an above-mentioned purpose, the utility model provides a zero line trouble early warning device, including the voltage acquisition module, the voltage comparison module includes that the zero line draws preceding voltage sampling circuit and a plurality of zero lines and draws back voltage sampling circuit, and the AD converter data input end is connected to voltage acquisition module voltage detection signal output end, and CPU controller contrast feedback signal receiving terminal is connected to AD converter data output end, and alarm output system is connected to CPU controller alarm output end.
The voltage acquisition module is used for acquiring voltage signals of zero line incoming lines and voltage signals of all zero line outgoing lines, and the A/D converter is used for converting the voltage signals of the voltage acquisition module into digital signals matched with the CPU controller. The CPU controller is used for respectively comparing whether the voltages of all the zero line outgoing lines and the zero line incoming lines have difference values, and whether the difference values exceed an allowable range. And if the voltage difference value exceeds the allowable range, the CPU controller sends an alarm signal to an alarm output system.
In the scheme, the method comprises the following steps: the zero line post-lead voltage sampling circuits are respectively a first zero line post-lead voltage sampling circuit, a second zero line post-lead voltage sampling circuit, … … and an nth zero line post-lead voltage sampling circuit;
the voltage detection signal output end of the zero line pre-leading voltage sampling circuit is connected with a first data input end of an A/D converter, and the first data output end of the A/D converter is connected with a first comparison feedback signal input end of a CPU controller; the voltage detection signal output end of the voltage sampling circuit after the first zero line is led is connected with the second data input end of the A/D converter, and the second data output end of the A/D converter is connected with the second comparison feedback signal input end of the CPU controller; the voltage detection signal output end of the voltage sampling circuit after the second zero line is led is connected with the third data input end of the A/D converter, and the third data output end of the A/D converter is connected with the third comparison feedback signal input end of the CPU controller; … …, respectively; the voltage detection signal output end of the voltage sampling circuit after the nth zero line is led is connected with the n +1 th data input end of the A/D converter, and the n +1 th data output end of the A/D converter is connected with the n +1 th contrast feedback signal input end of the CPU controller.
In the scheme, the method comprises the following steps: the zero line lead-in voltage sampling circuit comprises a first resistor, wherein one end of the first resistor is a voltage detection end, the other end of the first resistor is connected with a first operational amplifier out-phase input end, one end of a second resistor and one end of a first capacitor, the other end of the first capacitor is grounded, the other end of the second resistor is connected with a first operational amplifier output end, the first operational amplifier output end is connected with one end of a third resistor, the other end of the third resistor is connected with one end of a fourth resistor and a second operational amplifier in-phase input end, the other end of the fourth resistor is grounded, the second operational amplifier out-phase input end is connected with one end of an eleventh resistor, the other end of the eleventh resistor is connected with a second operational amplifier output end, the second operational amplifier output end is connected with one end of a fifth resistor, the other end of the fifth resistor is connected with a first diode anode, a second diode cathode and one end of a second capacitor, the other end of the fifth resistor is a voltage detection signal output end of the zero line lead-ahead voltage sampling circuit.
An RC filter circuit is formed by the first resistor and the first capacitor, harmonic interference in the circuit is filtered, and phase errors are reduced. The first operational amplifier is used as a voltage follower, the input impedance of the circuit is improved, zero-crossing comparison is carried out through the second operational amplifier, and a pull-up clamping circuit is formed through the first diode and the second diode, so that element damage caused by signal abnormality is prevented. The second resistor and the eleventh resistor suppress interference and oscillation of the signal.
In the scheme, the method comprises the following steps: the plurality of zero line lead-back voltage sampling circuits all comprise a sixth resistor, one end of the sixth resistor is a detection end, the other end of the sixth resistor is connected with a third operational amplifier out-phase input end, one end of a seventh resistor and one end of a first capacitor, the other end of the first capacitor is grounded, the other end of the seventh resistor is connected with a third operational amplifier output end, the third operational amplifier output end is connected with an eighth resistor, the other end of the eighth resistor is connected with one end of a ninth resistor and a fourth operational amplifier in-phase input end, the other end of the ninth resistor is grounded, the fourth operational amplifier out-phase input end is connected with one end of a tenth resistor, the other end of the tenth resistor is connected with a fourth operational amplifier output end, the fourth operational amplifier output end is connected with one end of a twelfth resistor, the other end of the twelfth resistor is connected with the anode of a third diode, the cathode of the fourth diode and one end of a fourth capacitor, the other end of the twelfth resistor is a voltage detection signal output end of the voltage sampling circuit after the zero line is led.
And an RC filter circuit is formed by the sixth resistor and the third capacitor, so that harmonic interference in the circuit is filtered, and phase errors are reduced. The third operational amplifier is used as a voltage follower, the input impedance of the circuit is improved, zero-crossing comparison is carried out through the fourth operational amplifier, and a pull-up clamping circuit is formed through the third diode and the fourth diode, so that element damage caused by signal abnormality is prevented. The seventh resistor and the tenth resistor suppress interference and oscillation of the signal.
In the scheme, the method comprises the following steps: the alarm output system comprises a remote alarm subsystem and a field alarm subsystem.
In the scheme, the method comprises the following steps: the remote alarm subsystem comprises a wireless communication sending module, and the wireless communication sending module is connected with the remote alarm signal output end of the CPU controller.
In the scheme, the method comprises the following steps: the field alarm subsystem comprises a relay, the relay alarm signal receiving end is connected with the alarm output end of the CPU, one end of a normally open contact of the relay is connected with one end of the warning lamp, and the other end of the normally open contact of the relay is connected with the other end of the warning lamp.
In the scheme, the method comprises the following steps: the on-site alarm subsystem further comprises a plurality of signal lamps, wherein the signal lamps are respectively a zero line incoming signal lamp, a first signal lamp, a second signal lamp, … … and an nth signal lamp, the zero line incoming signal lamp is connected with a zero line incoming fault feedback output end of the CPU controller, the first signal lamp is connected with a first position feedback output end of the CPU controller, the second signal lamp is connected with a second position feedback output end of the CPU controller, … … is provided, and the nth signal lamp is connected with an nth position feedback output end of the CPU controller.
In the scheme, the method comprises the following steps: the relay power supply system further comprises an alternating current power supply module, wherein a first power supply end of the alternating current power supply module is connected with a working power supply end of the relay, a second power supply end of the alternating current power supply module is connected with an input end of the AC-DC converter, and an output end of the AC-DC converter is connected with a working power supply end of the CPU controller.
To sum up, owing to adopted above-mentioned technical scheme, the beneficial effects of the utility model are that: the fault point with poor zero line contact can be effectively detected, fault alarm is carried out, workers are prompted to carry out troubleshooting, economic loss and casualties are reduced, and power utilization safety is improved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic diagram of the system of the present invention;
FIG. 2 is a schematic diagram of the connection of the voltage sampling module during detection according to the present invention;
fig. 3 is a circuit diagram of the zero line leading voltage sampling circuit of the present invention;
fig. 4 is a circuit diagram of the zero line post-voltage sampling circuit of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present invention, and should not be construed as limiting the present invention.
As shown in fig. 1, 3 and 4, a zero line fault early warning device includes a voltage acquisition module, a voltage detection signal output end of the voltage acquisition module is connected with a data input end of an a/D converter, a data output end of the a/D converter is connected with a comparison feedback signal receiving end of a CPU controller, and an alarm output end of the CPU controller is connected with an alarm output system.
The alarm output system comprises a remote alarm subsystem and a field alarm subsystem. The remote alarm subsystem comprises a wireless communication sending module, and the wireless communication sending module is connected with the remote alarm signal output end of the CPU controller. The field alarm subsystem comprises a relay, a relay alarm signal receiving end is connected with a CPU alarm output end, one end of a normally open contact of the relay is connected with one end of a warning lamp, and the other end of the normally open contact of the relay is connected with the other end of the warning lamp. The working power supply end of the relay is connected with the first power supply end of the alternating current power supply module, the second power supply end of the alternating current power supply module is connected with the input end of the AC-DC converter, and the output end of the AC-DC converter is connected with the working power supply end of the CPU controller.
The voltage comparison module comprises a zero line pre-lead voltage sampling circuit and a plurality of zero line post-lead voltage sampling circuits, the zero line pre-lead voltage sampling circuit is used for detecting the voltage of a zero line before the zero line is connected to a zero line wiring row, and the zero line post-lead voltage sampling circuit is used for detecting the voltage of the zero line after the zero line is connected to the zero line wiring row. The zero line post-lead voltage sampling circuits are respectively a first zero line post-lead voltage sampling circuit, a second zero line post-lead voltage sampling circuit, … … and an nth zero line post-lead voltage sampling circuit;
the voltage detection signal output end of the zero line pre-leading voltage sampling circuit is connected with a first data input end of an A/D converter, and the first data output end of the A/D converter is connected with a first comparison feedback signal input end of a CPU controller; the voltage detection signal output end of the voltage sampling circuit after the first zero line is led is connected with the second data input end of the A/D converter, and the second data output end of the A/D converter is connected with the second comparison feedback signal input end of the CPU controller; the voltage detection signal output end of the voltage sampling circuit after the second zero line is led is connected with the third data input end of the A/D converter, and the third data output end of the A/D converter is connected with the third comparison feedback signal input end of the CPU controller; … …, respectively; the voltage detection signal output end of the voltage sampling circuit after the nth zero line is led is connected with the n +1 th data input end of the A/D converter, and the n +1 th data output end of the A/D converter is connected with the n +1 th contrast feedback signal input end of the CPU controller.
The zero line pre-leading voltage sampling circuit comprises a first resistor R1, one end of a first resistor R1 is a voltage detection end, the other end of the first resistor R1 is connected with an out-phase input end of a first operational amplifier U1, one end of a second resistor R2 and one end of a first capacitor C1, the other end of the first capacitor C1 is grounded, the other end of a second resistor R2 is connected with an output end of the first operational amplifier U1, the output end of the first operational amplifier U1 is connected with one end of a third resistor R3, the other end of the third resistor R3 is connected with one end of a fourth resistor R4 and a non-phase input end of a second operational amplifier U2, the other end of the fourth resistor R4 is grounded, the out-phase input end of the second operational amplifier U2 is connected with one end of an eleventh resistor R11, the other end of the eleventh resistor R11 is connected with the output end of a second operational amplifier U2, the output end of the second operational amplifier U7 is connected with one end of a fifth resistor R5, the other end of the fifth resistor R5 is connected with the anode of a, the anode of the second diode D2 and the other end of the second capacitor C2 are both grounded, and the other end of the fifth resistor R5 is a voltage detection signal output end of the zero line leading front voltage sampling circuit.
An RC filter circuit is formed by the first resistor R1 and the first capacitor C1, harmonic interference in the circuit is filtered, and phase errors are reduced. The first operational amplifier U2 is used as a voltage follower to improve the input impedance of the circuit, zero-crossing comparison is carried out through the second operational amplifier U2, and a pull-up clamping circuit is formed through the first diode D1 and the second diode D2 to prevent the elements from being damaged due to signal abnormality. The second resistor R2 and the eleventh resistor R11 suppress disturbances and signal oscillations.
The zero-lead voltage sampling circuits comprise a sixth resistor R6, one end of a sixth resistor R6 is a voltage detection end, the other end of the sixth resistor R6 is connected with a third operational amplifier U3 out-of-phase input end, one end of a seventh resistor R7 and one end of a first capacitor C1, the other end of the first capacitor C1 is grounded, the other end of a seventh resistor R7 is connected with a third operational amplifier U3 output end, the third operational amplifier U3 output end is connected with one end of an eighth resistor R8, the other end of an eighth resistor R8 is connected with one end of a ninth resistor R9 and a fourth operational amplifier U4 in-phase input end, the other end of a ninth resistor R9 is grounded, the fourth operational amplifier U4 out-phase input end is connected with one end of a tenth resistor R10, the other end of a tenth resistor R10 is connected with the output end of a fourth operational amplifier U4, the output end of a fourth operational amplifier U7 is connected with one end of a twelfth resistor R3687458, the other end of a twelfth resistor R12 is connected with the anode of a third diode D12, the fourth diode D12, the anode of the fourth diode D4 and the other end of the fourth capacitor C4 are both grounded, and the other end of the twelfth resistor R12 is a voltage detection signal output end of the zero-line-led voltage sampling circuit.
An RC filter circuit is formed by the sixth resistor R6 and the third capacitor C3, harmonic interference in the circuit is filtered, and phase errors are reduced. The third operational amplifier U3 is used as a voltage follower to improve the input impedance of the circuit, zero-crossing comparison is carried out through the fourth operational amplifier U4, and a pull-up clamping circuit is formed through the third diode D3 and the fourth diode D4 to prevent the elements from being damaged due to signal abnormality. The interference and oscillation of the signal are suppressed by the seventh resistor R7 and the tenth resistor R10.
Preferably, the on-site alarm subsystem further comprises a plurality of signal lamps, the signal lamps are respectively a zero line incoming signal lamp, a first signal lamp, a second signal lamp, … … and an nth signal lamp, the zero line incoming signal lamp is connected with a zero line incoming fault feedback output end of the CPU controller, the first signal lamp is connected with a first position feedback output end of the CPU controller, the second signal lamp is connected with a second position feedback output end of the CPU controller, … …, and the nth signal lamp is connected with an nth position feedback output end of the CPU controller. After the CPU controller detects a fault point, the CPU lights the corresponding signal lamp, and workers can directly check the fault point through the indication of the signal lamp, so that the working time is saved, the emergency efficiency is improved, and the possibility of economic loss or casualties is further reduced.
The model of the A/D converter is ADS7821, the models of the first operational amplifier U1 and the third operational amplifier U3 are L M124, the models of the second operational amplifier U2 and the fourth operational amplifier U4 are L M311, and the model of the CPU controller is STM32F 103.
When the zero-line lead-in voltage sampling circuit is used, the voltage detection end of the zero-line lead-in voltage sampling circuit is connected with a zero-line lead-in line on the front side of the zero-line wiring bar 1 according to the access shown in fig. 2 (such as a point A in fig. 2), namely the zero-line lead-in voltage sampling circuit detects the voltage of the zero-line lead-in line. And connecting the voltage detection end of the first zero line lead-out voltage sampling circuit with a first zero line outgoing line on the rear side of the zero line wiring bar 1 (as shown as a point B in figure 2), namely detecting the voltage of the first zero line outgoing line by the first zero line lead-out voltage sampling circuit, and so on until the nth zero line outgoing line is connected.
And voltage signals of the zero line incoming line and the zero line outgoing line are sent to the A/D converter through the voltage sampling module, and voltage detection signals are converted into digital signals through the A/D converter and then sent to the CPU controller for processing. And the CPU controller processes and compares the received voltage detection signals of a plurality of zero line outgoing lines with the voltage detection signals of the zero line incoming lines respectively.
If the difference value of the voltage detection signal of the zero line outgoing line and the voltage detection signal of the zero line incoming line is larger than the set threshold value, the CPU controller sends an alarm signal to an alarm output system. The CPU controller starts the wireless communication sending module, sends an alarm signal to the control center through the wireless communication sending module, and warns workers in the control center to check. Meanwhile, the CPU controller drives the relay to start working, the relay starts the alarm lamp to light up, field alarm is carried out, a corresponding signal lamp is lightened up, and a fault point with poor zero line outgoing contact of a worker is prompted.
If the difference value between the voltage detection signals of all zero line outgoing lines and the voltage detection signals of the zero line incoming lines is larger than the set threshold value, the CPU controller sends out an alarm signal of poor zero line incoming line wiring to the alarm output system and lights up a zero line incoming line signal lamp to prompt workers to indicate that the zero line outgoing lines are in poor contact, so that the rescue efficiency is improved, and the possibility of economic loss and casualties is reduced.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
Claims (9)
1. The utility model provides a zero line fault early warning device which characterized in that: the voltage acquisition module comprises a zero line leading-in voltage sampling circuit and a plurality of zero line leading-out voltage sampling circuits, wherein a voltage detection signal output end of the voltage acquisition module is connected with an A/D converter data input end, an A/D converter data output end is connected with a CPU controller comparison feedback signal receiving end, and an alarm output end of the CPU controller is connected with an alarm output system.
2. The neutral line fault warning device of claim 1, wherein: the zero line post-lead voltage sampling circuits are respectively a first zero line post-lead voltage sampling circuit, a second zero line post-lead voltage sampling circuit, … … and an nth zero line post-lead voltage sampling circuit;
the voltage detection signal output end of the zero line pre-leading voltage sampling circuit is connected with a first data input end of an A/D converter, and the first data output end of the A/D converter is connected with a first comparison feedback signal input end of a CPU controller; the voltage detection signal output end of the voltage sampling circuit after the first zero line is led is connected with the second data input end of the A/D converter, and the second data output end of the A/D converter is connected with the second comparison feedback signal input end of the CPU controller; the voltage detection signal output end of the voltage sampling circuit after the second zero line is led is connected with the third data input end of the A/D converter, and the third data output end of the A/D converter is connected with the third comparison feedback signal input end of the CPU controller; … …, respectively; the voltage detection signal output end of the voltage sampling circuit after the nth zero line is led is connected with the n +1 th data input end of the A/D converter, and the n +1 th data output end of the A/D converter is connected with the n +1 th contrast feedback signal input end of the CPU controller.
3. The neutral line fault warning device of claim 2, wherein: the zero line pre-leading voltage sampling circuit comprises a first resistor (R1), one end of the first resistor (R1) is a voltage detection end, the other end of the first resistor (R1) is connected with an out-phase input end of a first operational amplifier (U1), one end of a second resistor (R2) and one end of a first capacitor (C1), the other end of the first capacitor (C1) is grounded, the other end of the second resistor (R2) is connected with an output end of a first operational amplifier (U1), an output end of the first operational amplifier (U1) is connected with one end of a third resistor (R3), the other end of the third resistor (R3) is connected with one end of a fourth resistor (R4) and a non-phase input end of a second operational amplifier (U2), the other end of the fourth resistor (R4) is grounded, the out-phase input end of the second operational amplifier (U2) is connected with one end of an eleventh resistor (R11), the other end of the eleventh resistor (R11) is connected with an output end of the second operational amplifier (U2), and one end of the second operational amplifier (, the other end of the fifth resistor (R5) is connected with the anode of the first diode (D1), the cathode of the second diode (D2) and one end of the second capacitor (C2), the cathode of the first diode (D1) is connected with a power supply, the anodes of the second diode (D2) and the other end of the second capacitor (C2) are both grounded, and the other end of the fifth resistor (R5) is a voltage detection signal output end of a zero-line lead-in voltage sampling circuit.
4. The neutral line fault warning device of claim 2, wherein: the plurality of zero line post-lead voltage sampling circuits respectively comprise a sixth resistor (R6), one end of the sixth resistor (R6) is a detection end, the other end of the sixth resistor (R6) is connected with a third operational amplifier (U3) out-of-phase input end, one end of a seventh resistor (R7) and one end of a first capacitor (C1), the other end of the first capacitor (C1) is grounded, the other end of the seventh resistor (R7) is connected with a third operational amplifier (U3) output end, the third operational amplifier (U3) output end is connected with one end of an eighth resistor (R8), the other end of the eighth resistor (R8) is connected with one end of a ninth resistor (R9) and a fourth operational amplifier (U4) in-phase input end, the other end of a ninth resistor (R9) is grounded, the out-of-phase input end of a fourth operational amplifier (U4) is connected with one end of a tenth resistor (R10), the other end of a tenth resistor (R10) is connected with a fourth operational amplifier (U4) output end, and a twelfth operational amplifier (U4) is, the other end of the twelfth resistor (R12) is connected with the anode of the third diode (D3), the cathode of the fourth diode (D4) and one end of the fourth capacitor (C4), the cathode of the third diode (D3) is connected with a power supply, the anode of the fourth diode (D4) and the other end of the fourth capacitor (C4) are both grounded, and the other end of the twelfth resistor (R12) is a voltage detection signal output end of the voltage sampling circuit after zero line lead.
5. The neutral line fault warning device of claim 2, wherein: the alarm output system comprises a remote alarm subsystem and a field alarm subsystem.
6. The neutral line fault warning device of claim 5, wherein: the remote alarm subsystem comprises a wireless communication sending module, and the wireless communication sending module is connected with the remote alarm signal output end of the CPU controller.
7. The neutral line fault warning device of claim 5, wherein: the field alarm subsystem comprises a relay, the relay alarm signal receiving end is connected with the alarm output end of the CPU, one end of a normally open contact of the relay is connected with one end of the warning lamp, and the other end of the normally open contact of the relay is connected with the other end of the warning lamp.
8. The neutral line fault warning device of claim 7, wherein: the on-site alarm subsystem further comprises a plurality of signal lamps, wherein the signal lamps are respectively a zero line incoming signal lamp, a first signal lamp, a second signal lamp, … … and an nth signal lamp, the zero line incoming signal lamp is connected with a zero line incoming fault feedback output end of the CPU controller, the first signal lamp is connected with a first position feedback output end of the CPU controller, the second signal lamp is connected with a second position feedback output end of the CPU controller, … … is provided, and the nth signal lamp is connected with an nth position feedback output end of the CPU controller.
9. The neutral line fault warning device of claim 7, wherein: the relay power supply system further comprises an alternating current power supply module, wherein a first power supply end of the alternating current power supply module is connected with a working power supply end of the relay, a second power supply end of the alternating current power supply module is connected with an input end of the AC-DC converter, and an output end of the AC-DC converter is connected with a working power supply end of the CPU controller.
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| CN201921615888.4U CN211043554U (en) | 2019-09-26 | 2019-09-26 | Zero line fault early warning device |
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| CN201921615888.4U CN211043554U (en) | 2019-09-26 | 2019-09-26 | Zero line fault early warning device |
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