CN211014508U - Island detection system - Google Patents

Island detection system Download PDF

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CN211014508U
CN211014508U CN201921149538.3U CN201921149538U CN211014508U CN 211014508 U CN211014508 U CN 211014508U CN 201921149538 U CN201921149538 U CN 201921149538U CN 211014508 U CN211014508 U CN 211014508U
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circuit
control module
stage
zero
spwm
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任文军
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Huayi Microelectronics Co ltd
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Huayi Microelectronics Co ltd
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Abstract

The utility model belongs to the field of island detection, in particular to an island detection system, which comprises a control module; the inverter circuit is used for generating an SPWM waveform; the output signal circuit is used for outputting a power grid waveform; the comparison circuit is used for comparing the time difference between the zero-point time of the SPWM waveform and the zero-point time of the power grid waveform and defining the time difference between the zero-point times as the SPWM pointer value of the zero-point time; wherein the control module detects whether the SPWM pointer value at the zero point time fluctuates within a fixed range. The utility model has the advantages of the detection capability is strong, the electric current distortion is little, be applicable to many photovoltaic systems.

Description

Island detection system
Technical Field
The utility model belongs to island detection's field, concretely relates to island detection system.
Background
The island detection is a necessary function for grid connection of a photovoltaic system, and the island state can be quickly detected and the adverse effect on a power grid is reduced as much as possible.
Among the methods now recognized as effective are: a voltage positive feedback method and an active power disturbance method for applying disturbance to an amplitude, an active frequency shift method for applying disturbance to a frequency, a reactive power disturbance method and an active phase shift method for applying disturbance to a phase, and the like. The methods can be realized through software and obtain better effect, but if the technical processing is not good, the operation burden of a DSP (digital signal processor) is increased, or the island detection performance is not up to the standard, or the quality distortion rate of output electric energy is increased, and the like. An Automatic Phase Shift (APS) of a Slip-Mode Frequency Shift (SMS) method is a typical representative of an active Phase Shift island detection algorithm, which can effectively detect an island state, but the algorithm and judgment logic are complex, and the difficulty of DSP implementation is increased.
In order to solve the problem, the utility model discloses an island detecting system.
SUMMERY OF THE UTILITY MODEL
An object of the present invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages which will be described later.
The utility model also aims at providing an island detecting system need not DSP realization, can realize island detection with the singlechip.
The utility model discloses it is still another purpose to provide an island detecting system, and it is little to the power quality influence, and detectability satisfies the standard that island detected completely.
To achieve these objects and other advantages in accordance with the purpose of the invention, the present invention provides an island detection system, including:
a control module;
the inverter circuit is connected with the control module and is used for generating an SPWM waveform;
one end of the output signal circuit is connected with the inverter circuit, and the other end of the output signal circuit is connected with the control module and used for outputting power grid waveforms;
the comparison circuit is connected with the output signal circuit and the control module and is used for comparing the time difference between the zero-point time of the SPWM waveform and the zero-point time of the power grid waveform and defining the time difference between the zero-point times as the SPWM pointer value of the zero-point time;
wherein the control module detects whether the SPWM pointer value at the zero point time fluctuates within a fixed range.
Preferably, the inverter circuit includes a pre-stage push-pull circuit, a rectifying filter circuit, a post-stage inverter circuit and an L C L filter circuit, an output end of the pre-stage push-pull circuit is connected to an input end of the rectifying filter circuit, an output end of the rectifying filter circuit is connected to an input end of the post-stage inverter circuit, and an output end of the post-stage inverter circuit is connected to an input end of the L C L filter circuit.
Preferably, the power supply further comprises a front-stage driving circuit and a rear-stage driving circuit, one end of the front-stage driving circuit and one end of the rear-stage driving circuit are both connected with the control module, the other end of the front-stage driving circuit is connected with the other end of the front-stage push-pull circuit, and the other end of the rear-stage driving circuit is connected with the input end of the rear-stage inverter circuit.
Preferably, the output signal circuit includes a current sampling circuit, a voltage sampling circuit and a grid voltage sampling circuit, one end of each of the current sampling circuit, the voltage sampling circuit and the grid voltage sampling circuit is connected to the output end of the L C L filter circuit, and the other end of each of the current sampling circuit, the voltage sampling circuit and the grid voltage sampling circuit is connected to the control module;
one end of the grid voltage sampling circuit is connected with the comparison circuit.
Preferably, the comparison circuit comprises a comparator, the positive end of the comparator is connected with the grid voltage sampling circuit, the negative end of the comparator is connected with a 2.5V reference voltage, and the output end of the comparator is connected with the control module.
Preferably, the control module is an MCU of HYM8F028C6 model.
Preferably, the electronic device further comprises a power supply, one path of the power supply is connected with the preceding stage driving circuit, and the other path of the power supply is connected with the control module;
the input voltage of a power supply is 24V, the voltage of one path of the power supply for supplying the power supply to the front-stage driving circuit is 12V, and the voltage of one path of the power supply for supplying the power supply to the control module is 5V.
The utility model discloses at least, include following beneficial effect:
1. the utility model provides a pair of island detecting system, it need not DSP realization, does not need complicated mathematical computation, can realize island detection with the singlechip.
2. The utility model provides a pair of island detecting system, it is little to the electric energy quality influence, and detectability satisfies island detection's standard completely.
3. The utility model provides a pair of island detecting system, it has that detectability is strong, the little characteristics of current distortion are applicable to many photovoltaic systems.
4. The utility model provides a pair of island detecting system, it detects with low costs, has market competition.
5. The utility model provides a pair of island detecting system, it can accurately detect the electric wire netting effectively and fall the electricity, cuts off being connected of dc-to-ac converter and electric wire netting rapidly.
Drawings
Fig. 1 is a schematic diagram of the operation of the power circuit according to the present invention;
fig. 2 is a working schematic diagram of the preceding stage driving circuit of the present invention;
fig. 3 is a working schematic diagram of the rear stage driving circuit according to the present invention;
fig. 4 is a working schematic diagram of the preceding stage push-pull circuit of the present invention;
fig. 5 is a working schematic diagram of the rectifying and filtering circuit of the present invention;
fig. 6 is a working schematic diagram of the post-stage inverter circuit according to the present invention;
fig. 7 is a schematic diagram of the current sampling circuit according to the present invention;
fig. 8 is a schematic diagram of the voltage sampling circuit according to the present invention;
fig. 9 is a working schematic diagram of the grid voltage sampling circuit according to the present invention;
fig. 10 is a schematic diagram of the operation of the comparison circuit of the present invention;
fig. 11 is a schematic diagram of the operation of the control module according to the present invention;
fig. 12 is a schematic circuit diagram of an island detection system according to the present invention;
fig. 13 is a schematic diagram of the phase difference according to the present invention;
fig. 14 is a graph of the change in voltage value after the phase perturbation is added;
fig. 15 is a schematic structural diagram of an island detection system according to the present invention.
Detailed Description
The present invention is further described in detail below with reference to the drawings so that those skilled in the art can implement the invention with reference to the description.
In the present specification, when an element is referred to as being "connected to" or coupled to "or" disposed in "another element, it may be" directly connected to "or coupled to" or "directly disposed in" the other element. Or be connected or coupled to or disposed in another element with other elements interposed therebetween, unless it is volumetrically "directly coupled or connected to" or "directly disposed in" the other element. Further, it will be understood that when an element is referred to as being "on," "over," "under" or "under" another element, it can be "in direct" contact with the other element or in contact with the other element interposed therebetween, unless it is referred to as being in direct contact with the other element.
As shown in fig. 15, an islanding detection system includes:
a control module;
the inverter circuit is connected with the control module and is used for generating an SPWM waveform;
one end of the output signal circuit is connected with the inverter circuit, and the other end of the output signal circuit is connected with the control module and used for outputting power grid waveforms;
the comparison circuit is connected with the output signal circuit and the control module and is used for comparing the time difference between the zero-point time of the SPWM waveform and the zero-point time of the power grid waveform, if the time difference is positive offset, the time difference between the zero-point times is defined as the SPWM pointer value of the zero-point time, and if the time difference is negative offset, the time difference between the zero-point times is defined as the sum of the SPWM waves in one period minus the pointer value of the SPWM;
the control module detects whether the SPWM pointer value at the zero point moment or the pointer value of the SPWM subtracted from the number of the total SPWM waves of one period fluctuates within a fixed range.
The SPWM pointer value at the zero point moment is monitored, under the normal grid-connected condition, the SPWM pointer value at the zero point can fluctuate within a very small range, if the SPWM pointer value is a fixed and unchangeable value or the value jump of the pointer is very large, the grid voltage is abnormal, the inverter circuit closes the output, and the island detection is effectively achieved.
On the basis of the above situation, in another embodiment, the inverter circuit includes a pre-stage push-pull circuit, a rectifying and filtering circuit, a post-stage inverter circuit, and an L C L filtering circuit, an output end of the pre-stage push-pull circuit is connected to an input end of the rectifying and filtering circuit, an output end of the rectifying and filtering circuit is connected to an input end of the post-stage inverter circuit, and an output end of the post-stage inverter circuit is connected to an input end of the L C L filtering circuit.
The pre-stage push-pull circuit is a pre-stage transformer, as shown in fig. 4, a primary 24V input of the transformer (the inverter is nominally 24V, and the actual input voltage range in the field can work normally within 20-30V), a secondary 380V output (the voltage of the pre-stage is required to be 340 or more at minimum after the pre-stage boost, and the post-stage inversion can output 220V voltage, so that a certain margin is reserved for 380), C2, C, and C4 select high-frequency electrolytic capacitors (C2, C3, and C4 mainly have a filtering function, so that the high-frequency filtering effect is good, and a series equivalent resistor (ESR) is small, so that the heating value of the capacitors is small, and the output efficiency can be improved), PWM _ BOUT and PWM _ AOUT in fig. 4 are output signals of MIC4452, and are used for driving MOS in the pre-stage push-pull circuit, and pre-; two paths of PWM signals with the phase difference of 180, which are generated by PWM1 and PWM2 of a control module, are used for pre-stage push-pull boosting, the phase difference of the two paths cannot be too large, magnetic biasing can be generated too much, and a pre-stage MOS can be burnt out.
The secondary output of the push-pull transformer of the previous push-pull circuit passes through the rectification filter circuit, and as shown in fig. 5, a DC380V voltage (the voltage of 340 or more must be the lowest after the previous stage is boosted, and the voltage of 220V can be output by the next stage inversion, so a certain margin is left for 380 selection) is output to the next stage inversion circuit.
As shown in fig. 6, the filtered and rectified direct current 380V is output to a rear-stage inverter circuit, the rear-stage inverter circuit outputs SPWM signals, PWM1H, PWM 1L, PWM2H and PWM 2L, through a control module, and outputs driving signals HO1, L O1, HO2 and L O2 through a rear-stage driving circuit, so as to control 4 MOS full-bridges in the rear-stage inverter circuit, thereby realizing full-bridge inversion.
The voltage signal output by the full-bridge inverter is filtered by L C L, and a standard 50HZ sine wave is output.
On the basis of the above embodiment, in a further embodiment, the power supply further includes a front-stage driving circuit and a rear-stage driving circuit, one end of each of the front-stage driving circuit and the rear-stage driving circuit is connected to the control module, the other end of the front-stage driving circuit is connected to the other end of the front-stage push-pull circuit, and the other end of the rear-stage driving circuit is connected to the input end of the rear-stage inverter circuit.
The front-stage driving circuit adopts MIC4452 to drive a chip, MIC4452 is low-voltage MOS drive with peak value drive reaching 12A, and 12V power supply is adopted, as shown in a circuit diagram of FIG. 2, PWM _ A, PWM _ B is output signals of PWM1 and PWM2 of a control module, and PWM _ BOUT and PWM _ AOUT are output signals of MIC4452 and are used for driving MOS in a front-stage push-pull circuit and realizing front-stage boosting through a push-pull transformer. The input of MIC4452 must be connected with a pull-down resistor of 10K, otherwise, the condition that PWM _ AOUT and PWM _ BOUT are the same is easy to occur when power is on, and the MOS at the front stage is burnt.
The rear stage driving circuit outputs SPWM signals, PWM1H, PWM 1L, PWM2H and PWM 2L through the control module, and outputs driving signals HO1, L O1, HO2 and L O2 to control the rear stage inverter circuit through driving IR2110, wherein the IR2110 is a high-voltage MOS driver produced by American IR company, and the rear stage inverter circuit has the advantages of optical coupling isolation (small volume) and electromagnetic isolation (high speed).
On the basis of the above embodiment, in a further embodiment, the output signal circuit includes a current sampling circuit, a voltage sampling circuit and a grid voltage sampling circuit, one end of each of the current sampling circuit, the voltage sampling circuit and the grid voltage sampling circuit is connected to the output end of the L C L filter circuit, and the other end of each of the current sampling circuit, the voltage sampling circuit and the grid voltage sampling circuit is connected to the control module;
one end of the grid voltage sampling circuit is connected with the comparison circuit.
The working principle diagram of the current sampling circuit shown in fig. 7 adopts a HCS _ L SP15 current sensor, a HCS _ L SP15 is connected in series with an output loop, and a HCS _ L SP15 outputs a signal with 2.5V as a midpoint.
As shown in the working principle diagram of the voltage sampling circuit shown in fig. 8, the input end of the voltage sampling circuit is connected with the output end of the L C L filter circuit, the output end of the voltage sampling circuit is connected with the control module, and the bus voltage of the circuit is 380V, so that three 1M resistors are adopted for voltage division, and then the voltage is output to the control module through the operational amplifier for sampling by the control module.
As shown in the working schematic diagram of the grid voltage sampling circuit shown in fig. 9, the grid voltage in the grid voltage sampling circuit attenuates the voltage amplitude through a transformer, and after the grid voltage is filtered by an operational amplifier, one path of the grid voltage is directly output to a control module for sampling by the control module, and the other path of the grid voltage is output to the positive end of the comparison circuit for comparison by a comparator, wherein the sampling effect of the transformer for grid voltage detection is better than that of the operational amplifier, 220V voltage is attenuated by primary current limiting, a secondary series resistor R92 samples 220 voltage signals, and the R92 is connected with a C49 in parallel, so that high-frequency switch interference burrs on the sampling signals can be attenuated to a great extent, and the C59 is connected in series, and mainly plays a role in isolation filtering.
The output signal circuit can ensure that the sampled signal is a real and effective signal, so that the zero position can be correctly judged, grid connection can be realized, normal operation of the inverter is ensured, and accurate detection of the phase deviation can be ensured.
On the basis of the above embodiment, in a further embodiment, the comparison circuit includes a comparator, a positive terminal of the comparator is connected to the grid voltage sampling circuit, a negative terminal of the comparator is connected to a 2.5V reference voltage, and an output terminal of the comparator is connected to the control module.
As shown in fig. 9 and 10, one path of the grid voltage sampling circuit is output to a positive terminal of a comparator in the comparison circuit, a negative terminal of the comparator is connected to a 2.5V reference voltage to detect a zero crossing point, and an output of the comparator is connected to the control module.
A voltage sampling signal in the power grid voltage sampling circuit is converted into a sinusoidal signal with 2.5V as a midpoint through an operational amplifier filter circuit, the sinusoidal signal is input to the positive end of a comparator and is compared with the negative end 2.5V reference voltage of the comparator, and therefore a zero crossing point is detected and is input to an IO port of a single chip microcomputer for detection of the single chip microcomputer. In order to improve the anti-interference capability of the IO detection of the single chip microcomputer, the output state of the comparator is detected in an AD (analog-to-digital) query mode. The voltage value of the output port of the comparator is judged by the singlechip every 50US through AD sampling, sampling is carried out for three times every time, if the sampling results of the three times are all larger than 3V, the comparator outputs high level, and if the sampling results of the three times are all smaller than 1V, the comparator outputs low level.
The high and low levels are two states, and the level can be set to be the zero point triggering time from high to low, or the level can be set to be the zero point phase triggering time from low to high, and the specific selection is determined by a hardware circuit.
In addition to the above embodiments, in another embodiment, the control module is an MCU model of HYM8F028C 6.
As shown in fig. 11, the MCU of the present system is selected as HYM8F028C6, which has the following advantages: the clock frequency is 60 MHz; 256 bytes internal RAM, 3072 bytes external RAM, 2048 bytes (16 sectors total, 128 bytes each) EEPROM; a multiply-divide function, unsigned 16x 16-bit, unsigned 32/16; the 2-path operational amplifier is internally integrated, and the programmable gain amplifier is compatible with a single-ended input mode and a differential input mode through external configuration; 1 path of comparator, the comparator output signal can stop MPWM work and make MPWM output port be high-impedance state; the comparator outputs a rising edge to trigger the ADC; the input negative terminal can be connected with an external input voltage, and the output of the internal DAC is used as a reference voltage; the input positive end can be connected with an external input voltage and the output end of the programmable gain amplifier; the 12-bit AD can realize simultaneous two-way sampling and can trigger AD conversion at any time of PWM output; the 3-path 16-bit complementary output PWM has the advantages that the dead time can be set, the alignment mode can be set, and the brake function is realized; therefore, the 2-path complementary PWM of HYM8F028C6 is used for realizing the SPWM inversion of the later stage, the code writing difficulty is greatly reduced, and the development efficiency is improved.
Two paths of PWM signals with the phase difference of 180 are generated by PWM1 and PWM2 of the MCU and used for pre-stage push-pull boosting, the phase difference of the two paths cannot be too large, magnetic biasing can be generated if the phase difference of the two paths is too large, and a pre-stage MOS can be burnt out.
On the basis of the above embodiment, in a further embodiment, the apparatus further includes a power supply, one path of which is connected to the pre-stage driving circuit, and the other path of which is connected to the control module;
as shown in fig. 1, one of the output terminals of the 24V inputs L M2576 and L M2576 is supplied to the pre-driver circuit at 12V, and then supplied to L7805 at 12V, so as to generate 5V for supplying power to the MCU.
The voltage is gradually changed from high voltage to low voltage, so that the efficiency is better.
The SPWM generation method includes firstly determining the frequency of the SPWM, such as 40K, outputting a sine wave of 50HZ, calculating the value of X, namely the number of points in one period after the number of points is determined, generating a sine table by using EXCE L or related software, outputting the value in the sine table by a single chip microcomputer according to the frequency of 40K, driving a full bridge MOS of a rear-stage inverter circuit, and generating the SPWM waveform by adopting an upper tube PWM and a lower tube switching mode and alternately operating the upper bridge and the lower bridge.
The utility model provides an among the island detecting system, after the signal that overflows of comparator is caught to the singlechip, remember the SPWM pointer value at this moment, compare with the value at actual zero point, it is big to differ, surveys the value through reducing or increase SPWM pointer, makes the phase difference reduce, reaches a phase locking function promptly.
After grid connection under normal conditions, through phase-locked control, the phase output by the grid voltage sampling circuit and the phase output by the inverter circuit almost have no phase difference, the single chip microcomputer captures an output signal of the zero-crossing time comparator and remembers the SPWM pointer value at the moment, and under an ideal condition, the SPWM pointer value is added with 1 or subtracted with 1 to be attributed to 0, so that the purpose of phase locking is achieved.
After phase locking and successful grid connection, phase disturbance is added, that is, a certain time difference is formed between the zero point time of the waveform output by the rear-stage inverter circuit and the zero point time of the power grid waveform output by the power grid voltage sampling circuit by adjusting the value of the SPWM pointer at the zero-crossing time of the single chip microcomputer, so that the method is as shown in FIG. 13.
Generally, the voltage at the time of adding the phase disturbance is lower than the voltage without the phase difference, as shown in fig. 14, therefore, a phase disturbance function is added, and the voltage value is detected at the same time, if the voltage is within an allowable fluctuation range, the power grid works normally, and if the phase disturbance is added, the voltage is not fluctuated, the power grid is abnormal, and the connection between the inverter and the power grid is cut off immediately, so that the purpose of island detection is achieved.
Or monitoring the SPWM pointer at the zero point moment, wherein the SPWM pointer at the zero point can fluctuate within a small range under the normal grid-connected condition, and if the SPWM pointer is a fixed and unchangeable value or the value jump of the pointer is large, the power grid voltage is abnormal, and the inverter is turned off to output. By adopting the two methods, the island detection can be effectively achieved.
The utility model discloses a change the SPWM pointer value at zero point to change back stage inverter circuit's output phase place, the rethread singlechip detects the change of output voltage amplitude, thereby judges whether the commercial power operates normally.
The utility model discloses the MOSFET switch who uses in is a field effect transistor that can the wide use at analog circuit and digital circuit, main advantage: the high-voltage power amplifier has the advantages of good thermal stability, large safe working area, extremely low internal resistance when being conducted, high switching speed and capability of improving the efficiency of the power amplifier.
It is obvious that those skilled in the art can obtain various effects not directly mentioned according to the respective embodiments without trouble from various structures according to the embodiments of the present invention.
While embodiments of the invention have been disclosed above, it is not intended to be limited to the applications listed in the specification and the examples. It can be applicable to various and be fit for the utility model discloses a field completely. Additional modifications will readily occur to those skilled in the art. The invention is therefore not to be limited to the specific details and illustrations shown and described herein, without departing from the general concept defined by the claims and their equivalents.

Claims (7)

1. An islanding detection system, comprising:
a control module;
the inverter circuit is connected with the control module and is used for generating an SPWM waveform;
one end of the output signal circuit is connected with the inverter circuit, and the other end of the output signal circuit is connected with the control module and used for outputting power grid waveforms;
the comparison circuit is connected with the output signal circuit and the control module and is used for comparing the time difference between the zero-point time of the SPWM waveform and the zero-point time of the power grid waveform and defining the time difference between the zero-point times as the SPWM pointer value of the zero-point time;
wherein the control module detects whether the SPWM pointer value at the zero point time fluctuates within a fixed range.
2. The islanding detection system of claim 1, wherein the inverter circuit comprises a front-stage push-pull circuit, a rectifying filter circuit, a rear-stage inverter circuit and an L C L filter circuit, an output end of the front-stage push-pull circuit is connected with an input end of the rectifying filter circuit, an output end of the rectifying filter circuit is connected with an input end of the rear-stage inverter circuit, and an output end of the rear-stage inverter circuit is connected with an input end of the L C L filter circuit.
3. The island detection system of claim 2, further comprising a front-stage driving circuit and a rear-stage driving circuit, wherein one end of each of the front-stage driving circuit and the rear-stage driving circuit is connected to the control module, the other end of the front-stage driving circuit is connected to the other end of the front-stage push-pull circuit, and the other end of the rear-stage driving circuit is connected to an input end of the rear-stage inverter circuit.
4. The islanding detection system of claim 2, wherein the output signal circuit comprises a current sampling circuit, a voltage sampling circuit and a grid voltage sampling circuit, one end of each of the current sampling circuit, the voltage sampling circuit and the grid voltage sampling circuit is connected with the output end of the L C L filter circuit, and the other end of each of the current sampling circuit, the voltage sampling circuit and the grid voltage sampling circuit is connected with the control module;
one end of the grid voltage sampling circuit is connected with the comparison circuit.
5. The islanding detection system of claim 4, wherein the comparison circuit comprises a comparator, a positive terminal of which is connected with the grid voltage sampling circuit, a negative terminal of the comparator is connected with a 2.5V reference voltage, and an output terminal of the comparator is connected with the control module.
6. The islanding detection system of claim 1, wherein the control module is an MCU model HYM8F028C 6.
7. The islanding detection system of claim 3, further comprising a power supply, one path of which is connected to the pre-driver circuit and the other path of which is connected to the control module;
the input voltage of a power supply is 24V, the voltage of one path of the power supply for supplying the power supply to the front-stage driving circuit is 12V, and the voltage of one path of the power supply for supplying the power supply to the control module is 5V.
CN201921149538.3U 2019-07-22 2019-07-22 Island detection system Active CN211014508U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110456214A (en) * 2019-07-22 2019-11-15 华羿微电子股份有限公司 A kind of alone island detection system and its method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110456214A (en) * 2019-07-22 2019-11-15 华羿微电子股份有限公司 A kind of alone island detection system and its method

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