CN210985671U - Yyn0 distribution transformer zero sequence impedance compensation arrangement - Google Patents
Yyn0 distribution transformer zero sequence impedance compensation arrangement Download PDFInfo
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- CN210985671U CN210985671U CN201921826553.7U CN201921826553U CN210985671U CN 210985671 U CN210985671 U CN 210985671U CN 201921826553 U CN201921826553 U CN 201921826553U CN 210985671 U CN210985671 U CN 210985671U
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- 238000012423 maintenance Methods 0.000 description 5
- 238000004804 winding Methods 0.000 description 5
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- 230000008569 process Effects 0.000 description 3
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/30—Reactive power compensation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/50—Arrangements for eliminating or reducing asymmetry in polyphase networks
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Abstract
The utility model provides a Yyn0 distribution transformer zero sequence impedance compensation arrangement, including overhauing circuit breaker, isolator, protection contactor, bidirectional thyristor, damping reactance, compensation capacitor group, discharge circuit and controller, the controller uses FPGA as control core, including voltage transformer, current transformer, signal conditioning circuit, AD sampling chip, zero passage comparison circuit, opto-coupler circuit and drive circuit. The utility model discloses the zero sequence impedance that the device was changed to Yyn0 distribution in principle has carried out the compensation, need not to change dynamic adjustment according to the three-phase load, for through administering the unbalanced mode platform district outlet voltage of three-phase load have device simple structure, reliable and stable, fortune dimension work load advantage such as few.
Description
Technical Field
The utility model discloses a Yyn0 distribution transformer zero sequence impedance compensation arrangement belongs to adapted electricity technical field.
Background
For the Yyn0 distribution transformer, for the zero-sequence current, the low-voltage side adopts the yn connection method, the zero-sequence current is the current with the same size and the same phase of the three-phase winding, and for the high-voltage side, the Y connection can not form the passage of the zero-sequence current, the magnetic potential generated by the zero-sequence current on the low-voltage side has no corresponding magnetic potential balance on the high-voltage side and plays the role of exciting the magnetic potential, and the zero-sequence main magnetic flux linked with the high-voltage side and the low-voltage side winding simultaneously and the zero-sequence leakage magnetic flux linked with the low-voltage side winding only are established. The zero sequence main magnetic flux in the three-phase iron core has the same phase and can only form a closed loop through insulating oil, an oil tank wall and the like, and the magnetic resistance is larger, so that the stronger the zero sequence main magnetic flux is, the larger zero sequence electric potential inducing the same phase in the high-voltage side winding and the low-voltage side winding is. Therefore, when the Yyn0 distribution transformer operates in a three-phase load imbalance situation, zero-sequence currents generate zero-sequence potentials, and neutral point offset causes the distribution transformer outlet three-phase voltage imbalance. The more serious the unbalanced three-phase load is, the more serious the unbalanced three-phase voltage at the outlet is, the higher and lower voltages at the user side can appear simultaneously, and the safe and reliable power utilization of the user is influenced.
In order to improve the problem, the main measures at the present stage are to adjust the operating load of the Yyn0 distribution transformer to be basically balanced, and eliminate the zero line current as much as possible, including manual adjustment of user load, automatic user load switching devices, low-voltage SVG and the like. However, the manual adjustment of the user load cannot ensure real-time balance of the three-phase load, and the effect of the automatic user load switching device is affected by load change, so that the three-phase imbalance of the user voltage cannot be fundamentally treated; although the SVG device can control the three-phase load imbalance of the platform area in real time, the SVG device still has the problems of high cost, high loss and low reliability. And the problem of unbalanced voltage of the Yyn0 transformer is not eliminated in principle by the three treatment modes, and the three treatment modes are difficult to effectively popularize in practical application, so that the problem of high and low voltage at the outlet of the distribution transformer is caused, and the safe and reliable electricity utilization of users is directly influenced.
SUMMERY OF THE UTILITY MODEL
The utility model aims at, through the zero sequence impedance of condenser compensation Yyn0 transformer, make Yyn0 distribution transformer outlet voltage still keep three-phase voltage balanced even under the unbalanced three-phase load condition, guarantee platform district user's safe and reliable power consumption.
In order to achieve the above object, the utility model provides a following technical scheme: a Yyn0 distribution transformer zero sequence impedance compensation device comprises a maintenance circuit breaker, an isolating switch, a protection contactor, a bidirectional thyristor, a damping reactance, a compensation capacitor bank, a discharge circuit and a controller, wherein the damping reactance is connected in series with the bidirectional thyristor and then connected in parallel with the compensation capacitor bank, the protection contactor and the discharge circuit to form the compensation protection circuit, the input end of the compensation protection circuit is connected in series with the isolating switch and then connected with a distribution transformer zero line, the output end of the compensation protection circuit is connected in series with the isolating switch and then connected with a user zero line and a ground wire, the maintenance circuit breaker is indirectly arranged between the input end of the isolating switch at the input end of the compensation protection circuit and the output end of the isolating switch at the output end of the compensation protection circuit;
the controller uses FPGA as a control core, and comprises a voltage transformer, a current transformer, a signal conditioning circuit, an AD sampling chip, a zero-crossing comparison circuit, an optical coupling circuit and a driving circuit, wherein the input ends of the voltage transformer and the current transformer are all connected with a compensation capacitor bank, the output ends of the voltage transformer and the current transformer are all connected with the signal conditioning circuit, the output end of the signal conditioning circuit is connected with the input end of the AD sampling chip, the AD sampling chip is electrically connected with the FPGA, the input end of the voltage transformer is connected with the zero-crossing comparison circuit and then connected with the FPGA, the output end of the FPGA is connected with the optical coupling circuit and then connected with the driving circuit, and the output end of the driving.
Preferably, the discharge circuit includes a discharge contactor and a discharge resistor, the discharge contactor being connected in series with the discharge resistor.
Preferably, the voltage transformer converts voltages at two ends of the compensation capacitor bank into small signals and transmits the small signals to the signal conditioning circuit.
Preferably, the current transformer converts the current flowing through the compensation capacitor bank into a small signal and transmits the small signal to the signal conditioning circuit.
Preferably, the driving circuit is used for driving the bidirectional thyristor and the protection contactor.
Compared with the prior art, the beneficial effects of the utility model are that:
the utility model discloses the zero sequence impedance that the device was changed to Yyn0 distribution in principle has carried out the compensation, need not to change dynamic adjustment according to the three-phase load, for through administering the unbalanced mode platform district outlet voltage of three-phase load have device simple structure, reliable and stable, fortune dimension work load advantage such as few.
Drawings
FIG. 1 is a primary electrical diagram of the device of the present invention;
fig. 2 is a structural diagram of the controller of the present invention.
Illustration of the drawings: 1-a discharge contactor; 2-a discharge resistor; 3-a compensation capacitor bank; 4-a voltage transformer; 5-a current transformer; 6-damping reactance; 7-bidirectional thyristor; 8-a protective contactor; 9-an isolating switch; 10-service breaker.
Detailed Description
The present invention will be further described with reference to the accompanying drawings.
Referring to fig. 1-2, the present invention provides a technical solution: a Yyn0 distribution transformer zero sequence impedance compensation device comprises a maintenance circuit breaker 10, an isolating switch 9, a protection contactor 8, a bidirectional thyristor 7, a damping reactance 6, a compensation capacitor bank 3, a discharge circuit and a controller, wherein the damping reactance 6 and the bidirectional thyristor 7 are connected in series and then are connected in parallel with the compensation capacitor bank 3, the protection contactor 8 and the discharge circuit to form the compensation protection circuit, the input end of the compensation protection circuit is connected with a distribution zero line after being connected with the isolating switch 9 in series, the output end of the compensation protection circuit is connected with a user zero line and a ground wire after being connected with the isolating switch 9 in series, the maintenance circuit breaker 10 is connected between the input end of the isolating switch 9 at the input end of the compensation protection circuit and the output end of the isolating switch 9 at the output end, and the compensation capacitor bank 3 is;
the controller uses FPGA as a control core, and comprises a voltage transformer 4, a current transformer 5, a signal conditioning circuit, an AD sampling chip, a zero-crossing comparison circuit, an optical coupling circuit and a driving circuit, wherein the input ends of the voltage transformer 4 and the current transformer 5 are all connected with a compensation capacitor bank 3, the output ends of the voltage transformer 4 and the current transformer 5 are all connected with the signal conditioning circuit, the output end of the signal conditioning circuit is connected with the input end of the AD sampling chip, the AD sampling chip is electrically connected with the FPGA, the input end of the voltage transformer 4 is connected with the zero-crossing comparison circuit and then connected with the FPGA, the output end of the FPGA is connected with the optical coupling circuit and then connected with the driving circuit, and the output end of the driving.
Preferably, the discharge circuit comprises a discharge contactor 1 and a discharge resistor 2, and the discharge contactor 1 is connected with the discharge resistor 2 in series.
Preferably, the voltage transformer 4 transforms the voltage across the compensation capacitor bank 3 into a small signal and transmits the small signal to the signal conditioning circuit.
Preferably, the current transformer 5 converts the current flowing through the compensation capacitor group 3 into a small signal and transmits the small signal to the signal conditioning circuit.
Preferably, the drive circuit is used to drive the triac 7 and the protection contactor 8.
The working principle is as follows: when the three-phase voltage compensation device normally operates, the overhaul breaker 10, the protection contactor 8 and the discharge contactor 1 are disconnected, the bidirectional thyristor 7 is cut off, zero line current flows into a transformer zero line through the compensation capacitor bank 3 and is mutually compensated with Yyn0 zero-sequence excitation reactance, zero-sequence voltage components in three-phase voltage are eliminated, and the three-phase voltage is basically balanced. The capacitance value of the compensation capacitor is only related to the structure and the manufacturing process of the transformer, so that the zero sequence voltage compensation effect of the compensation capacitor cannot be influenced no matter the zero sequence current is increased or reduced. The voltage transformer 4 and the current transformer 5 transform the voltage at the two ends of the compensation capacitor bank 3 and the current flowing through the compensation capacitor bank 3 into small signals to be transmitted to the signal conditioning circuit, and the signals are filtered, amplified and the like through the signal conditioning circuit and input into the AD sampling chip. And the FPGA controls the AD sampling chip to sample, and processes and judges signals. When the FPGA detects that the voltage and the current of the compensation capacitor bank 3 exceed the protection value and the current of the compensation capacitor bank 3 exceeds the rated current, the device triggers a protection process, and drives the bidirectional thyristor 7 or the protection contactor 8 through the isolation of the optocoupler circuit and the amplification and denoising of the driving circuit. In the capacitor protection process, the bidirectional thyristor 7 is firstly conducted, so that the fault current does not flow through the compensation capacitor bank 3 any more, and then the protection contactor 8 is closed, so that the fault current flows through the protection contactor 8, and the bidirectional thyristor 7 is protected. Because the action time of the bidirectional thyristor 7 is very quick (ms level), the fault current can be bypassed at the first time, and the compensation capacitor bank 3 cannot be damaged; then the protective contactor 8 is put into, the bidirectional thyristor 7 is cut off, the thyristor can be effectively prevented from being damaged by continuous short-circuit current, and main devices of the device are protected to prevent the device from being out of work. After the fault is eliminated and recovered, the FPGA firstly controls the protective contactor 8 to be disconnected, then detects the voltage at two ends of the bidirectional thyristor 7 and the damping reactance 6, and controls the bidirectional thyristor 7 to be cut off and the compensation capacitor bank 3 to be put into use when the voltage is zero. When the device overhauls, maintainer manually closes and overhauls circuit breaker 10 and disconnect device both sides isolator 9 to close discharge contactor 1, wait to carry out the device again and overhaul after the completion of the charge release on compensation capacitor group 3, personnel's safety when can effectively guarantee the maintenance device.
The foregoing merely illustrates preferred embodiments of the present invention, which are described in considerable detail and detail, but are not to be construed as limiting the scope of the invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several changes, modifications and substitutions can be made, which are all within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (5)
1. The utility model provides a Yyn0 distribution transformer zero sequence impedance compensation arrangement which characterized in that: the device comprises an overhaul circuit breaker, an isolating switch, a protection contactor, a bidirectional thyristor, a damping reactance, a compensation capacitor bank, a discharge circuit and a controller, wherein the damping reactance is connected in series with the bidirectional thyristor and then connected in parallel with the compensation capacitor bank, the protection contactor and the discharge circuit to form the compensation protection circuit;
the controller uses FPGA as a control core, and comprises a voltage transformer, a current transformer, a signal conditioning circuit, an AD sampling chip, a zero-crossing comparison circuit, an optical coupling circuit and a driving circuit, wherein the input ends of the voltage transformer and the current transformer are all connected with a compensation capacitor bank, the output ends of the voltage transformer and the current transformer are all connected with the signal conditioning circuit, the output end of the signal conditioning circuit is connected with the input end of the AD sampling chip, the AD sampling chip is electrically connected with the FPGA, the input end of the voltage transformer is connected with the zero-crossing comparison circuit and then connected with the FPGA, the output end of the FPGA is connected with the optical coupling circuit and then connected with the driving circuit, and the output end of the driving.
2. The Yyn0 distribution transformer zero-sequence impedance compensation device according to claim 1, wherein: the discharging circuit comprises a discharging contactor and a discharging resistor, and the discharging contactor is connected with the discharging resistor in series.
3. The Yyn0 distribution transformer zero-sequence impedance compensation device according to claim 1, wherein: and the voltage transformer converts voltages at two ends of the compensation capacitor bank into small signals and transmits the small signals to the signal conditioning circuit.
4. The Yyn0 distribution transformer zero-sequence impedance compensation device according to claim 1, wherein: and the current transformer converts the current flowing through the compensation capacitor bank into a small signal and transmits the small signal to the signal conditioning circuit.
5. The Yyn0 distribution transformer zero-sequence impedance compensation device according to claim 1, wherein: the driving circuit is used for driving the bidirectional thyristor and the protection contactor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921826553.7U CN210985671U (en) | 2019-10-28 | 2019-10-28 | Yyn0 distribution transformer zero sequence impedance compensation arrangement |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921826553.7U CN210985671U (en) | 2019-10-28 | 2019-10-28 | Yyn0 distribution transformer zero sequence impedance compensation arrangement |
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| Publication Number | Publication Date |
|---|---|
| CN210985671U true CN210985671U (en) | 2020-07-10 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921826553.7U Active CN210985671U (en) | 2019-10-28 | 2019-10-28 | Yyn0 distribution transformer zero sequence impedance compensation arrangement |
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| CN (1) | CN210985671U (en) |
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- 2019-10-28 CN CN201921826553.7U patent/CN210985671U/en active Active
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