CN210923880U - AD (analog-to-digital) conversion circuit for cable online detection - Google Patents
AD (analog-to-digital) conversion circuit for cable online detection Download PDFInfo
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Abstract
The utility model discloses a be used for cable on-line measuring AD analog-to-digital conversion circuit, solved analog signal and all received the interference easily in each link of transmission to the analytical approach is limited, and is also relatively difficult to the storage of data, has just so led to the error ratio of analysis result great, the further processing and the storage transmission scheduling problem of also being convenient for data. The utility model discloses a sensor unit, difference input unit, AD analog-to-digital conversion unit and buffering output unit are put in the office. The utility model has the advantages of digital signal interference killing feature after the output is very strong to be suitable for and carry out various algorithm processing and storage, make the result of test more accurate, reduce the possibility of erroneous judgement, and behind the data digitization, more advanced technologies of adoption that can be extensive transmit the processing storage, for example computer and internet, just so can carry out the combination of inseparable degree of depth with internet of things, finally let the product realize intellectuality.
Description
Technical Field
The utility model relates to a power cable partial discharge detection area, concretely relates to be used for cable on-line measuring AD analog-to-digital conversion circuit.
Background
Partial discharge, called partial discharge for short, is a great potential safety hazard in the operation of a power cable, is a sign of cable insulation degradation, and is also one of important reasons for causing insulation degradation. Therefore, the method has important significance and economic value for partial discharge signal detection and positioning research of the power cable. Related local discharge signal testing standards are established by IEC and various countries in the world, weak links in an insulation system are found in time through detection of local discharge signals, fault reasons are found out, the quality of a power cable is guaranteed, and safe and reliable operation of a power system is guaranteed.
The existing ultrahigh frequency partial discharge monitoring device is used for monitoring the partial discharge condition of the high-voltage power transmission and distribution cable. When a partial discharge phenomenon occurs in the device, an ultrahigh frequency signal is generated, the high frequency signal is subjected to analog-to-digital conversion and analysis operation through the detection of the partial discharge sensor, and in the partial discharge signal acquisition unit, the acquired discharge pulse signal is superposed on the power frequency phase of the detection circuit to obtain a corresponding partial discharge pulse phase map so as to analyze the defect type of the partial discharge generation device. Therefore, the fidelity of the collected signals and various quantitative analysis means for the signals are very critical; however, the conventional monitoring device directly transmits the analog signal to the analysis device, the analog signal is easily interfered in each transmission link, the analysis means is limited, the amplitude, the frequency and the phase of the signal can only be simply checked, and the data is relatively difficult to store, so that the error of the analysis result is relatively large, and the further processing and storage transmission of the data are not convenient.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the technical problem that will solve is: analog signal all receives the interference easily in each link of transmission to the analytic means is limited, and is also difficult relatively to the storage of data, has just so led to the error ratio of analysis result great, the further processing and the storage transmission of also being convenient for data, the utility model provides a solve one kind of above-mentioned problem and be used for cable on-line measuring AD analog-to-digital conversion circuit.
The utility model discloses a following technical scheme realizes:
an AD (analog-to-digital) conversion circuit for cable online detection comprises a partial discharge sensor unit, a differential input unit, an AD conversion unit and a buffer output unit;
furthermore, the partial discharge sensor unit collects and outputs an ultrahigh frequency single-ended analog signal generated when the high-voltage output distribution cable is subjected to partial discharge;
further, the differential input unit receives the ultrahigh frequency single-ended analog signal collected by the partial discharge sensor unit, converts the ultrahigh frequency single-ended analog signal into a differential analog signal, and outputs the differential analog signal to the AD analog-to-digital conversion unit;
further, the AD analog-to-digital conversion unit receives the differential analog signal, converts the differential analog signal into a digital signal, and outputs the digital signal to the buffer output unit;
furthermore, the buffer output unit temporarily stores the digital signal after receiving the digital signal and outputs the digital signal to a post stage.
Furthermore, the differential input unit also comprises a coupling capacitor, a matching impedance and a high-frequency transformer;
further, after the high-frequency transformer secondary coil is tapped, the ultrahigh-frequency single-ended analog signal is converted into a differential analog signal, the coupling capacitor isolates a direct-current part of the differential analog signal, and the matching impedance is matched with the input impedance of the differential input unit 2.
Further, the differential input unit further comprises a ground protection capacitor C6, a differential mode interference elimination capacitor C7, an element protection impedance R9, an element protection impedance R18, a ground protection impedance R10 and a ground protection impedance R11;
further, the coupling capacitor further comprises a coupling capacitor C3, a coupling capacitor C4 and a coupling capacitor C5;
further, the matching impedance further comprises a matching impedance R12, a matching impedance R13, a matching impedance R14, a matching impedance R15, a matching impedance R16 and a matching impedance R17;
further, the high frequency transformer further comprises a high frequency transformer T1 and a high frequency transformer T2;
furthermore, the radio frequency input end of the differential input unit is sequentially connected in series with an element protection impedance R9 and a coupling capacitor C3 and then output to a branch 4, one end of the element protection impedance R10 is grounded, the other end of the element protection impedance R10 is connected to a branch 5, the branches 4 and 5 are connected to a high-frequency transformer T1, the high-frequency transformer T1 outputs a branch 3 and an output branch 1, and the branch 1 and the branch 4 are connected in parallel and then are connected in series with a grounding protection impedance R11 and then are grounded; a secondary coil of a high-frequency transformer T2 forms two output branches of a differential signal by adopting a center tap mode, the two output branches are an upper branch and a lower branch respectively, the upper branch is connected in series with a coupling capacitor C4, the lower branch is connected in series with a coupling capacitor C5, the two output branches of the differential signal are connected with a common-mode matching impedance circuit, wherein matching impedance R14 is common-mode matching impedance of the upper branch, matching impedance R15 is common-mode matching impedance of the lower branch, the common-mode matching circuit is connected with a component protection impedance R18 in parallel and then connected with a grounding protection capacitor C6 in series and then grounded, and the component protection impedance R18 is component protection impedance before a CML1 data port; the lower branch of the differential signal output branch is sequentially connected with a matching impedance R13 and a matching impedance R17 rear output port VIN-in series, and the upper branch of the differential signal output branch is sequentially connected with a matching impedance R12 and a matching impedance R16 rear output port VIN +, and a differential mode interference elimination capacitor C7 is connected at the position behind the matching impedance in front of the two output ports VIN + and VIN-.
Further, the part of the capacitor is selected, the values of the coupling capacitors C3, C4 and C5 are 0.1 muF, the value of the grounding protection capacitor C6 is 0.1 muF, and the value of the differential mode interference eliminating capacitor C7 is 20 pF.
Further, the impedance component is selected, the element protection impedance R9, the ground protection impedance R10, the ground protection impedance R11, the matching impedance R12, the matching impedance R13 and the element protection impedance R18 are all at one impedance position, the matching impedance R14 and the matching impedance R15 are 24.9 Ω, and the matching impedance R16 and the matching impedance R17 are 33 Ω.
Furthermore, the AD analog-to-digital conversion unit also comprises a chip U1 and elements such as impedance capacitors and the like which are matched with the periphery, wherein the chip U1 is an AD analog-to-digital conversion chip AD9233 BCPZ-125.
Furthermore, the buffer output unit further comprises a chip U2 and a peripherally matched impedance capacitor, and the chip U2 is 74VCX 162244G.
When a partial discharge phenomenon occurs in the device, an ultrahigh frequency signal can be generated, in a partial discharge sensor unit, through the detection of a partial discharge sensor, a differential input unit converts a single-end analog signal into a differential analog signal, the single-end output is realized, the output signals all use a common ground wire as a reference, the output method is mainly applied to the output signal voltage which is higher (higher than 1V), a wire from a signal source to analog output hardware is shorter (lower than 15ft), all the output signals share one reference ground wire, if the signals do not meet the standards, differential output is used, and each output signal has an own reference ground wire for differential output; the common mode noise can be eliminated by the conducting wire, so that noise error is reduced, when a signal is interfered, differential output is simultaneously influenced, but the voltage difference is not changed greatly, the anti-interference performance is better, and when a line of single-ended output is changed, GND is not changed, so that the voltage difference is changed greatly, and the anti-interference performance is poorer; isolating direct current components, enabling output power to be maximum under the action of impedance matching, then outputting an AD (analog-to-digital) conversion unit, and performing analog-to-digital conversion on a received high-frequency differential signal in the AD conversion unit so as to analyze the defect types of the partial discharge generating device; the differential and analog-to-digital conversion circuit is adopted to digitize analog signals, the anti-jamming capability of digital signals is very strong as well known, the coupling capacitor mainly has the functions of isolating direct current signals and impedance matching, and is mainly used on a transmission line to achieve the purpose that all high-frequency microwave signals can be transmitted to a load point, no signal is reflected back to a source point, so that the energy benefit is improved, and the high-frequency transformer can transmit alternating current signals and isolate direct current, so that the working points of the front stage and the rear stage are not mutually connected.
In summary, the invention digitizes the analog signal by adopting the differential and analog-to-digital conversion circuit, and the digital signal has strong anti-interference capability and is suitable for processing and storing various algorithms as well known; the test result is more accurate, the possibility of misjudgment is reduced, more advanced technologies can be widely adopted for transmission, processing and storage after data digitization, such as computers and the internet, and therefore the technology of the internet of things can be closely and deeply combined, and finally products are intelligentized.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The utility model discloses have following advantage and beneficial effect:
the utility model adopts two high-frequency transformers to realize the differential conversion of signals, because the common mode noise can be eliminated by the wire, thereby reducing the noise error, when the signal is interfered, the output of the difference is simultaneously influenced, but the voltage difference is not changed greatly, the anti-interference performance is better, and the high-frequency transformers can both transmit alternating current signals and cut off direct current, thus leading the working points of the front and rear stages not to be mutually involved;
the utility model adopts the impedance matching circuit, so that the output power can reach the purpose that all high-frequency microwave signals can be transmitted to the load point to the maximum extent, and no signal is reflected back to the source point, thereby improving the energy benefit;
drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
fig. 1 is a block diagram of the circuit structure of the present invention.
Fig. 2 is a block diagram of the differential input unit structure of the present invention.
Fig. 3 is a block diagram of the AD/d conversion unit structure of the present invention.
Fig. 4 is a block diagram of the buffer output unit structure of the present invention.
Reference numbers and corresponding part names in the drawings:
the device comprises a 1-partial discharge sensor unit, a 2-differential input unit, a 3-AD analog-to-digital conversion unit and a 4-buffer output unit.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 1, an AD/a conversion circuit for cable online detection includes a partial discharge sensor unit 1, and further includes a differential input unit 2, an AD/a conversion unit 3, and a buffer output unit 4;
on the basis of the previous embodiment, the partial discharge sensor unit 1 collects and outputs an ultrahigh frequency single-ended analog signal generated when a high-voltage output distribution cable is subjected to partial discharge;
on the basis of the previous embodiment, the differential input unit 2 receives the ultrahigh frequency single-ended analog signal collected by the partial discharge sensor unit 1, converts the ultrahigh frequency single-ended analog signal into a differential analog signal, and outputs the differential analog signal to the AD analog-to-digital conversion unit 3;
on the basis of the previous embodiment, the AD/a conversion unit 3 receives the differential analog signal, converts the differential analog signal into a digital signal, and outputs the digital signal to the buffer output unit 4;
on the basis of the previous embodiment, the buffer output unit 4 temporarily stores the digital signal after receiving the digital signal and outputs the digital signal to a subsequent stage.
As shown in fig. 2, based on the above embodiment, the differential input unit 2 further includes a coupling capacitor, a matching impedance, and a high-frequency transformer;
on the basis of the above embodiment, after the high-frequency transformer secondary coil is tapped, the ultrahigh-frequency single-ended analog signal is converted into a differential analog signal, the coupling capacitor isolates a direct-current part of the differential analog signal, and the matching impedance is matched with the input impedance of the differential input unit 2.
On the basis of the above embodiment, the differential input unit 2 further includes a ground protection capacitor C6, a differential mode interference elimination capacitor C7, an element protection impedance R9, an element protection impedance R18, a ground protection impedance R10, and a ground protection impedance R11;
on the basis of the previous embodiment, the coupling capacitors further comprise a coupling capacitor C3, a coupling capacitor C4 and a coupling capacitor C5;
on the basis of the previous embodiment, the matching impedance further includes a matching impedance R12, a matching impedance R13, a matching impedance R14, a matching impedance R15, a matching impedance R16, and a matching impedance R17;
on the basis of the previous embodiment, the high frequency transformer further comprises a high frequency transformer T1 and a high frequency transformer T2;
on the basis of the previous embodiment, the radio frequency input end of the differential input unit 2 is sequentially connected in series with an element protection impedance R9 and a coupling capacitor C3, and then output to a branch 4, one end of the element protection impedance R10 is grounded, the other end of the element protection impedance R3 is connected to a branch 5, the branches 4 and 5 are connected to a high-frequency transformer T1, the high-frequency transformer T1 outputs a branch 3 and a branch 1, and the branch 1 and the branch 4 are connected in parallel and then connected in series with a ground protection impedance R11, and then are grounded; a secondary coil of a high-frequency transformer T2 forms two output branches of a differential signal by adopting a center tap mode, the two output branches are an upper branch and a lower branch respectively, the upper branch is connected in series with a coupling capacitor C4, the lower branch is connected in series with a coupling capacitor C5, the two output branches of the differential signal are connected with a common-mode matching impedance circuit, wherein matching impedance R14 is common-mode matching impedance of the upper branch, matching impedance R15 is common-mode matching impedance of the lower branch, the common-mode matching circuit is connected with a component protection impedance R18 in parallel and then connected with a grounding protection capacitor C6 in series and then grounded, and the component protection impedance R18 is component protection impedance before a CML1 data port; the lower branch of the differential signal output branch is sequentially connected with a matching impedance R13 and a matching impedance R17 rear output port VIN-in series, and the upper branch of the differential signal output branch is sequentially connected with a matching impedance R12 and a matching impedance R16 rear output port VIN +, and a differential mode interference elimination capacitor C7 is connected at the position behind the matching impedance in front of the two output ports VIN + and VIN-.
On the basis of the previous embodiment, the components of the capacitor are selected, the values of the coupling capacitors C3, C4 and C5 are 0.1 μ F, the value of the ground protection capacitor C6 is 0.1 μ F, and the value of the differential mode interference elimination capacitor C7 is 20 pF.
On the basis of the previous embodiment, the impedance components are selected, the element protection impedance R9, the ground protection impedance R10, the ground protection impedance R11, the matching impedance R12, the matching impedance R13 and the element protection impedance R18 are all at one impedance position, the matching impedance R14 and the matching impedance R15 are 24.9 Ω, and the matching impedance R16 and the matching impedance R17 are 33 Ω.
As shown in fig. 3, based on the above embodiment, the AD/d conversion unit 3 further includes a chip U1 and a peripherally-associated impedance capacitor, and the chip U1 is an AD/d conversion chip AD9233 BCPZ-125.
As shown in fig. 4, based on the above embodiment, the buffer output unit 4 further includes a chip U2 and a peripherally-associated impedance capacitor, and the chip U2 is 74VCX 162244G.
On the basis of the previous embodiment, the digital signal output by the buffer output unit is suitable for various algorithm processing and storage; the test result is more accurate, the possibility of misjudgment is reduced, more advanced technologies can be widely adopted for transmission, processing and storage after data digitization, such as computers and the internet, and therefore the technology of the internet of things can be closely and deeply combined, and finally products are intelligentized.
The above-mentioned embodiments, further detailed description of the objects, technical solutions and advantages of the present invention, it should be understood that the above description is only the embodiments of the present invention, and is not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (7)
1. An AD (analog-to-digital) conversion circuit for cable online detection comprises a partial discharge sensor unit (1), and is characterized by further comprising a differential input unit (2), an AD analog-to-digital conversion unit (3) and a buffer output unit (4);
the partial discharge sensor unit (1) collects and outputs ultrahigh frequency single-ended analog signals generated when a high-voltage output distribution cable is subjected to partial discharge;
the differential input unit (2) receives the ultrahigh frequency single-ended analog signal collected by the partial discharge sensor unit (1), converts the ultrahigh frequency single-ended analog signal into a differential analog signal and outputs the differential analog signal to the AD conversion unit (3);
the AD conversion unit (3) receives the differential analog signal, converts the differential analog signal into a digital signal and outputs the digital signal to the buffer output unit (4);
and the buffer output unit (4) temporarily stores the digital signal after receiving the digital signal and outputs the digital signal to a post stage.
2. The AD converter circuit for cable on-line detection according to claim 1, wherein the differential input unit (2) further comprises a coupling capacitor, a matching impedance, a high frequency transformer;
after the high-frequency transformer secondary coil is tapped, the ultrahigh-frequency single-ended analog signal is converted into a differential analog signal, the coupling capacitor isolates the direct-current part of the differential analog signal, and the matching impedance is matched with the input impedance of the differential input unit (2).
3. The AD conversion circuit for cable on-line detection according to claim 2, wherein the differential input unit (2) further comprises a ground protection capacitor C6, a differential mode interference elimination capacitor C7, an element protection impedance R9, an element protection impedance R18, a ground protection impedance R10 and a ground protection impedance R11;
the coupling capacitor further comprises a coupling capacitor C3, a coupling capacitor C4 and a coupling capacitor C5;
the matching impedance further comprises a matching impedance R12, a matching impedance R13, a matching impedance R14, a matching impedance R15, a matching impedance R16 and a matching impedance R17;
the high-frequency transformer also comprises a high-frequency transformer T1 and a high-frequency transformer T2;
the radio frequency input end of the differential input unit (2) is sequentially connected with an element protection impedance R9 and a coupling capacitor C3 in series and then output to a branch 4, one end of the element protection impedance R10 is grounded, the other end of the element protection impedance R10 is connected to a branch 5, the branches 4 and 5 are connected with a high-frequency transformer T1, the high-frequency transformer T1 outputs a branch 3 and an output branch 1, and the branch 1 and the branch 4 are connected in parallel and then are connected with a grounding protection impedance R11 in series and then are grounded; a secondary coil of a high-frequency transformer T2 forms two output branches of a differential signal by adopting a center tap mode, the two output branches are an upper branch and a lower branch respectively, the upper branch is connected in series with a coupling capacitor C4, the lower branch is connected in series with a coupling capacitor C5, the two output branches of the differential signal are connected with a common-mode matching impedance circuit, wherein matching impedance R14 is common-mode matching impedance of the upper branch, matching impedance R15 is common-mode matching impedance of the lower branch, the common-mode matching circuit is connected with a component protection impedance R18 in parallel and then connected with a grounding protection capacitor C6 in series and then grounded, and the component protection impedance R18 is component protection impedance before a CML1 data port; the lower branch of the differential signal output branch is sequentially connected with a matching impedance R13 and a matching impedance R17 rear output port VIN-in series, and the upper branch of the differential signal output branch is sequentially connected with a matching impedance R12 and a matching impedance R16 rear output port VIN +, and a differential mode interference elimination capacitor C7 is connected at the position behind the matching impedance in front of the two output ports VIN + and VIN-.
4. The AD converter circuit for the on-line detection of cables as claimed in claim 3, wherein the components of said capacitor are selected, said coupling capacitors C3, C4 and C5 are 0.1 μ F, said ground protection capacitor C6 is 0.1 μ F, and said differential interference elimination capacitor C7 is 20 pF.
5. The AD conversion circuit for the on-line detection of the cable as claimed in claim 3, wherein the impedance component is selected, the component protection impedance R9, the ground protection impedance R10, the ground protection impedance R11, the matching impedance R12, the matching impedance R13 and the component protection impedance R18 are all at one impedance position, the matching impedance R14 and the matching impedance R15 are 24.9 Ω, and the matching impedance R16 and the matching impedance R17 are 33 Ω.
6. The AD converter circuit for the on-line cable detection of claim 1, wherein the AD converter unit (3) further comprises a chip U1 and a peripherally matched impedance capacitor, and the chip U1 is an AD converter chip AD9233 BCPZ-125.
7. The AD converter circuit for the cable on-line detection of claim 2, wherein the buffer output unit (4) further comprises a chip U2 and a peripherally matched impedance capacitor, and the chip U2 is 74VCX 162244G.
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| CN201921725311.9U CN210923880U (en) | 2019-10-15 | 2019-10-15 | AD (analog-to-digital) conversion circuit for cable online detection |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112924917A (en) * | 2020-12-29 | 2021-06-08 | 广东电网有限责任公司电力科学研究院 | On-site calibration platform of ultrahigh frequency partial discharge on-line monitoring system |
| CN113740639A (en) * | 2021-08-12 | 2021-12-03 | 西安交通大学 | Cable bundle electromagnetic pulse sensitivity testing system and method based on long line crosstalk |
-
2019
- 2019-10-15 CN CN201921725311.9U patent/CN210923880U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112924917A (en) * | 2020-12-29 | 2021-06-08 | 广东电网有限责任公司电力科学研究院 | On-site calibration platform of ultrahigh frequency partial discharge on-line monitoring system |
| CN113740639A (en) * | 2021-08-12 | 2021-12-03 | 西安交通大学 | Cable bundle electromagnetic pulse sensitivity testing system and method based on long line crosstalk |
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