CN210899139U - Analog-to-digital converter calibration system - Google Patents
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- CN210899139U CN210899139U CN201922318837.1U CN201922318837U CN210899139U CN 210899139 U CN210899139 U CN 210899139U CN 201922318837 U CN201922318837 U CN 201922318837U CN 210899139 U CN210899139 U CN 210899139U
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Abstract
The utility model discloses an analog to digital converter calibration system, wherein analog to digital converter calibration system includes: the device comprises a standard reference unit and a data acquisition and processing unit. Wherein the output terminal of the standard reference unit is connected with the input terminal of the analog-to-digital converter for generating the standard voltage. The data acquisition processing unit is respectively connected with the output end of the analog-to-digital converter and the standard reference source and is used for acquiring, processing and controlling the standard reference unit to work. According to the analog-to-digital converter calibration system in the technical scheme, the data acquisition and processing unit controls the standard reference unit to output a plurality of step-by-step decreasing voltage values to the analog-to-digital converter, and the data acquisition and processing unit simultaneously acquires the output values of the analog-to-digital converter and compares the output values with the reference values stored in the data acquisition and processing unit, so that comprehensive calibration of the analog-to-digital converter can be realized, and the problem troubleshooting is facilitated.
Description
Technical Field
The utility model relates to a data acquisition field, in particular to analog-to-digital converter calibration system.
Background
Analog-to-digital converters, i.e., analog-to-digital conversion devices, are widely used in various systems. Due to the complex links, many nodes and difficulty in online diagnosis in a complex system, active calibration of the analog-to-digital converter is often required.
The existing analog-to-digital converter calibration system only samples a fixed point, and when the analog-to-digital converter has non-fatal performance degradation due to aging, the problem of difficult troubleshooting can be caused.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, the utility model provides an analog to digital converter calibration system can step down through the control standard reference power supply output voltage gradient and realize analog to digital converter's comprehensive calibration.
The utility model discloses still provide an analog to digital converter calibration method.
According to the utility model discloses analog-to-digital converter calbiration system includes: the output end of the standard reference unit is connected with the input end of the analog-to-digital converter and used for generating a standard voltage; the data acquisition and processing unit is respectively connected with the output end of the analog-to-digital converter and the standard reference unit; the standard reference unit comprises a digital-to-analog converter, the output end of the digital-to-analog converter is connected with an analog-to-digital converter, the input end of the digital-to-analog converter is connected with the data acquisition and processing unit, the digit number of the digital-to-analog converter is higher than that of the analog-to-digital converter, and the integral nonlinearity, the differential nonlinearity error and the temperature drift characteristic of the digital-to-analog converter are superior to those of the analog-to-digital converter.
According to the utility model discloses analog-to-digital converter calbiration system has following beneficial effect at least: the data acquisition and processing unit controls the standard reference unit to output a group of gradually decreased voltage values to the analog-to-digital converter, and meanwhile, the data acquisition and processing unit receives actual digital quantity converted by the analog-to-digital converter and compares the actual digital quantity with a factory calibration reference value stored in the data acquisition and processing unit so as to realize comprehensive calibration of the analog-to-digital converter.
According to some embodiments of the present invention, still include a single-pole double-throw switch between standard reference cell and the analog-to-digital converter, standard reference cell's output with a motionless end of single-pole double-throw switch is connected, another motionless end and the sampling signal of single-pole double-throw switch are connected, the motionless end and the analog-to-digital converter of single-pole double-throw switch are connected.
According to some embodiments of the invention, the standard reference cell further comprises: a first power supply; the input end of the reference voltage chip is connected with the first power supply, and the output end of the reference voltage chip is connected with the digital-to-analog converter; wherein the first power supply is used for providing power for the normal operation of the digital-to-analog converter and the reference voltage chip.
According to some embodiments of the present invention, the data acquisition and processing unit comprises: a second power supply; the MCU is respectively connected with the analog-to-digital converter and the standard reference unit; the nonvolatile memory is connected with the MCU; wherein the second power supply is used for providing electric energy for the normal work of the MCU, the nonvolatile memory and the analog-to-digital converter.
According to some embodiments of the present invention, the first power supply includes a DC-DC conversion chip and a first low dropout regulator and a second low dropout regulator respectively connected to the output thereof, the input of the DC-DC converter is connected to the bus voltage, the output of the first low dropout regulator is connected to the reference voltage chip, the output of the second low dropout regulator is connected to the digital-to-analog converter.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a system block diagram of an embodiment of an analog-to-digital converter calibration system of the present invention;
FIG. 2 is a system block diagram of an embodiment of a standard reference cell of the present invention;
fig. 3 is a schematic circuit diagram of an embodiment of a first power supply of the present invention;
fig. 4 is a schematic circuit diagram of a first embodiment of the low dropout linear regulator of the present invention;
fig. 5 is a schematic circuit diagram of a second embodiment of the low dropout linear regulator of the present invention;
fig. 6 is a circuit schematic of an embodiment of a digital-to-analog converter of the present invention;
FIG. 7 is a flow chart of an embodiment of an analog to digital converter calibration method of the present invention;
fig. 8 is a flowchart of a specific method for obtaining the reference value according to the present invention;
fig. 9 is a flowchart of a specific method for acquiring an actual value according to the present invention.
Reference numerals:
a standard reference cell 100, a first power supply 110, a digital-to-analog converter 120, a reference voltage chip 130, a first low dropout regulator 140, a second low dropout regulator 150,
a data acquisition processing unit 200, a second power supply 210, an MCU220, a non-volatile memory 230,
a single pole double throw switch 300.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present invention, and should not be construed as limiting the present invention.
In the description of the present invention, a plurality of means are one or more, a plurality of means are two or more, and the terms greater than, less than, exceeding, etc. are understood as not including the number, and the terms greater than, less than, within, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.
Referring to fig. 1, an analog-to-digital converter calibration system according to an embodiment of the present invention includes a standard reference unit 100 and a data acquisition processing unit 200. The standard reference unit 100 is connected to the data acquisition processing unit 200, an output terminal of the standard reference unit 100 is connected to the analog-to-digital converter to be detected, and an output terminal of the analog-to-digital converter to be detected is connected to the data acquisition processing unit 200. When the analog-to-digital converter works, the data acquisition and processing unit 200 controls the standard reference unit 100 to output a group of voltage values with decreasing gradients as voltage values to the input end of the analog-to-digital converter, the analog-to-digital converter converts the voltage values into corresponding digital quantity actual values and transmits the digital quantity actual values to the data acquisition and processing unit 200, the data acquisition and processing unit 200 compares the actual values with reference values prestored in the data acquisition and processing unit 200, and the drift condition of the analog-to-digital converter is judged according to the comparison result. Because a plurality of points are sampled, the performance condition of the analog-to-digital converter can be comprehensively detected, and the problem in a communication system can be conveniently checked.
Referring to fig. 1, in some embodiments, specifically, the output terminal of the standard reference cell 100 is connected to the analog-to-digital converter through a single-pole double-throw switch 300, the input terminal of the analog-to-digital converter is connected to the moving terminal of the single-pole double-throw switch 300, the output terminal of the standard reference cell 100 is connected to one of the stationary terminals of the single-pole double-throw switch 300, and the other stationary terminal of the single-pole double-throw switch 300 is connected to the sampling signal. By switching the single pole double throw switch 300, the sampling source of the analog-to-digital converter can be changed, and the standard reference cell 100 is switched to be used as the signal source of the analog-to-digital converter when the analog-to-digital converter needs to be calibrated.
In some embodiments, in particular, the standard reference cell 100 includes a first power supply 110, a digital-to-analog converter 120, and a reference voltage chip 130. Wherein the digital-to-analog converter 120 is used for generating a standard voltage, the digital-to-analog converter 120 is connected with the data acquisition processing unit 200, and the output end of the digital-to-analog converter 120 is connected. The reference voltage chip 130 provides a reference voltage for the digital-to-analog converter 120 to further improve the accuracy of the digital-to-analog converter 120, and an output terminal of the reference voltage chip 130 is connected to the digital-to-analog converter 120. The first power supply 110 provides operating power for the digital-to-analog converter 120 and the reference voltage chip 130, and the input terminal of the first power supply 110 is connected to the bus. It will be appreciated that since the digital-to-analog converter 120 is used as a reference for the analog-to-digital converter, the digital-to-analog converter 120 needs to have better bit number, integral nonlinearity, differential nonlinearity error, and temperature drift characteristics than the calibrated analog-to-digital converter. In some embodiments, referring to fig. 2, the first power supply 110 provides operating power to the reference voltage chip 130 and the digital-to-analog converter 120 through two low dropout linear regulators, i.e., low dropout linear regulators.
Referring to fig. 1, in some embodiments, the data acquisition processing unit 200 includes a second power supply 210, an MCU220, and a non-volatile memory 230. The MCU220 is connected to the analog-to-digital converter and the standard reference unit 100, respectively, controls voltage output of the standard reference unit 100, and collects output of the analog-to-digital converter. The nonvolatile memory 230 is connected to the MCU220, and the nonvolatile memory 230 stores a reference value for determining whether the analog-to-digital converter drifts. It is understood that the MCU220 can select a microprocessor such as an FPGA, an ARM, or a DSP, and the nonvolatile memory 230 can select a FLASH or an EEPROM.
An analog-to-digital converter calibration system according to an embodiment of the present invention is described in detail below in a specific embodiment with reference to fig. 1 to 5. It is to be understood that the following description is illustrative only and is not intended as a specific limitation on the invention.
Referring to fig. 1, in the present embodiment, the MCU220 is connected to an input terminal of the digital-to-analog converter 120, the MCU220 transmits a digital value to the digital-to-analog converter 120, the digital-to-analog converter 120 converts the digital value into a corresponding voltage value, so as to control an output voltage of the digital-to-analog converter 120, and the non-volatile memory is an EEPROM. Referring to fig. 3, in the present embodiment, the LTM4622 chip is selected as the first power supply 110, which has an overvoltage protection function and can adapt to an ambient temperature of-40 to 85 ℃. Referring to fig. 4 and 5, in the present embodiment, LT3025 is used for both the first low dropout regulator 140 and the second low dropout regulator 150, where the first low dropout regulator 140 is used for outputting a dc voltage of 1.8V to the reference voltage chip 130, and the second low dropout regulator 150 is used for outputting to the digital-to-analog converter 120. LT3025 has very low noise and can be adapted to environments at-40 to 125 degrees Celsius. Referring to fig. 6, in the present embodiment, the digital-to-analog converter 120 selects the AD5693R of 16 bits. In this embodiment, the reference voltage chip 130 selects LT 6657-1.25.
Referring to fig. 7, an analog-to-digital converter calibration system according to an embodiment of the present invention realizes calibration by the following method, specifically including the following steps:
s100: when the power is on, the standard reference unit 100 sequentially outputs a group of initial values as A0And by a step value A0Voltage value A of/N gradually decreasingi＝A0-(i-1)A0N to the input of the analog-to-digital converter, where i is 1, 2, and 3 … … N, and the data acquisition processing unit 200 acquires N corresponding output values of the analog-to-digital converter as N reference values X1、X2……XNWherein N is a natural number. It will be appreciated that the number of samples nmax should not exceed the inverse of the resolution of the analog to digital converter, and the reference value for the analog to digital converter is typically calibrated once on first power-up and stored permanently in the non-volatile memory 230 as a standard for subsequent calibration.
S200: to start calibration, the standard reference unit 100 sequentially outputs a set of initial values A0And by a step value A0Voltage value A of/N gradually decreasingi＝A0-(i-1)A0N to the input of the analog-to-digital converter, where i is 1, 2, 3 … … N, and the data acquisition processing unit 200 obtains N corresponding output values of the analog-to-digital converter as N actual values Y1、Y2……YNWherein N is a natural number. Namely, the standard reference unit 100 is controlled to output a set of gradually decreasing voltage values which are the same as the acquired reference value to the input end of the analog-to-digital converter, the data acquisition processing unit detects 200 a corresponding set of outputs of the analog-to-digital converter as actual values, and the errors of each point of the analog-to-digital converter can be calibrated by comparing the actual values with the reference value.
S300: respectively calculating the difference between the corresponding actual value and the reference value to obtain N drift amounts Z1、 Z2……ZNWherein Z isi＝Yi-Xi；
S400: and respectively comparing the drift amount and the precision to determine the point position where the drift occurs.
Referring to fig. 8, in some embodiments, since different analog-to-digital converters have different performances and the precision of the digital-to-analog converter 120 used as a calibration standard is higher than that of the analog-to-digital converter, the output of a point where the input and the output of the analog-to-digital converter are exactly the same needs to be taken as a reference value when acquiring the reference value, and specifically, the method of acquiring the reference value in step S100 adopts the following manner:
s110: the analog-to-digital converter samples the input voltage value of the current input end for a certain time T1；
S120: the data acquisition processing unit processes the time T1Averaging the output values of the internal analog-to-digital converters;
s130: subtracting the average value from the input voltage value to obtain a difference value C;
s140: if the difference C is not 0, go to step S150; if the difference C is 0, go to step S160;
s150: the data acquisition and processing unit 200 controls the standard reference unit 100 to output a voltage value B to the input end of the analog-to-digital converter, and step S110 is performed, wherein if the difference value C is a negative value, the voltage value B is higher than the last output voltage value of the standard reference unit 100 by | C |/RES1 voltage units; if the difference C is a positive value, the voltage value B is lower than the last output voltage value of the standard reference cell 100 by | C |/RES1 voltage units; where RES1 is the resolution of digital-to-analog converter 120 in standard reference voltage cell 100. I.e. for a certain voltage value a according to the value of the difference CiPerforming fine adjustment to gradually approach the voltage value AiNearby points where the analog to digital converter inputs and outputs exactly correspond.
S160: the average value is AiCorresponding reference value XiIntroducing said XiStored in the non-volatile memory 230 if i<N, the data acquisition processing unit 200 controls the standard reference unit 100 to output the next voltage value Ai+1To the input of the analog-to-digital converter, go to step S110; if i is equal to N, the process proceeds to step S200.
The following is to obtain the reference value X1Specifically, for example, i is 1. The first execution stepIn S110, the standard reference unit 100 outputs a voltage value a under the control of the data acquisition processing unit 2001＝A0To an analog to digital converter. The average value obtained after step S120 is D11And the difference obtained after the step S130 is recorded as C11If C is11Is 0, then X1Has a value of B11Make the standard reference cell 100 output the next voltage value A2＝A0-A0/N, and then returns to S110 to obtain the next reference value X2(ii) a If C11If not 0, then according to C11The positive and negative values of (C) adjust and output again the output of the standard reference cell 100, C11When the voltage value is negative, the voltage value outputted by the standard reference cell 100 when S110 is executed next time is marked as B11＝A0+|C11|/RES1，C11If the voltage value is positive, the voltage value outputted by the standard reference unit 100 when S110 is executed next time is marked as B11＝A0-|C11I/RES 1. Then returns to step S110 and acquires B via step S120 and step S130, respectively12And C12Then, the process proceeds to step S140 again. If C12Is 0 then X1Has a value of B12Make the standard reference cell 100 output the next voltage value A2＝A0-A0/N, and then returns to S110 to obtain the next reference value X2(ii) a If at this time C12When the voltage value is negative, the voltage value outputted by the standard reference cell 100 when S110 is executed next time is marked as B12＝B11+|C12|/RES1，C12If the voltage value is positive, the voltage value outputted by the standard reference unit 100 when S110 is executed next time is marked as B12＝B11-|C12I/RES 1, and returns to step S110 again until the j-th acquisition of C1jTime C1jWhen X is equal to 01Has a value of B1jMake the standard reference cell 100 output the next voltage value A2＝A0-A0N, to obtain the next voltage value A2Corresponding reference value X2. After a final number of cycles, i.e. all AiAfter all of i 1, 2, and 3 … … N are output by the standard reference unit 100, all reference values are obtained.
Referring to fig. 9, in some embodiments, the procedure of measuring the actual value is substantially the same as the procedure of obtaining the reference value, except that the obtained actual value is used for comparison with the reference value and is only stored in the buffer of the MCU220, and the specific steps include:
s210: the analog-to-digital converter samples the input voltage value of the current input end for a certain time T2；
S220: the data acquisition processing unit 200 processes the time T2Averaging the output values of the internal analog-to-digital converters;
s230: subtracting the average value from the input voltage value to obtain a difference value C';
s240: if the difference C' is not 0, go to step S150; if the difference C' is 0, go to step S160;
s250: the data acquisition and processing unit 200 controls the standard reference unit to output a voltage value B 'to the input terminal of the adc, and step S210 is performed, wherein if the difference value C' is a negative value, the voltage value B 'is higher than the last output voltage value of the standard reference unit 100 by | C' |/RES1 voltage units; if the difference C ' is a positive value, the voltage value B ' is lower than the last output voltage value of the standard reference cell 100 by | C ' |/RES1 voltage units; where RES1 is the resolution of digital-to-analog converter 120 in standard reference voltage cell 100;
s260: the average value is AiCorresponding reference value YiIntroduction of said Y intoiStored in the data and processing unit 200 if i<N, the data acquisition processing unit 200 controls the standard reference voltage unit 100 to output the next voltage value Ai+1To the input of the analog-to-digital converter, go to step S210; if i is equal to N, the process proceeds to step S300.
In some embodiments, the criterion for determining the ith point is based on the resolution of the analog-to-digital converter if the drift amount | Z at the ith point is larger thaniIf 0, the point is not shifted; if the drift amount of the point and two continuous points behind the point satisfies 0 < | ZiIf < RES2, the point is shifted, where RES2 is the resolution of the analog-to-digital converterThe number of sampling point positions N is 1/RES 2; if the amount of drift at this point is not less than the resolution RES2 of the analog-to-digital converter, i.e. | ZiIf | ≧ RES2, the point also drifts. It will be appreciated that the initial value A of the decreasing voltage is output01V, which can be convenient for calculation, can be any value within the range measured by the analog-to-digital converter.
Taking the example that the number of bits of the dac 120 is 16 bits and the number of bits of the calibrated adc is 12 bits, the resolution RES1 of the dac 120 is 1/65536, the resolution RES2 of the adc is 1/4096, 4096 samples need to be taken from the adc during calibration, and the step value of the output voltage drop of the standard reference cell 100 after each sample is completed is a0/4096。
According to the utility model discloses analog-to-digital converter calbiration system exports a plurality of progressively degressive magnitude of voltage for analog-to-digital converter through data acquisition processing unit control standard reference unit, and data acquisition processing unit gathers analog-to-digital converter's output value simultaneously to compare with the benchmark value of saving in data acquisition processing unit, can realize comprehensive analog-to-digital converter calibration, the investigation of the problem of being convenient for. Meanwhile, the standard reference unit adopts a digital-to-analog converter with higher precision as a standard, so that the implementation is easy and the cost is lower.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.
Claims (5)
1. An analog-to-digital converter calibration system, comprising:
a standard reference cell (100) having an output connected to an input of the analog-to-digital converter for generating a standard voltage;
the data acquisition processing unit (200) is respectively connected with the output end of the analog-to-digital converter and the standard reference unit;
wherein the standard reference unit (100) comprises a digital-to-analog converter (120), the output end of the digital-to-analog converter (120) is connected with an analog-to-digital converter, the input end of the digital-to-analog converter (120) is connected with the data acquisition processing unit (200), the number of bits of the digital-to-analog converter (120) is higher than that of the analog-to-digital converter, and the integral nonlinearity, the differential nonlinearity error and the temperature drift characteristic of the digital-to-analog converter (120) are superior to those of the analog-to-digital converter.
2. The analog-to-digital converter calibration system according to claim 1, further comprising a single-pole double-throw switch (300) between the standard reference cell (100) and the analog-to-digital converter, wherein an output terminal of the standard reference cell (100) is connected to a fixed terminal of the single-pole double-throw switch (300), another fixed terminal of the single-pole double-throw switch (300) is connected to the sampling signal, and the fixed terminal of the single-pole double-throw switch (300) is connected to the analog-to-digital converter.
3. The analog-to-digital converter calibration system according to claim 1, characterized in that said standard reference cell (100) further comprises:
a first power supply (110);
a reference voltage chip (130) having an input terminal connected to the first power supply (110) and an output terminal connected to the digital-to-analog converter (120);
wherein the first power supply (110) is used for providing power for the normal operation of the digital-to-analog converter (120) and the reference voltage chip (130).
4. The analog-to-digital converter calibration system according to claim 1, characterized in that said data acquisition processing unit (200) comprises:
a second power supply (210);
an MCU (220) connected to the analog-to-digital converter and the standard reference cell (100), respectively;
a non-volatile memory (230) connected to the MCU (220);
wherein the second power supply (210) is used to provide electrical energy for normal operation of the MCU (220), the non-volatile memory (230), and the analog-to-digital converter.
5. The ADC calibration system of claim 3, wherein the first power supply (110) comprises a DC-DC conversion chip and a first LDO (140) and a second LDO (150) respectively connected to the output terminals thereof, the input terminal of the DC-DC converter is connected to the bus voltage, the output terminal of the first LDO (140) is connected to the reference voltage chip (130), and the output terminal of the second LDO (150) is connected to the digital-to-analog converter (120).
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Address after: No.2 Gangle Road, Tangjiawan Town, Zhuhai City, Guangdong Province 519080 Patentee after: Guangdong Narui Radar Technology Co.,Ltd. Address before: No.2 Gangle Road, Tangjiawan Town, Zhuhai City, Guangdong Province 519080 Patentee before: Zhuhai Naruida Technology Co.,Ltd. |