CN210899100U

CN210899100U - Reconfigurable broadband balun impedance matching circuit for power amplifier

Info

Publication number: CN210899100U
Application number: CN201922033129.3U
Authority: CN
Inventors: 欧荣德; 陈振骐
Original assignee: Shenzhen Nuoruixin Technology Co ltd
Current assignee: Shenzhen Nuoruixin Technology Co ltd
Priority date: 2019-11-22
Filing date: 2019-11-22
Publication date: 2020-06-30
Anticipated expiration: 2029-11-22

Abstract

The utility model provides a restructural broadband balun impedance matching circuit for power amplifier belongs to radio frequency chip design technical field. The circuit comprises a broadband balun realized on an off-chip packaging substrate, an on-chip tunable first capacitor which is connected with a balun balanced port and consists of a plurality of capacitors and switches, and an on-chip tunable second capacitor which is connected with a balun unbalanced port and consists of a capacitor and a switch, wherein the on-chip tunable first capacitor and the tunable second capacitor are both manufactured on the same chip; one end of the tunable first capacitor is connected with one balanced port of the balun, the other end of the tunable first capacitor is connected with the other balanced port of the balun, the two balanced ports of the balun are connected with a balanced output port of the differential power amplifier, one end of the tunable second capacitor is connected with an unbalanced port of the balun, and the other end of the tunable second capacitor is connected with a ground port of the balun. The utility model discloses can make single CMOS difference power amplifier adjust work on the different frequency channels, satisfy the mobile communication system requirement of multimode multifrequency, expansibility is strong.

Description

Reconfigurable broadband balun impedance matching circuit for power amplifier

Technical Field

The utility model belongs to the technical field of the radio frequency chip design, in particular to a restructural broadband balun impedance matching circuit for power amplifier.

Background

At present, 4G/5G networks develop rapidly, and due to different frequencies divided to operators, radio frequency systems need to support different frequency bands. Thus, the power amplifier on the transmit chain also has a requirement to support different frequency bands. Moreover, these frequency bands fall within a wide frequency range, which is typically 700MHz to 2700MHz in 4G systems, and even wider in future 5G systems.

It is also difficult to meet such a wide band requirement with a single amplifier for the power amplifier integrated on a CMOS rf transceiver chip today. In order to realize the operation in different frequency bands, the power amplifier is generally divided into a low-frequency power amplifier combination, an intermediate-frequency power amplifier combination and a high-frequency power amplifier combination, or a low-frequency power amplifier combination, an intermediate-frequency power amplifier combination and a high-frequency power amplifier combination, so as to meet the requirements of the system.

On a CMOS radio frequency receiving and transmitting chip, a conventional single-ended power amplifier has certain difficulty in realizing high-power output, and the transistor breakdown voltage of the CMOS process is low, so that the swing of the output voltage is limited, and the output power is limited. The common solution is to use a power amplifier with a differential structure to implement power combining and increase output power, but the system often needs a single-ended signal, so a balun is introduced at the output port of the differential power amplifier, which is a circuit for converting a balanced signal into an unbalanced signal, and implements differential-to-single-ended conversion of the signal. However, whether the balun is implemented on-chip or off-chip, the balun occupies a large area, and as a result, the use of a plurality of power amplifier combinations with different frequencies greatly increases the chip area, and accordingly, the cost and the complexity of the system are greatly increased.

At present, aiming at the requirement of multi-mode and multi-frequency of a mobile communication system, the solution is to widen the working bandwidth of each power amplifier as much as possible and reduce the number of the power amplifiers. The number of frequency bands supported by the CMOS differential power amplifier is increased, and the frequency bands can be adjusted by using a tunable inductor or a tunable capacitor, or by directly using an ultra-wideband balun. At present, the existing commercial SMT ultra-wideband balun device can support the frequency band of the whole 4G system, but has the disadvantage of high cost, and the power amplifier equipped with such a balun has very high gain in a very wide frequency band, so that the power spectral density of some receiving frequency bands is improved, interference on the receiving frequency bands is possibly caused, and the out-of-band rejection requirement on a filter on a receiving link is increased. Therefore, the use of tunable impedance matching circuits is also the most common approach. The most common tunable balun impedance matching circuit is generally composed of three parts, namely a balun, a balun balanced port adjustable capacitor, and a balun unbalanced port adjustable capacitor. The method is suitable for large-current application because the balun is realized on the substrate, and has the defects that the unbalanced port capacitor uses an SMD device, so that the adjustment cannot be realized, and the tunable working frequency range of the matching circuit is limited; (2) the matching circuits are all integrated on a CMOS chip, capacitors of the full integration scheme are all integrated on the chip and can be flexibly adjusted, but the on-chip balun Q value is low, so that the power amplifier is not suitable for large-current scenes, the inductance value is difficult to be large, and the support of a low frequency band is limited; (3) the scheme can improve the Q value of the inductor on the balun by using the SOI process, and the capacitor can be realized on chip, so that the matching circuit has a wide working frequency band adjusting range, but the method needs to design one more chip to be packaged together, and the cost is increased.

Disclosure of Invention

The utility model aims at reducing the quantity of power amplifier on the multimode multifrequency CMOS radio frequency chip, reducing tunable balun impedance matching circuit's realization cost, providing a reconfigurable broadband balun impedance matching circuit for power amplifier. The utility model discloses can make single CMOS difference power amplifier adjust work on the different frequency channels, satisfy the mobile communication system requirement of multimode multifrequency.

The utility model provides a restructural broadband balun impedance matching circuit for power amplifier, a serial communication port, including the broadband balun that realizes on the off-chip packaging substrate, connect the tunable first electric capacity on the piece that comprises a plurality of electric capacity and switch of balun balanced port, connect tunable second electric capacity on the piece that comprises electric capacity and switch of balun unbalanced port, tunable first electric capacity and tunable second electric capacity on the piece are all made on same chip; one end of the tunable first capacitor is connected with one balanced port of the balun, the other end of the tunable first capacitor is connected with the other balanced port of the balun, the two balanced ports of the balun are connected with a balanced output port of the differential power amplifier, one end of the tunable second capacitor is connected with an unbalanced port of the balun, and the other end of the tunable second capacitor is connected with a ground port of the balun.

The utility model discloses a characteristics and beneficial effect are:

the balun is realized on the off-chip packaging substrate, compared with the on-chip balun, the Q value of the balun is improved, so that the balun can meet a wider working frequency range, is particularly favorable for a low frequency range lower than 1GHz, has stronger current carrying capacity, and is particularly suitable for a high-current application scene of a power amplifier; tunable capacitors are connected to balanced and unbalanced ports of the balun, and the applicable frequency range of the impedance matching circuit is flexible and adjustable; the tunable capacitors connected with the balun balanced port and the unbalanced port are realized on the same CMOS chip, the integration level is high, the cost is low, digital signals can be conveniently used for controlling, the capacitance precision is accurate, and the tuning precision of the impedance matching circuit is high.

The utility model discloses a technical scheme of the tunable electric capacity of balun balanced port and the tunable electric capacity of unbalanced port on the same chip of off-chip packaging substrate balun cooperation, the cost is lower, and expansibility is strong, utilizes the high Q value balun on the packaging substrate to and the tunable electric capacity of the big tuning range on the piece, can realize that impedance matching circuit reconstructs in wide frequency range, support different working frequency channels.

Drawings

Fig. 1 is a general schematic diagram of an impedance matching circuit of the present invention;

fig. 2 is a diagram of the structure of the baseplate balun of the present invention;

fig. 3 is a schematic diagram of the tunable operating frequency range of the present invention.

Detailed Description

The utility model provides a restructural broadband balun impedance matching circuit for power amplifier combines the figure and embodiment to explain as follows in detail:

the utility model provides a restructural broadband balun impedance matching circuit for power amplifier, include the broadband balun that realizes on the off-chip packaging substrate, connect the tunable first electric capacity on the piece that comprises a plurality of electric capacity and switch of balun balanced port, connect tunable second electric capacity on the piece that comprises electric capacity and switch of balun unbalanced port, tunable first electric capacity and tunable second electric capacity are all made on same chip on the piece; one end of the tunable first capacitor is connected with one balanced port of the balun, the other end of the tunable first capacitor is connected with the other balanced port of the balun, the two balanced ports of the balun are connected with a balanced output port of the differential power amplifier, one end of the tunable second capacitor is connected with an unbalanced port of the balun, and the other end of the tunable second capacitor is connected with a ground port of the balun.

Fig. 1 is a schematic diagram of an impedance matching circuit according to an embodiment of the present invention. The off-chip digital tunable capacitor comprises a balun T1 on an off-chip packaging substrate, a 6-bit digital tunable capacitor consisting of capacitors C1-C12 and switches S1-S6 and used as an on-chip first tuning capacitor connected with a balun balanced port, and a 2-bit digital tunable capacitor consisting of capacitors C13-C14 and switches S7-S8 and used as an on-chip second tuning capacitor connected with a balun unbalanced port. The balanced ports (rf input _ P, rf input _ N) of the impedance matching circuit are connected to the output of the differential power amplifier to provide a 100 ohm load to the amplifier output. The unbalanced port (rf output) of the impedance matching circuit is connected to a 50 ohm load commonly used in rf systems. Balun T1 is a balun with a feed port from which the power supply of the power amplifier is introduced. In the first tuning capacitor, C1 to C12 are momap (Metal-Oxide-Metal capacitor) capacitors on a CMOS chip, C1, C2 are 200fF, C3, C4 are 400fF, C5, C6 is 800fF, C7, C8 is 1.6pF, C9, C10 is 3.2pF, C11, C12 is 6.4pF, switches S1 to S6 are NMOS transistors, the capacitance range of the first tunable capacitor is 0.1pF to 6.3pF, and the tuning step is 0.1 pF. In the second tuning capacitor, C13-C14 are MOMCAP capacitors on a CMOS chip, C13 is 300fF, C14 is 3.2pF, and switches S7 and S8 are NMOS tubes, so that the formed tunable capacitor can provide two-stage capacitance values of 3.5pF and 3.2pF when the low-frequency band is matched, and provides a capacitance value of 0.3pF when the medium-frequency band is matched with the high-frequency band. The two digital tunable capacitors are manufactured on the same CMOS radio frequency chip.

Fig. 2 is a perspective view of a specific implementation manner of balun T1 in this embodiment. The balun adopts a symmetrical structure of a two-layer metal symmetrical structure manufactured on a two-layer substrate, and realizes spiral wiring on top-layer metal, wherein the symmetrical structure of the two-layer metal is as follows: the first layer of metal and the second layer of metal are connected through four through holes in the centers of the two symmetrical squares. Leading in and leading out signals through a second layer of metal, wherein a balun I has 7 ports, and P3 is a Vdd feed port and provides the leading-in of direct current signals; p1 and P2 are balance ports of the balun, are connected with the output end of the differential power amplifier, and are simultaneously connected with a first tunable capacitor of the impedance matching circuit; p4 and P6 are ground ports of the balun, P4 is connected with the ground port of the chip, and P6 is connected with the ground of the packaging substrate; p5 and P7 are unbalanced ports of a balun, P5 is connected with a second tunable capacitor on the chip, and P7 is connected with a signal output port of the packaging substrate and then connected with an external 50 ohm load through the packaging substrate. The balun T1 only needs two layers of substrates, the line width and the line spacing of the winding are both 25um, and the total size of the balun is 1400um x 700 um.

Fig. 3 is a schematic diagram of the tunable operating frequency range of the present invention. When the 6-bit digital tunable capacitor is adjusted to 0.3pF and the 2-bit digital tunable capacitor is adjusted to 0.3pF, the insertion loss of the impedance matching circuit is 0.5dB at the frequency of 2.7 GHz; when the 6-bit digital tunable capacitor is adjusted to 6.3pF and the 2-bit digital tunable capacitor is adjusted to 3.2pF, the insertion loss of the impedance matching circuit is 0.6dB at the frequency of 700 MHz. By configuring the capacitance values of the two digital tunable capacitors, the impedance matching circuit can work in any frequency band within the frequency range of 0.7-2.7G, and the conversion from 50-ohm single-end impedance to 100-ohm differential impedance is realized.

Claims

1. A reconfigurable broadband balun impedance matching circuit for a power amplifier is characterized by comprising a broadband balun realized on an off-chip packaging substrate, an on-chip tunable first capacitor which is connected with a balun balanced port and consists of a plurality of capacitors and switches, and an on-chip tunable second capacitor which is connected with a balun unbalanced port and consists of a capacitor and a switch, wherein the on-chip tunable first capacitor and the tunable second capacitor are both manufactured on the same chip; one end of the tunable first capacitor is connected with one balanced port of the balun, the other end of the tunable first capacitor is connected with the other balanced port of the balun, the two balanced ports of the balun are connected with a balanced output port of the differential power amplifier, one end of the tunable second capacitor is connected with an unbalanced port of the balun, and the other end of the tunable second capacitor is connected with a ground port of the balun.

2. The reconfigurable broadband balun impedance matching circuit for a power amplifier according to claim 1, wherein the broadband balun adopts a two-layer metal symmetrical structure fabricated on a two-layer substrate, and realizes spiral routing on a top-layer metal, and the two-layer metal symmetrical structure is: the first layer of metal and the second layer of metal are connected through four through holes in the centers of two symmetrical squares; leading in and leading out signals through a second layer of metal, wherein a balun has 7 ports, and comprises a Vdd feeding port P3 for providing the leading in of direct current signals; the first balanced port P1 and the second balanced port P2 of the balun are used for being simultaneously connected with the differential output end of the differential power amplifier and simultaneously connected with the first tunable capacitor of the impedance matching circuit; a first ground port P4 and a second ground port P6 of the balun, wherein the first ground port P4 is connected with the ground port of the chip, and the second ground port P6 is connected with the ground of the package substrate; the first unbalanced port P5 and the second unbalanced port P7 of the balun, the first unbalanced port P5 is connected with a second tunable capacitor on the chip, and the second unbalanced port P7 is connected with a signal output port of the package substrate and then connected with an external 50 ohm load through the package substrate.