CN210807238U

CN210807238U - FM demodulation system capable of automatically tracking carrier

Info

Publication number: CN210807238U
Application number: CN201922381856.9U
Authority: CN
Inventors: 李文博; 羊硕雄; 李新阳; 杨光义
Original assignee: Wuhan University WHU
Current assignee: Wuhan University WHU
Priority date: 2019-12-26
Filing date: 2019-12-26
Publication date: 2020-06-19
Anticipated expiration: 2029-12-26

Abstract

The utility model provides an FM demodulation system capable of automatically tracking carrier waves, which comprises an antenna module, a passive band-pass filter module, a low-noise fixed amplifier module, a down-conversion module, a 10.7MHz ceramic filter module, an FM demodulation module, an active low-pass filter module, a control module and a display module which are connected in sequence; the utility model discloses a direct current voltage signal feedback control eigen frequency of FM demodulation module output is gathered to control module, has realized down the carrier frequency conversion to 10.7MHz and has been the function that the carrier was trailed promptly, has realized the function of carrying out the FM demodulation when carrier frequency drifts promptly, and the FM signal frequency band of receipt is wide, shows the carrier frequency of FM signal in real time, has overcome the influence of FM signal carrier frequency drift to wireless channel transmission. The utility model discloses simple structure, the interference killing feature is strong, and stability is good, convenient to use.

Description

FM demodulation system capable of automatically tracking carrier

Technical Field

The utility model belongs to the technical field of the high frequency instrument, concretely relates to FM demodulation system of automatic tracking carrier wave.

Background

Fm (frequency modulation) technology, which is a process of controlling the frequency of a carrier signal by a baseband signal to change linearly with the baseband signal, is widely used in high-fidelity music broadcasting, transmission of television audio signals, satellite communication, cellular phone systems, and the like.

FM modulation techniques include direct frequency modulation and indirect frequency modulation. Directly applying the baseband signal for frequency modulation to the voltage-controlled oscillator to enable the voltage-controlled oscillator to reflect the change rule of the baseband signal without distortion; the direct frequency modulation is convenient to realize, the generated frequency deviation is larger, but the stability of the central frequency is lower. The indirect frequency modulation firstly integrates the baseband signal and then phase modulates the signal after the integration; the center frequency stability of indirect frequency modulation is higher, but the realization is more complex, and the generated frequency deviation is smaller.

FM demodulation techniques include coherent demodulation and non-coherent demodulation. Coherent demodulation extracts synchronous signals with the same frequency and phase as the carrier signals from the modulated wave signals, so that the system is complex and difficult to realize; the noncoherent demodulation does not need to extract synchronous signals, and the application is wide.

Direct frequency modulation is widely applied in the fields of short-distance pagers, wireless broadcasting and the like, and solving the problem that reception is not easy to be one of the key points of applying FM demodulation technology due to low stability of the center frequency of direct frequency modulation. There is a strong need in the market for a non-coherent demodulation system that can solve the carrier frequency drift problem.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is: an FM demodulation system for automatically tracking a carrier is provided, which realizes an FM demodulation function when a carrier frequency drifts by tracking the carrier.

The utility model discloses a solve the technical scheme who above-mentioned technical problem took and be: an FM demodulation system capable of automatically tracking a carrier comprises an antenna module for receiving an FM signal of a specific frequency band, a filter module 1 for filtering noise outside the specific frequency band, an amplifier module for amplifying a weak FM signal, a down-conversion module for down-converting the FM signal of a high frequency band into an FM signal of an intermediate frequency, a filter module 2 for filtering sum frequency and image frequency noise generated by the down-conversion module, an FM demodulation module for demodulating the FM signal to obtain a baseband signal and outputting a direct current voltage signal in direct proportion to the carrier frequency of the FM signal, and a filter module 3 for filtering noise outside the frequency band of the baseband signal; the control module is used for controlling the eigenfrequency according to the direct current signal feedback output by the FM demodulation module; the antenna module, the filter module 1, the amplifier module, the down-conversion module, the filter module 2, the FM demodulation module and the filter module 3 are sequentially connected in series, a frequency receiving end of the control module is connected with a frequency transmitting end of the FM demodulation module, and a frequency transmitting end of the control module is connected with a frequency receiving end of the down-conversion module; the filter module 1 comprises a passive band-pass filter circuit which is formed by a 17-order Chebyshev I-type filter through high-low pass cascade and is configured with input impedance and output impedance; the amplifier module comprises a fixed amplifying circuit consisting of a low-noise fixed amplifier U2; the down-conversion module comprises a passive mixer U3 which is used for converting signal frequency and is subjected to impedance matching and a direct digital frequency synthesizer DDS1 which is used for generating signal frequency according to received information, wherein the frequency output end of the direct digital frequency synthesizer DDS1 is connected with the frequency receiving end of the passive mixer U3; the filter module 2 comprises a filter circuit formed by a 10.7MHz ceramic filter U5; the FM demodulation module comprises a demodulation circuit formed by impedance matching of an intermediate frequency transformer L13 and a demodulator U6; the filter module 3 comprises an 8 th order butterworth active filter circuit formed by an operational amplifier U1; the control module comprises a control circuit formed by an FPGA chip U4.

According to the above scheme, the filter module 1 comprises a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a ninth inductor L9, a tenth inductor L10 and an eleventh inductor L11 which are connected in series in sequence, a first capacitor C1 with one end connected with a connection point of the first inductor L1 and the second inductor L2 and the other end connected with a signal ground GND, a second capacitor C2 with one end connected with a connection point of the second inductor L2 and the third inductor L3 and the other end connected with the signal ground GND, a connection point of the third inductor L3 and the fourth inductor L4 and the other end connected with the signal ground GND, a fourth capacitor C5 with one end connected with a connection point of the fourth inductor L4 and the fifth inductor L5 and the other end connected with the signal ground GND 36 32, a sixth capacitor C6 having one end connected to a connection point between the sixth inductor L6 and the seventh inductor L7 and the other end connected to the signal ground GND, a seventh capacitor C7 having one end connected to a connection point between the seventh inductor L7 and the eighth inductor L8 and the other end connected to the signal ground GND, an eighth capacitor C8 having one end connected to a connection point between the eighth inductor L8 and the ninth inductor L9 and the other end connected to the signal ground GND, a ninth capacitor C9 having one end connected to a connection point between the ninth inductor L9 and the tenth inductor L10 and the other end connected to the signal ground GND, a tenth capacitor C10 having one end connected to a connection point between the tenth inductor L10 and the eleventh inductor L11 and the other end connected to the signal ground GND, and an eleventh capacitor C11 having one end connected to the other end of the eleventh inductor L11 and the other end connected to the signal ground GND; the end of the first inductor L1 not connected to the first capacitor C1 is connected to the INPUT signal source INPUT, and the connection point of the eleventh inductor L11 to the eleventh capacitor C11 OUTPUTs the band-pass filtered signal OUTPUT 1.

Further, the amplifier module further includes a thirteenth capacitor C13, a fourteenth capacitor C14, and a twelfth inductor L12; one end of the thirteenth capacitor C13 is connected to the RF _ IN pin of the fixed amplifier U2, and the other end is connected to the connection point between the eleventh inductor L11 and the eleventh capacitor C11; one end of the fourteenth capacitor C14 and one end of the twelfth inductor L12 are commonly connected to the RF _ OUT pin of the fixed amplifier U2, the other end of the twelfth inductor L12 is connected to the power supply 5V, and the other end of the fourteenth capacitor C14 OUTPUTs the signal OUTPUT 2.

Further, the down-conversion module further comprises a fifth resistor R5 and a sixth resistor R6 for impedance matching; an RF pin of the passive mixer U3 is connected with the other end of the fourteenth capacitor C14 after being connected with a sixth resistor R6 in series; one end of the fifth resistor R5 is connected with the IF pin of the passive mixer U3, and the other end of the fifth resistor R5 OUTPUTs a signal OUTPUT 3; an IN pin of the direct digital frequency synthesizer DDS1 is connected with an IO1 port of the FPGA chip U4, and an OUT pin of the direct digital frequency synthesizer DDS1 is connected with an LO pin of the passive mixer U3.

Further, the filter module 2 further includes a seventh resistor R7 and an eighth resistor R8, an IN pin of the 10.7M ceramic filter U5 is connected IN series with the seventh resistor R7 and then connected to the other end of the fifth resistor R5, the 10.7M ceramic filter U5 further includes an OUT pin for outputting a signal OUTPUT4, and the eighth resistor R8 is connected IN parallel between the OUT pin and the signal ground GND.

Further, the FM demodulation module further includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twenty-first capacitor C21, a twenty-third capacitor C23, a twenty-fourth capacitor C24, and a twenty-sixth capacitor C26; one end of a ninth resistor R9 and one end of a twenty-first capacitor C21 are connected with an OUT pin of the 10.7M ceramic filter U5, the other end of the ninth resistor R9 is connected with a DET OUT pin of the demodulator U6, and the other end of the twenty-first capacitor C21 is connected with a signal ground GND; one end of a tenth resistor R10, one end of a twenty-fourth capacitor C24 and one end of an intermediate frequency transformer L13 are commonly connected with a QUAD COIL pin of the demodulator U6; the other end of the tenth resistor R10, the other end of the twenty-fourth capacitor C24 and the other end of the intermediate frequency transformer L13 are commonly connected to one end of a twenty-third capacitor C23, and the other end of the twenty-third capacitor C23 is connected to the signal ground GND; one end of the twenty-sixth capacitor C26 is connected to the IF IN pin of the demodulator U6, the connection point between the other end of the twenty-sixth capacitor C26 and one end of the eleventh resistor R11 OUTPUTs the signal OUTPUT5, and the other end of the eleventh resistor R11 is connected to the signal ground GND.

Further, the filter module 3 further includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a twelfth capacitor C12, a fifteenth capacitor C15, a sixteenth capacitor C16, and a seventeenth capacitor C17; an INA + pin of the operational amplifier U1 is connected with a connection point of a twenty-six capacitor C26 and an eleventh resistor R11 through a fourth resistor R4 and a third resistor R3 which are sequentially connected in series; one end of a fifteenth capacitor C15 is connected with the connection point of the fourth resistor R4 and the third resistor R3, and the other end of the fifteenth capacitor C15 is connected with the INA-pin of the operational amplifier U1; the INA-pin of the operational amplifier U1 is connected with the OUTA pin; one end of the seventeenth capacitor C17 is connected with the INA + pin of the operational amplifier U1, and the other end is connected with the signal ground GND; one end of the first resistor R1 is connected with the OUTA pin of the operational amplifier U1, and the other end of the first resistor R1 is connected with one end of the twelfth capacitor C12 and one end of the second resistor R2 respectively; the other end of the twelfth capacitor C12 is connected to the OUTB pin and the INB-pin of the operational amplifier U1, respectively, and the OUTB pin of the operational amplifier U1 OUTPUTs a signal OUTPUT 6; the other end of the second resistor R2 is connected to the INB + pin of the operational amplifier U1 and one end of a sixteenth capacitor C16, respectively, and the other end of the sixteenth capacitor C16 is connected to the signal ground GND; the V-pin of the operational amplifier U1 is connected with a-5V power supply; the V + pin of the operational amplifier U1 is connected to a +5V power supply.

Further, an IO2 port-IO 13 port of the FPGA chip U4 is sequentially connected with a B1 port-B12 port of the first analog-to-digital converter U8, an IO1 port of the FPGA chip U4 is connected with an IN pin of the direct digital frequency synthesizer DDS1, and an IO2 port of the FPGA chip U4 is connected with an RSSI OUT pin of the demodulator U6; the VCC pin of the FPGA chip U4 is connected with a +5V power supply, and the GND pin is connected with a signal ground GND.

According to the scheme, the FM signal processing device further comprises a display module for displaying the actual carrier frequency of the current FM signal in real time; the display module comprises a display screen driver P1 and a display screen; the signal receiving end of the display screen driver P1 is connected with the signal sending end of the control module.

The utility model has the advantages that:

1. the utility model discloses an automatic FM demodulation system of tracking carrier, through the direct current voltage signal who gathers FM demodulation module output, the eigen frequency of feedback control down conversion module, with the carrier down conversion to 10.7MHz track the carrier promptly, the FM signal frequency band of receipt is wide, has overcome the influence of FM signal carrier frequency drift to wireless channel transmission, has realized the FM demodulation function of stable demodulation play baseband signal when carrier frequency drift.

2. The utility model discloses the carrier frequency of real-time display FM signal, the operating personnel monitored control system operation of being convenient for.

3. The utility model discloses simple structure, the interference killing feature is strong, and stability is good, convenient to use.

Drawings

Fig. 1 is a functional block diagram of an embodiment of the present invention.

Fig. 2 is a circuit diagram of a passive band pass filter module of an embodiment of the invention;

fig. 3 is a circuit diagram of a low noise fixed amplifier module according to an embodiment of the present invention;

fig. 4 is a circuit diagram of a down conversion module of an embodiment of the present invention;

fig. 5 is a circuit diagram of a 10.7MHz ceramic filter module according to an embodiment of the present invention;

fig. 6 is a circuit diagram of an FM demodulation module according to an embodiment of the present invention;

fig. 7 is a circuit diagram of an active low pass filter module according to an embodiment of the present invention;

fig. 8 is a circuit diagram of a control module of an embodiment of the present invention;

fig. 9 is a circuit diagram of a display module according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

Referring to fig. 1, an embodiment of the present invention includes an antenna module, a passive band pass filter module, a low noise fixed amplifier module, a down conversion module, a 10.7MHz ceramic filter module, an FM demodulation module, an active low pass filter module, a control module, and a display module; the antenna module, the passive band-pass filter module, the low-noise fixed amplifier module, the down-conversion module, the 10.7MHz ceramic filter module, the FM demodulation module and the active low-pass filter module are sequentially connected in series, the frequency receiving end of the control module is connected with the frequency transmitting end of the FM demodulation module, the frequency transmitting end of the control module is connected with the frequency receiving end of the down-conversion module, and the signal transmitting end of the control module is connected with the signal receiving end of the display module.

Referring to fig. 2, the passive band-pass filter module is used for filtering noise outside a specific frequency band, the passive band-pass filter module comprises a 17-order chebyshev I-type filter circuit which is formed by high-low pass cascade connection and is configured with input impedance and output impedance of 50 ohms, the 3dB cut-off frequency of the band-pass filter is 40-60 MHz, and interference noise outside the specific frequency band is effectively filtered; the required capacitance and inductance are high-precision patch models of MURATA company. The lumped parameter model of the passive band-pass filter circuit comprises a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a ninth inductor L9, a tenth inductor L10 and an eleventh inductor L11 which are sequentially connected in series, a first capacitor C1 with one end connected with a connection point of the first inductor L1 and the second inductor L2 and the other end connected with a signal ground GND, a second capacitor C2 with one end connected with a connection point of the second inductor L2 and the third inductor L3 and the other end connected with the signal ground GND, a third capacitor C7 with one end connected with a connection point of the third inductor L3 and the fourth inductor L4 and the other end connected with the signal ground GND, a fourth capacitor C5 with one end connected with a connection point of the fourth inductor L4 and the fifth inductor L5 and the other end 36 32 connected with the signal ground GND of the fifth inductor L5 and the other end 5, a sixth capacitor C6 having one end connected to a connection point between the sixth inductor L6 and the seventh inductor L7 and the other end connected to the signal ground GND, a seventh capacitor C7 having one end connected to a connection point between the seventh inductor L7 and the eighth inductor L8 and the other end connected to the signal ground GND, an eighth capacitor C8 having one end connected to a connection point between the eighth inductor L8 and the ninth inductor L9 and the other end connected to the signal ground GND, a ninth capacitor C9 having one end connected to a connection point between the ninth inductor L9 and the tenth inductor L10 and the other end connected to the signal ground GND, a tenth capacitor C10 having one end connected to a connection point between the tenth inductor L10 and the eleventh inductor L11 and the other end connected to the signal ground GND, and an eleventh capacitor C11 having one end connected to the other end of the eleventh inductor L11 and the other end connected to the signal ground GND; the end of the first inductor L1 not connected to the first capacitor C1 is connected to the INPUT signal source INPUT, and the connection point of the eleventh inductor L11 to the eleventh capacitor C11 OUTPUTs the band-pass filtered signal OUTPUT 1.

Referring to fig. 3, the low-noise fixed amplifier module is used for amplifying weak FM signals, the low-noise fixed amplifier module includes a fixed amplifying circuit formed by a low-noise fixed amplifier U2, the low-noise fixed amplifier U2 adopts a CMA5043+ chip, the chip provides a fixed gain of 20dB, and the noise coefficient is less than 1dB, so that the low-noise fixed amplifier module is suitable for amplifying weak FM signals at the front stage of the system; the fixed amplifying circuit further comprises a thirteenth capacitor C13, a fourteenth capacitor C14 and a twelfth inductor L12; one end of the thirteenth capacitor C13 is connected to the RF _ IN pin of the fixed amplifier U2, and the other end is connected to the connection point between the eleventh inductor L11 and the eleventh capacitor C11; one end of the fourteenth capacitor C14 and one end of the twelfth inductor L12 are commonly connected to the RF _ OUT pin of the fixed amplifier U2, the other end of the twelfth inductor L12 is connected to the power supply 5V, and the OUTPUT signal OUTPUT2 of the fourteenth capacitor C14 is provided.

Referring to fig. 4, the down-conversion module is configured to down-convert the FM signal of the high frequency band to an FM signal of the intermediate frequency of 10.7MHz, so as to achieve accurate adjustment of the FM carrier frequency. The down-conversion module comprises an impedance-matched passive mixer U3 for converting signal frequency and a Direct Digital Synthesizer (DDS) 1 for generating signal frequency according to received information, wherein the frequency output end of the DDS1 is connected with the frequency receiving end of the passive mixer U3. The passive mixer U3 adopts an ADE-2+ chip, the isolation of the mixer reaches 47dB, and the requirement that the intrinsic signal is +7dBm is met; the direct digital frequency synthesizer DDS1 adopts an AD9958 chip, the direct digital frequency synthesizer DDS1 generates signal frequency according to the information sent by the control module and sends the signal frequency to the passive mixer U3, so that the local oscillation frequency is changed, the FM signal is down-converted to 10.7MHz, the spectrum is moved, the dynamic range is wide, the isolation degree is high, and the noise is low; the down-conversion module further comprises a fifth resistor R5 and a sixth resistor R6 for impedance matching; an RF pin of the passive mixer U3 is connected with the other end of the fourteenth capacitor C14 after being connected with a sixth resistor R6 in series; one end of the fifth resistor R5 is connected with the IF pin of the passive mixer U3, and the other end of the fifth resistor R5 OUTPUTs a signal OUTPUT 3; an IN pin of the direct digital frequency synthesizer DDS1 is connected with an IO1 port of the FPGA chip U4, and an OUT pin of the direct digital frequency synthesizer DDS1 is connected with an LO pin of the passive mixer U3. The down-conversion module further comprises an eighteenth capacitor C18 for filtering; the GROUND pin of the passive mixer U3 and the GND pin of the direct digital frequency synthesizer DDS1 are both connected with a signal GROUND GND, and the VCC pin of the direct digital frequency synthesizer DDS1 is connected with a power supply + 5V.

Referring to fig. 5, the 10.7MHz ceramic filter module is used to filter out sum frequency and image frequency noise outside the frequency band, so as to obtain a down-conversion FM signal of 10.7 MHz; the 10.7MHz ceramic filter module comprises a filter circuit formed by a 10.7MHz ceramic filter U5, a SFECF10M7GA00-R0 chip is adopted as the 10.7MHz ceramic filter U5, the center frequency of the ceramic filter is 10.7MHz, the 3dB frequency bandwidth is 230KHz, the stop bandwidth range is 510KHz, and digital noise outside the frequency band can be effectively filtered to obtain an FM signal of 10.7 MHz; the 10.7MHz ceramic filter module further includes a seventh resistor R7 and an eighth resistor R8, the IN pin of the 10.7M ceramic filter U5 is connected IN series with the seventh resistor R7 and then connected to the other end of the fifth resistor R5, the 10.7M ceramic filter U5 further includes an OUT pin for outputting a signal OUTPUT4, and the eighth resistor R8 is connected IN parallel between the OUT pin and the signal ground GND. The 10.7MHz ceramic filter module also comprises a nineteenth capacitor C19 for filtering, and the GND pin of the 10.7M ceramic filter U4 is connected with the signal ground GND.

Referring to fig. 6, the FM demodulation module includes a demodulation circuit formed by impedance matching of an intermediate frequency transformer L13 and a demodulator U6, a demodulator U6 employs an NJM14570 chip, an intermediate frequency transformer L13 employs an adjustable inductor of 33nH, and a middle frequency transformer L13 is used to adjust the demodulation frequency to 10.7MHz, so as to realize the function of demodulating a baseband signal from an FM signal input at a previous stage, and the signal-to-noise ratio is very high; meanwhile, an RSSI OUT pin of the demodulator U6 is connected with an IO2 pin of the FPGA chip U4 and is used for outputting a direct-current voltage signal RSSI which is in direct proportion to the FM carrier frequency to the FPGA chip U4 so as to feed back and control the intrinsic signal; the FM demodulation module further comprises a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twenty-first capacitor C21, a twenty-third capacitor C23, a twenty-fourth capacitor C24 and a twenty-sixth capacitor C26; one end of a ninth resistor R9 and one end of a twenty-first capacitor C21 are connected with an OUT pin of the 10.7M ceramic filter U5, the other end of the ninth resistor R9 is connected with a DET OUT pin of the demodulator U6, and the other end of the twenty-first capacitor C21 is connected with a signal ground GND; one end of a tenth resistor R10, one end of a twenty-fourth capacitor C24 and one end of an intermediate frequency transformer L13 are commonly connected with a QUAD COIL pin of the demodulator U6; the other end of the tenth resistor R10, the other end of the twenty-fourth capacitor C24 and the other end of the intermediate frequency transformer L13 are commonly connected to one end of a twenty-third capacitor C23, and the other end of the twenty-third capacitor C23 is connected to the signal ground GND; one end of a twenty-sixth capacitor C26 is connected with an IF IN pin of the demodulator U6, the other end of the twenty-sixth capacitor C26 is connected with a connection point of one end of an eleventh resistor R11 to OUTPUT a signal OUTPUT5, and the other end of the eleventh resistor R11 is connected with a signal ground GND; the FM demodulation module further comprises a twentieth capacitor C20, a twenty-second capacitor C22 and a twenty-fifth capacitor C25 for filtering; the V pin of the demodulator U6 is connected with +5V of a power supply, and the GND pin is connected with a signal ground GND.

Referring to fig. 7, the active low pass filter module includes an 8-order butterworth active filter circuit formed by an operational amplifier U1, the operational amplifier U1 adopts an OPA2140 chip, the cutoff frequency is 10KHz, and the active low pass filter module can effectively filter interference signals in baseband signals to improve the output signal-to-noise ratio and restore the baseband signals with high signal-to-noise ratio; the active low-pass filter module further comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a twelfth capacitor C12, a fifteenth capacitor C15, a sixteenth capacitor C16 and a seventeenth capacitor C17; an INA + pin of the operational amplifier U1 is connected with a connection point of a twenty-six capacitor C26 and an eleventh resistor R11 through a fourth resistor R4 and a third resistor R3 which are sequentially connected in series; one end of a fifteenth capacitor C15 is connected with the connection point of the fourth resistor R4 and the third resistor R3, and the other end of the fifteenth capacitor C15 is connected with the INA-pin of the operational amplifier U1; the INA-pin of the operational amplifier U1 is connected with the OUTA pin; one end of the seventeenth capacitor C17 is connected with the INA + pin of the operational amplifier U1, and the other end is connected with the signal ground GND; one end of the first resistor R1 is connected with the OUTA pin of the operational amplifier U1, and the other end of the first resistor R1 is connected with one end of the twelfth capacitor C12 and one end of the second resistor R2 respectively; the other end of the twelfth capacitor C12 is connected to the OUTB pin and the INB-pin of the operational amplifier U1, respectively, and the OUTB pin of the operational amplifier U1 OUTPUTs a signal OUTPUT 6; the other end of the second resistor R2 is connected to the INB + pin of the operational amplifier U1 and one end of a sixteenth capacitor C16, respectively, and the other end of the sixteenth capacitor C16 is connected to the signal ground GND; the V-pin of the operational amplifier U1 is connected with a-5V power supply; the V + pin of the operational amplifier U1 is connected to a +5V power supply.

Referring to fig. 8, the control module is configured to collect a dc voltage signal output by the FM demodulation module to feedback control an eigen frequency output by a direct digital frequency synthesizer DDS1 of the down-conversion module, so as to implement a function of down-converting a carrier to 10.7MHz, that is, carrier tracking; the control module comprises a control circuit consisting of an FPGA chip U4 and peripheral elements thereof, wherein the FPGA chip U4 adopts a high-speed FPGA of an Altera company Cyclone IV series model number EP4CE40F23C 8; an IO2 port-an IO13 port of the FPGA chip U4 are sequentially connected with a B1 port-a B12 port of the first analog-to-digital converter U8, an IO1 port of the FPGA chip U4 is connected with an IN pin of a direct digital frequency synthesizer DDS1, and an IO2 port of the FPGA chip U4 is connected with an RSSI OUT pin of a demodulator U6; the VCC pin of the FPGA chip U4 is connected with a +5V power supply, and the GND pin is connected with a signal ground GND.

Referring to fig. 9, the display module is configured to provide a human-computer interaction interface, and display an actual carrier frequency of a current FM signal in real time; the display module comprises a display screen driver P1 and a display screen; the display screen driver P1 adopts an S106 chip and internally integrates a 132 x 64-bit SRAM display buffer; the display screen adopts an OLED display panel which is 1.3 inches, has the resolution of 128 multiplied by 64 pixels and has a 132 multiplied by 64 lattice; an LED SCL pin and an OLED SDA pin of the display screen driver P1 are respectively connected with an IO4 pin and an IO5 pin of the FPGA chip U4 and are used for receiving display information through I2C protocol communication with the FPGA chip U4; an OLEDSET pin of the display screen driver P1 is connected with an IO6 pin of the FPGA chip U4 and used for restarting the display screen; an OLED D/C pin of the display screen driver P1 is connected with an IO7 pin of the FPGA chip U4 and used for switching the functions of the display screen; the 2 pin of the display screen driver P1 is connected with a +3.3V power supply, and the 1 pin and the 7 pin are respectively connected with a signal ground GND.

The names, specification types and bit numbers of the components used in the circuit are shown in table 1:

TABLE 1

The utility model discloses work flow does:

the antenna module receives weak FM signals from a wireless channel, the weak FM signals are amplified by the low-noise fixed amplifier module after passing through the passive band-pass filter module, the FM signals are subjected to frequency reduction to 10.7MHz by the down-conversion module, sum frequency and image frequency are filtered by the 10.7MHz ceramic filter module, the sum frequency and the image frequency are demodulated by the FM demodulation module to obtain baseband signals, and finally the baseband signals are output after passing through the active low-pass filter module. The control module controls the output eigenfrequency in a feedback mode by collecting the direct current signal output by the FM demodulation module, the down-conversion of the FM signal to 10.7MHz is achieved, namely, the carrier tracking function is achieved, the display module displays the actual carrier frequency of the current FM signal in real time, and operating conditions of the system are monitored by operators conveniently.

It is right to the utility model discloses an FM demodulation system design of automatic tracking carrier wave has made the PCB circuit board to the test of whole circuits has been accomplished. Through tests, the system successfully recovers the baseband signal, effectively tracks the carrier, has high response speed and stable system work, and solves the problem of received signal distortion caused by carrier frequency drift in the existing wireless transmission.

The above embodiments are only used for illustrating the design ideas and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and to implement the present invention, and the protection scope of the present invention is not limited to the above embodiments. Therefore, all the equivalent changes or modifications made according to the principles and design ideas disclosed by the present invention are within the protection scope of the present invention.

Claims

1. An FM demodulation system that automatically tracks a carrier, comprising: comprises that

An antenna module for receiving FM signals of a particular frequency band,

a filter module 1 for filtering out noise outside a specific frequency band,

an amplifier module for amplifying weak FM signals,

a down conversion module for down converting the FM signal of the high frequency band to an FM signal of the intermediate frequency,

a filter module 2 for filtering the sum frequency and image frequency noise generated by the down-conversion module,

an FM demodulation module for demodulating the FM signal to obtain a baseband signal and outputting a DC voltage signal proportional to the carrier frequency of the FM signal,

a filter module 3 for filtering noise outside the baseband signal frequency band;

the control module is used for controlling the eigenfrequency according to the direct current signal feedback output by the FM demodulation module;

the antenna module, the filter module 1, the amplifier module, the down-conversion module, the filter module 2, the FM demodulation module and the filter module 3 are sequentially connected in series, a frequency receiving end of the control module is connected with a frequency transmitting end of the FM demodulation module, and a frequency transmitting end of the control module is connected with a frequency receiving end of the down-conversion module;

the filter module 1 comprises a passive band-pass filter circuit which is formed by a 17-order Chebyshev I-type filter through high-low pass cascade and is configured with input impedance and output impedance;

the amplifier module comprises a fixed amplifying circuit consisting of a low-noise fixed amplifier U2;

the down-conversion module comprises a passive mixer U3 which is used for converting signal frequency and is subjected to impedance matching and a direct digital frequency synthesizer DDS1 which is used for generating signal frequency according to received information, wherein the frequency output end of the direct digital frequency synthesizer DDS1 is connected with the frequency receiving end of the passive mixer U3;

the filter module 2 comprises a filter circuit formed by a 10.7MHz ceramic filter U5;

the FM demodulation module comprises a demodulation circuit formed by impedance matching of an intermediate frequency transformer L13 and a demodulator U6; the filter module 3 comprises an 8 th order butterworth active filter circuit formed by an operational amplifier U1;

the control module comprises a control circuit formed by an FPGA chip U4.

2. The FM demodulation system for automatically tracking a carrier wave according to claim 1, wherein: the filter module 1 comprises a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, an eighth inductor L8, a ninth inductor L9, a tenth inductor L10 and an eleventh inductor L11 which are sequentially connected in series, a first capacitor C2 with one end connected with a connection point of the first inductor L1 and the second inductor L2 and the other end connected with a signal ground GND, a second capacitor C87453 with one end connected with a connection point of the second inductor L2 and the third inductor L3 and the other end connected with the signal ground GND, a connection point of the third inductor L3 and the fourth inductor L4 and the other end connected with the signal ground 6867, a fourth capacitor C5 with one end connected with a connection point of the fourth inductor L4 and the fifth inductor L5 and the other end connected with the signal ground GND, a fourth capacitor C5 with one end connected with the connection point of the fifth inductor L5 and the other end 5, a sixth capacitor C6 having one end connected to a connection point between the sixth inductor L6 and the seventh inductor L7 and the other end connected to the signal ground GND, a seventh capacitor C7 having one end connected to a connection point between the seventh inductor L7 and the eighth inductor L8 and the other end connected to the signal ground GND, an eighth capacitor C8 having one end connected to a connection point between the eighth inductor L8 and the ninth inductor L9 and the other end connected to the signal ground GND, a ninth capacitor C9 having one end connected to a connection point between the ninth inductor L9 and the tenth inductor L10 and the other end connected to the signal ground GND, a tenth capacitor C10 having one end connected to a connection point between the tenth inductor L10 and the eleventh inductor L11 and the other end connected to the signal ground GND, and an eleventh capacitor C11 having one end connected to the other end of the eleventh inductor L11 and the other end connected to the signal ground GND; the end of the first inductor L1 not connected to the first capacitor C1 is connected to the INPUT signal source INPUT, and the connection point of the eleventh inductor L11 to the eleventh capacitor C11 OUTPUTs the band-pass filtered signal OUTPUT 1.

3. An FM demodulation system for automatically tracking a carrier wave as claimed in claim 2, wherein: the amplifier module further comprises a thirteenth capacitor C13, a fourteenth capacitor C14 and a twelfth inductor L12; one end of the thirteenth capacitor C13 is connected to the RF _ IN pin of the fixed amplifier U2, and the other end is connected to the connection point between the eleventh inductor L11 and the eleventh capacitor C11; one end of the fourteenth capacitor C14 and one end of the twelfth inductor L12 are commonly connected to the RF _ OUT pin of the fixed amplifier U2, the other end of the twelfth inductor L12 is connected to the power supply 5V, and the other end of the fourteenth capacitor C14 OUTPUTs the signal OUTPUT 2.

4. An FM demodulation system for automatically tracking a carrier wave as claimed in claim 3, wherein: the down-conversion module further comprises a fifth resistor R5 and a sixth resistor R6 for impedance matching; an RF pin of the passive mixer U3 is connected with the other end of the fourteenth capacitor C14 after being connected with a sixth resistor R6 in series; one end of the fifth resistor R5 is connected with the IF pin of the passive mixer U3, and the other end of the fifth resistor R5 OUTPUTs a signal OUTPUT 3; an IN pin of the direct digital frequency synthesizer DDS1 is connected with an IO1 port of the FPGA chip U4, and an OUT pin of the direct digital frequency synthesizer DDS1 is connected with an LO pin of the passive mixer U3.

5. The FM demodulation system for automatically tracking carrier wave according to claim 4, wherein: the filter module 2 further comprises a seventh resistor R7 and an eighth resistor R8, an IN pin of the 10.7M ceramic filter U5 is connected IN series with the seventh resistor R7 and then connected with the other end of the fifth resistor R5, the 10.7M ceramic filter U5 further comprises an OUT pin for outputting a signal OUTPUT4, and the eighth resistor R8 is connected between the OUT pin and the signal ground GND IN parallel.

6. The FM demodulation system for automatically tracking a carrier wave according to claim 5, wherein: the FM demodulation module further comprises a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twenty-first capacitor C21, a twenty-third capacitor C23, a twenty-fourth capacitor C24 and a twenty-sixth capacitor C26; one end of a ninth resistor R9 and one end of a twenty-first capacitor C21 are connected with an OUT pin of the 10.7M ceramic filter U5, the other end of the ninth resistor R9 is connected with a DET OUT pin of the demodulator U6, and the other end of the twenty-first capacitor C21 is connected with a signal ground GND; one end of a tenth resistor R10, one end of a twenty-fourth capacitor C24 and one end of an intermediate frequency transformer L13 are commonly connected with a QUAD COIL pin of the demodulator U6; the other end of the tenth resistor R10, the other end of the twenty-fourth capacitor C24 and the other end of the intermediate frequency transformer L13 are commonly connected to one end of a twenty-third capacitor C23, and the other end of the twenty-third capacitor C23 is connected to the signal ground GND; one end of the twenty-sixth capacitor C26 is connected to the IF IN pin of the demodulator U6, the connection point between the other end of the twenty-sixth capacitor C26 and one end of the eleventh resistor R11 OUTPUTs the signal OUTPUT5, and the other end of the eleventh resistor R11 is connected to the signal ground GND.

7. The FM demodulation system for automatically tracking a carrier wave according to claim 6, wherein: the filter module 3 further includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a twelfth capacitor C12, a fifteenth capacitor C15, a sixteenth capacitor C16, and a seventeenth capacitor C17; an INA + pin of the operational amplifier U1 is connected with a connection point of a twenty-six capacitor C26 and an eleventh resistor R11 through a fourth resistor R4 and a third resistor R3 which are sequentially connected in series; one end of a fifteenth capacitor C15 is connected with the connection point of the fourth resistor R4 and the third resistor R3, and the other end of the fifteenth capacitor C15 is connected with the INA-pin of the operational amplifier U1; the INA-pin of the operational amplifier U1 is connected with the OUTA pin; one end of the seventeenth capacitor C17 is connected with the INA + pin of the operational amplifier U1, and the other end is connected with the signal ground GND; one end of the first resistor R1 is connected with the OUTA pin of the operational amplifier U1, and the other end of the first resistor R1 is connected with one end of the twelfth capacitor C12 and one end of the second resistor R2 respectively; the other end of the twelfth capacitor C12 is connected to the OUTB pin and the INB-pin of the operational amplifier U1, respectively, and the OUTB pin of the operational amplifier U1 OUTPUTs a signal OUTPUT 6; the other end of the second resistor R2 is connected to the INB + pin of the operational amplifier U1 and one end of a sixteenth capacitor C16, respectively, and the other end of the sixteenth capacitor C16 is connected to the signal ground GND; the V-pin of the operational amplifier U1 is connected with a-5V power supply; the V + pin of the operational amplifier U1 is connected to a +5V power supply.

8. The FM demodulation system for automatically tracking a carrier wave according to claim 7, wherein: an IO2 port-an IO13 port of the FPGA chip U4 are sequentially connected with a B1 port-a B12 port of the first analog-to-digital converter U8, an IO1 port of the FPGA chip U4 is connected with an IN pin of a direct digital frequency synthesizer DDS1, and an IO2 port of the FPGA chip U4 is connected with an RSSI OUT pin of a demodulator U6; the VCC pin of the FPGA chip U4 is connected with a +5V power supply, and the GND pin is connected with a signal ground GND.

9. The FM demodulation system for automatically tracking a carrier wave according to claim 1, wherein: the FM signal processing device also comprises a display module used for displaying the actual carrier frequency of the current FM signal in real time; the display module comprises a display screen driver P1 and a display screen; the signal receiving end of the display screen driver P1 is connected with the signal sending end of the control module.