CN210807212U - Power supply switching circuit of OCP network card of server - Google Patents
Power supply switching circuit of OCP network card of server Download PDFInfo
- Publication number
- CN210807212U CN210807212U CN201922340091.4U CN201922340091U CN210807212U CN 210807212 U CN210807212 U CN 210807212U CN 201922340091 U CN201922340091 U CN 201922340091U CN 210807212 U CN210807212 U CN 210807212U
- Authority
- CN
- China
- Prior art keywords
- power supply
- resistor
- electrically connected
- input end
- switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The application discloses a power supply switching circuit of an OCP network card of a server, which comprises a first switching module and a second switching module, wherein the first switching module comprises a first main power supply input end, a first auxiliary power supply input end and a first switching power supply input end, the second switching module comprises a second main power supply input end, a second auxiliary power supply input end and a second switching power supply input end, the first main power supply input end is connected with a main power supply, the first auxiliary power supply input end is connected with an auxiliary power supply, the first switching power supply input end is connected with a switching power supply, the second main power supply input end is connected with the main power supply, the second auxiliary power supply input end is connected with an auxiliary power supply, the second switching power supply input end is connected with the switching power supply, when the state of the OCP network card power supply of the server is switched from S0 to S5, the second switching module is closed when the voltage of the main power, when the voltage is reduced to 1.7V, the first module is started, so that the power supply of the OCP network card of the server is switched smoothly.
Description
Technical Field
The utility model relates to a network security field especially relates to a server OCP network card power switching circuit.
Background
For the OCP2.0 network card of the server, a P3V3_ AUX power supply needs to be used in an S5 state, and a P3V3 power supply needs to be used in an S0 state, which needs to be selectively switched, and a common scheme is to selectively switch the two power supplies through MOS transistors. Normally, the selection switching of P3V3 and P3V3_ AUX in S0 and S5 states is achieved by using an NMOS1 as a switch for controlling the P3V3 to P3V3_ DUAL channel PMOS3, and keeping the on states of PMOS1 and PMOS2, turning on PMOS3 in the S0 state, namely P3V3 is effective, and turning off PMOS3 in the S5 state, namely P3V3 is ineffective.
In the above scheme, when the state of S0 is converted to the state of S5, if the power failure of P3V3 provided by the server motherboard is not ideal, in a slow condition, there is a risk that NMOS1 cannot be turned off in time, and when PMOS3 is still turned on, the power of P3V3_ AUX will pass through PMOS2, PMOS1, PMOS3 and jump to P3V3, thereby affecting the timing sequence of the server motherboard.
SUMMERY OF THE UTILITY MODEL
In view of this, the present disclosure provides an OCP network card power switching circuit for a server, which is characterized by comprising a first switching module and a second switching module;
the first switching module comprises a first main power supply input end, a first auxiliary power supply input end and a first switching power supply input end;
the second switching module comprises a second main power supply input end, a second auxiliary power supply input end and a second switching power supply input end;
the first main power supply input end is suitable for being electrically connected with a main power supply, the first auxiliary power supply input end is suitable for being electrically connected with an auxiliary power supply, and the first switching power supply input end is suitable for being electrically connected with a switching power supply;
the second main power supply input end is suitable for being electrically connected with a main power supply, the second auxiliary power supply input end is suitable for being electrically connected with an auxiliary power supply, and the second switching power supply input end is suitable for being electrically connected with a switching power supply;
in one possible implementation manner, the first switching module includes a first resistor, a second resistor, a first MOS transistor, a second MOS transistor, and a first capacitor;
one end of the first resistor is used as the first main power supply input end and is suitable for being electrically connected with a main power supply;
the S end of the first MOS tube is used as the input end of the first switching power supply and is suitable for being electrically connected with the switching power supply;
the S end of the second MOS tube is used as the input end of the first auxiliary power supply and is suitable for being electrically connected with an auxiliary power supply;
the D end of the first MOS tube is electrically connected with the D end of the second MOS tube;
the G end of the first MOS tube is electrically connected with the G end of the second MOS tube;
the G end of the first MOS tube is electrically connected with the other end of the first resistor;
the second resistor and the first capacitor are connected between the other end of the first resistor and a ground terminal in parallel.
In a possible implementation manner, the second switching module includes a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a third MOS transistor, a fourth MOS transistor, a second capacitor, and a third capacitor;
one end of the fourth resistor is used as the second main power supply input end and is suitable for being electrically connected with a main power supply;
one end of the third resistor is used as the input end of the second auxiliary power supply and is suitable for being electrically connected with the auxiliary power supply;
the S end of the third MOS tube is used as the input end of the second switching power supply and is suitable for being electrically connected with the switching power supply;
the D end of the third MOS tube is electrically connected with one end of the fourth resistor;
the G end of the third MOS tube is electrically connected with one end of the second capacitor;
the G end of the fourth MOS tube is electrically connected with the other end of the fourth resistor;
the D end of the fourth MOS tube is electrically connected with the other end of the third resistor;
the S end of the fourth MOS tube is electrically connected with the grounding end;
one end of the fifth resistor is electrically connected with one end of the second capacitor;
the other end of the fifth resistor is electrically connected with the other end of the third resistor;
one end of the sixth resistor is electrically connected with the other end of the third resistor;
the other end of the sixth resistor is electrically connected with a grounding end;
the seventh resistor and the third capacitor are connected in parallel between the other end of the fourth resistor and a ground terminal.
In a possible implementation manner, the type of the first MOS transistor is a PMOS transistor;
the type of the second MOS tube is a PMOS tube.
In a possible implementation manner, the type of the third MOS transistor is a PMOS transistor;
the type of the fourth MOS tube is an NMOS tube.
In a possible implementation manner, the S end of the first MOS transistor includes three pins;
the D end of the first MOS tube comprises four pins;
the S end of the second MOS tube comprises three pins;
the D end of the second MOS tube comprises four pins.
In a possible implementation manner, the D end of the third MOS transistor includes four pins;
the S end of the third MOS tube comprises three pins.
In one possible implementation, the PMOS transistor is model number NTMS4177PR 2G.
In one possible implementation, the model number of the NMOS transistor is 2N7002LT 1G.
In one possible implementation, the first voltage is 2V;
the second voltage is 1.7V.
Through the voltage reduction of the main power supply, when the voltage is 2V, the fourth MOS tube PQ4 is closed, the third MOS tube PQ3 is closed, the voltage drop is reduced to 1.7V, the first MOS tube PQ1 is turned on, the second MOS tube PQ2 is turned on, and therefore the P3V3_ AUX leakage cannot occur to the P3V3, the server OCP network card power switching circuit according to the embodiment of the disclosure can enable the power supply to be switched smoothly, and the server OCP network card operates stably.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
Fig. 1 shows a circuit diagram of an OCP network card power switching circuit of the server of the present disclosure;
fig. 2 shows a schematic diagram of the server OCP network card power switching circuit of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure.
Fig. 1 shows a circuit diagram of a power switching circuit of an OCP network card of a server according to an embodiment of the present disclosure. As shown in fig. 1, the OCP network card power switching circuit of the server includes:
a first switching module 110 and a second switching module 120, wherein the first switching module 110 includes a first main power input P3V3, a first auxiliary power input P3V3_ AUX and a first switching power input P3V3DUAL, and the second switching module 120 includes a second main power input P3V3, a second auxiliary power input P3V3_ AUX and a second switching power input P3V3 DUAL. The first main power input end P3V3 is suitable for being electrically connected with a main power supply, the first auxiliary power input end P3V3_ AUX is suitable for being electrically connected with an auxiliary power supply, the first switching power input end P3V3DUAL is suitable for being electrically connected with a switching power supply, the second main power input end P3V3 is suitable for being electrically connected with the main power supply, the second auxiliary power input end P3V3_ AUX is suitable for being electrically connected with the auxiliary power supply, the second switching power input end P3V3DUAL is suitable for being electrically connected with the switching power supply, when the server OCP network card power board is switched from the S0 state to the S5 state, the voltage of the first main power input end P3V3 and the voltage of the second main power input end P3V3 are reduced from 3.3V to the first voltage, from the first voltage to the second voltage, and from the second voltage to 0V.
When the power supply board card of the server OCP network card is switched from the S0 state to the S5 state, the second switching module 120 is turned off when the voltage of the main power supply is reduced to the first voltage, and the first switching module is turned on when the voltage of the main power supply is reduced to the second voltage, so that the power supply of the server OCP network card is switched smoothly, and the compatibility of the server OCP network card is improved.
Referring to fig. 1, the first switching module 110 includes a first main power input terminal P3V3, a first auxiliary power input terminal P3V3_ AUX and a first switching power input terminal P3V3DUAL, the first main power input terminal P3V3 is adapted to be electrically connected to a main power, the first auxiliary power input terminal P3V3_ AUX is adapted to be electrically connected to an auxiliary power, and the first switching power input terminal P3V3DUAL is adapted to be electrically connected to a switching power.
In one possible implementation, referring to fig. 1, the first switching module 110 includes a first resistor R127, a second resistor R12, a first MOS transistor PQ1, a second MOS transistor PQ2, and a first capacitor C15, the first MOS transistor PQ1 and the second MOS transistor PQ2 may be PMOS transistors, and may be NTMS4177PR2G, where one end of the first resistor R127 is used as a first main power input terminal P3V3 and is adapted to be electrically connected to a main power source, the S-terminal of the first MOS transistor PQ1 is used as a first switching power input terminal P3V3DUAL and is adapted to be electrically connected to a switching power source, the S-terminal of the second MOS transistor PQ2 is used as a first auxiliary power input terminal P3V3_ AUX and is adapted to be electrically connected to an auxiliary power source, the D-terminal of the first MOS transistor PQ1 is electrically connected to the D-terminal of the second MOS transistor PQ2, the G-terminal of the first MOS transistor PQ1 is electrically connected to the G-terminal of the second MOS transistor PQ2, the G-terminal of the first MOS transistor PQ1 is electrically connected to the other end of the first resistor R127, and the second resistor R12 is connected in parallel with the first capacitor C15 between the other end of the first resistor R127 and the.
Referring to fig. 1, the second switching module 120 includes a second main power input P3V3, a second auxiliary power input P3V3_ AUX and a second switching power input P3V3DUAL, the second main power input P3V3 is adapted to be electrically connected to the main power, the second auxiliary power input P3V3_ AUX is adapted to be electrically connected to the auxiliary power, and the second switching power input P3V3DUAL is adapted to be electrically connected to the switching power.
In a possible implementation manner, the second switching module 120 includes a third resistor R13, a fourth resistor R14, a fifth resistor R15, a sixth resistor R16, a seventh resistor R17, a third MOS transistor PQ3, a fourth MOS transistor PQ4, a second capacitor C16, and a third capacitor C17, where the third MOS transistor PQ3 is a PMOS transistor, the fourth MOS transistor PQ4 is an NMOS transistor, the third MOS transistor PQ3 is NTMS4177PR2G, and the fourth MOS transistor PQ4 is 2N7002LT 1G. One end of a fourth resistor R14 is used as a second main power input terminal P3V3 and is adapted to be electrically connected to a main power, one end of a third resistor R13 is used as an input terminal of a second auxiliary power and is adapted to be electrically connected to an auxiliary power, an S-terminal of a third MOS tube PQ3 is used as an input terminal of a second switching power and is adapted to be electrically connected to a switching power, a D-terminal of a third MOS tube PQ3 is electrically connected to one end of a fourth resistor R14, a G-terminal of the third MOS tube PQ3 is electrically connected to one end of a second capacitor C16, a G-terminal of a fourth MOS tube PQ4 is electrically connected to the other end of a fourth resistor R14, a D-terminal of a fourth MOS tube PQ4 is electrically connected to the other end of a third resistor R13, an S-terminal of the fourth MOS tube PQ4 is electrically connected to a ground, one end of a fifth resistor R15 is electrically connected to one end of a second capacitor C16, the other end of a fifth resistor R8 is electrically connected to the other end of a third resistor R13, and, the other end of the sixth resistor R16 is electrically connected to the ground, and the seventh resistor R17 and the third capacitor C17 are connected in parallel between the other end of the fourth resistor R14 and the ground.
In addition, the first MOS transistor PQ1, the second MOS transistor PQ2 and the third MOS transistor PQ3 are of the same type, so that the end D of the MOS transistor of the type has four pins, the end S of the MOS transistor of the type has three pins, and the pins are connected at the same time, so that the current is divided into different lines, and the MOS transistor PQ1, the second MOS transistor PQ2 and the third MOS transistor PQ3 are more stable. Meanwhile, the first resistor R127, the second resistor R12, the fourth resistor R14 and the seventh resistor R17 of the circuit are used as voltage dividing resistors, so that the PQ4 can be switched off and the PQ2 can be switched on earlier, and the power supply can be switched more smoothly.
Further, referring to fig. 2, the principle of the OCP network card power switching circuit of the server is as follows: when the server OCP network card is switched from S0 to S5, the power supply (main power supply) of P3V3 is decreased from 3.3V to 0V, the power supply (main power supply) of P3V3_ AUX (auxiliary power supply) is 3.3V, the gates (G end) of PMOS PQ1 (first MOS transistor) and PQ2 (second MOS transistor) are 0V, the voltage difference Vgs1 between the G end and the S end) of PMOS PQ1 and PQ2 is at this time, PQ1 and PQ 9 are turned on, the power supply P3V3_ DUAL (switching power supply) obtains 3.3V, and the drain of P3V3_ AUX is pulled up because P3V3 is 0V, so that Vgs2 of NMOS PQ4 (fourth MOS transistor) is 0V, PQ4 is in off state, the drain of P3V3_ AUX 7 is pulled up, so that 3.3V 3 (third MOS transistor) obtains 3V3, and the power supply of PQ 72V 3 is not less than 3V3, and the power supply is not less than 3V3, and the minimum power supply condition is 3V 3-3V 3 is not less than 3V3, which corresponds to the minimum power supply of the PMOS P3-3P 3 is turned on, when the corresponding P3V3 is 2.0V, the sequence must be that P3V3 first falls to 2V, resulting in PQ4 first closing then causing PQ3 to close and then to 1.7V, resulting in PQ2 opening then PQ1 opening, in the process of P3V3 falling from 3.3V to 0V, and there is no path for leakage of P3V3_ AUX to P3V3, and the risk is eliminated.
It should be noted that, although the server OCP network card power switching circuit is described above as an example, those skilled in the art can understand that the disclosure should not be limited thereto. In fact, the user can flexibly set the power switching circuit of the OCP network card of the server according to personal preference and/or practical application scenes as long as the required functions are achieved.
In this way, when the voltage of the main power supply is reduced and is 2V, the fourth MOS transistor PQ4 is turned off, the third MOS transistor PQ3 is turned off, the voltage drop is reduced to 1.7V, the first MOS transistor PQ1 is turned on, and the second MOS transistor PQ2 is turned on, so that the P3V3_ AUX leakage does not reach P3V3, the server OCP network card power switching circuit according to the above embodiment of the present disclosure can smoothly switch the power supply, and the server OCP network card stably operates.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (10)
1. A power supply switching circuit of an OCP network card of a server is characterized by comprising a first switching module and a second switching module;
the first switching module comprises a first main power supply input end, a first auxiliary power supply input end and a first switching power supply input end;
the second switching module comprises a second main power supply input end, a second auxiliary power supply input end and a second switching power supply input end;
the first main power supply input end is suitable for being electrically connected with a main power supply, the first auxiliary power supply input end is suitable for being electrically connected with an auxiliary power supply, and the first switching power supply input end is suitable for being electrically connected with a switching power supply;
the second main power supply input end is suitable for being electrically connected with a main power supply, the second auxiliary power supply input end is suitable for being electrically connected with an auxiliary power supply, and the second switching power supply input end is suitable for being electrically connected with a switching power supply;
when the OCP network card power board of the server is switched from the S0 state to the S5 state, the voltage of the first main power supply input end and the voltage of the second main power supply input end are reduced to the first voltage from 3.3V, the first voltage is reduced to the second voltage, and the second voltage is reduced to 0V.
2. The OCP network card power switching circuit of claim 1, wherein the first switching module comprises a first resistor, a second resistor, a first MOS transistor, a second MOS transistor and a first capacitor;
one end of the first resistor is used as the first main power supply input end and is suitable for being electrically connected with a main power supply;
the S end of the first MOS tube is used as the input end of the first switching power supply and is suitable for being electrically connected with the switching power supply;
the S end of the second MOS tube is used as the input end of the first auxiliary power supply and is suitable for being electrically connected with an auxiliary power supply;
the D end of the first MOS tube is electrically connected with the D end of the second MOS tube;
the G end of the first MOS tube is electrically connected with the G end of the second MOS tube;
the G end of the first MOS tube is electrically connected with the other end of the first resistor;
the second resistor and the first capacitor are connected between the other end of the first resistor and a ground terminal in parallel.
3. The server OCP network card power switching circuit of claim 2, wherein the second switching module comprises a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a third MOS transistor, a fourth MOS transistor, a second capacitor and a third capacitor;
one end of the fourth resistor is used as the second main power supply input end and is suitable for being electrically connected with a main power supply;
one end of the third resistor is used as the input end of the second auxiliary power supply and is suitable for being electrically connected with the auxiliary power supply;
the S end of the third MOS tube is used as the input end of the second switching power supply and is suitable for being electrically connected with the switching power supply;
the D end of the third MOS tube is electrically connected with one end of the fourth resistor;
the G end of the third MOS tube is electrically connected with one end of the second capacitor;
the G end of the fourth MOS tube is electrically connected with the other end of the fourth resistor;
the D end of the fourth MOS tube is electrically connected with the other end of the third resistor;
the S end of the fourth MOS tube is electrically connected with the grounding end;
one end of the fifth resistor is electrically connected with one end of the second capacitor;
the other end of the fifth resistor is electrically connected with the other end of the third resistor;
one end of the sixth resistor is electrically connected with the other end of the third resistor;
the other end of the sixth resistor is electrically connected with a grounding end;
the seventh resistor and the third capacitor are connected in parallel between the other end of the fourth resistor and a ground terminal.
4. The OCP network card power switching circuit of the server according to claim 2, wherein the first MOS transistor is a PMOS transistor;
the type of the second MOS tube is a PMOS tube.
5. The OCP network card power switching circuit of the server according to claim 3, wherein the type of the third MOS transistor is a PMOS transistor;
the type of the fourth MOS tube is an NMOS tube.
6. The server OCP network card power switching circuit of claim 2, wherein the S terminal of the first MOS transistor comprises three pins;
the D end of the first MOS tube comprises four pins;
the S end of the second MOS tube comprises three pins;
the D end of the second MOS tube comprises four pins.
7. The OCP network card power switching circuit of claim 3, wherein the D terminal of the third MOS transistor comprises four pins;
the S end of the third MOS tube comprises three pins.
8. The OCP network card power switching circuit of the server according to claim 4 or 5, wherein the model of the PMOS tube is NTMS4177PR 2G.
9. The OCP network card power switching circuit of claim 5, wherein the NMOS transistor is 2N7002LT 1G.
10. The server OCP network card power switching circuit of claim 1, wherein the first voltage is 2V;
the second voltage is 1.7V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922340091.4U CN210807212U (en) | 2019-12-23 | 2019-12-23 | Power supply switching circuit of OCP network card of server |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922340091.4U CN210807212U (en) | 2019-12-23 | 2019-12-23 | Power supply switching circuit of OCP network card of server |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210807212U true CN210807212U (en) | 2020-06-19 |
Family
ID=71226799
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922340091.4U Active CN210807212U (en) | 2019-12-23 | 2019-12-23 | Power supply switching circuit of OCP network card of server |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210807212U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113193968A (en) * | 2021-04-01 | 2021-07-30 | 浪潮电子信息产业股份有限公司 | Multi-scene compatible power supply network card device and power supply method thereof |
-
2019
- 2019-12-23 CN CN201922340091.4U patent/CN210807212U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113193968A (en) * | 2021-04-01 | 2021-07-30 | 浪潮电子信息产业股份有限公司 | Multi-scene compatible power supply network card device and power supply method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101325411B (en) | Slow starting circuit for electrifying DC power supply | |
| US9052728B2 (en) | Start-up circuit and method thereof | |
| CN107425835B (en) | Startup and shutdown circuit | |
| CN105988495B (en) | A kind of LDO overshoot protections circuit | |
| US6188210B1 (en) | Methods and apparatus for soft start and soft turnoff of linear voltage regulators | |
| US20120159207A1 (en) | Power management device and method thereof | |
| US20130313914A1 (en) | Control circuit for universal serial bus connector | |
| CN210807212U (en) | Power supply switching circuit of OCP network card of server | |
| US9791916B2 (en) | Control circuit including load switch, electronic apparatus including the load switch, and control method thereof | |
| US20090158059A1 (en) | Voltage regulating circuit for motherboard | |
| CN109767715A (en) | Soft-start circuit, integrated power supply management circuit and display equipment | |
| CN106788360B (en) | Reset circuit | |
| US7584370B2 (en) | Circuits, switch assemblies, and methods for power management in an interface that maintains respective voltage differences between terminals of semiconductor devices in open and close switch states and over a range of voltages | |
| CN112713775B (en) | Power supply system and power supply method | |
| CN112214092B (en) | SSD (solid State disk) hard disk power supply time sequence control circuit and method | |
| CN214850972U (en) | Output voltage regulating circuit | |
| CN211266563U (en) | Sequential control device for mutual switching of double-circuit power supply | |
| US6841980B2 (en) | Apparatus for controlling voltage sequencing for a power supply having multiple switching regulators | |
| US20160147286A1 (en) | Circuit for selectable power supply | |
| CN207518565U (en) | A kind of metal-oxide-semiconductor switching circuit | |
| CN207573236U (en) | A kind of Switching Power Supply start-up circuit | |
| CN108519892B (en) | Start mode selection circuit and electronic equipment | |
| JP4467150B2 (en) | Driving circuit | |
| US20140189412A1 (en) | Time sequence circuit for power supply unit | |
| US6661263B2 (en) | Voltage sequencing arrangements providing first and second voltages sequenced to each other in time |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |