CN210780726U - Digital isolation input circuit - Google Patents
Digital isolation input circuit Download PDFInfo
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- CN210780726U CN210780726U CN201921832774.5U CN201921832774U CN210780726U CN 210780726 U CN210780726 U CN 210780726U CN 201921832774 U CN201921832774 U CN 201921832774U CN 210780726 U CN210780726 U CN 210780726U
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- input circuit
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- digital
- digital isolation
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Abstract
The utility model discloses a digital isolation input circuit, which comprises a bidirectional isolator U1, a bidirectional TVS tube D1, a piezoresistor RV1 and a current-limiting resistor R2; one end of a bidirectional TVS tube D1 and one end of a current-limiting resistor R2 are respectively connected with two input ends of a bidirectional isolator U1, two output ends of the bidirectional isolator U1 are respectively grounded and used as output ends of a digital isolation input circuit, the other end of the bidirectional TVS tube D1 is used as one input end of the digital isolation input circuit, the other end of the current-limiting resistor R2 is used as the other input end of the digital isolation input circuit, and two ends of a piezoresistor RV1 are respectively connected with two input ends of the digital isolation input circuit. The utility model discloses a two-way isolation technique, and adopt two-way TVS pipe D1 and piezo-resistor RV1 to constitute anti jamming circuit, guaranteed the remote signalling signal's of distribution terminal high resolution and reliability, improved the EMC interference killing feature.
Description
Technical Field
The utility model relates to an input circuit is kept apart to digit belongs to and keeps apart technical field.
Background
Traditional digital isolation input circuit often adopts one-way opto-coupler as keeping apart core device, and anti-interference device is too big because of leaking the current, and components and parts generate heat and damage and lead to anti-interference function to lose efficacy to influence the resolution ratio and the reliability of whole distribution terminal telesignalling signal.
SUMMERY OF THE UTILITY MODEL
The utility model provides an input circuit is kept apart to digit has solved the problem that reveals in the background art.
In order to solve the technical problem, the utility model discloses the technical scheme who adopts is:
a digital isolation input circuit comprises a bidirectional isolator U1, a bidirectional TVS tube D1, a voltage dependent resistor RV1 and a current limiting resistor R2;
one end of a bidirectional TVS tube D1 and one end of a current-limiting resistor R2 are respectively connected with two input ends of a bidirectional isolator U1, two output ends of the bidirectional isolator U1 are respectively grounded and used as output ends of a digital isolation input circuit, the other end of the bidirectional TVS tube D1 is used as one input end of the digital isolation input circuit, the other end of the current-limiting resistor R2 is used as the other input end of the digital isolation input circuit, and two ends of a piezoresistor RV1 are respectively connected with two input ends of the digital isolation input circuit.
The bidirectional isolator U1 is a bidirectional optocoupler.
The bidirectional isolator further comprises a shaping capacitor C1, and two ends of the shaping capacitor C1 are respectively connected with two input ends of the bidirectional isolator U1.
The bidirectional isolator further comprises a shaping capacitor C2, and two ends of the shaping capacitor C2 are respectively connected with two output ends of the bidirectional isolator U1.
The digital isolation input circuit further comprises a pull-up resistor R1, one end of the pull-up resistor R1 is connected with a power supply, and the other end of the pull-up resistor R1 is connected with the output end of the digital isolation input circuit.
The digital isolation input circuit further comprises a measuring resistor R3, and two ends of the measuring resistor R3 are respectively connected with two input ends of the digital isolation input circuit.
The utility model discloses the beneficial effect who reaches: the utility model discloses a two-way isolation technique, and adopt two-way TVS pipe D1 and piezo-resistor RV1 to constitute anti jamming circuit, guaranteed the remote signalling signal's of distribution terminal high resolution and reliability, improved the EMC interference killing feature.
Drawings
Fig. 1 is a circuit diagram of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
As shown in fig. 1, a digital isolation input circuit includes a bidirectional isolator U1, a voltage dependent resistor RV1, a shaping capacitor C1, a shaping capacitor C2, a pull-up resistor R1, a bidirectional TVS tube D1, and a current limiting resistor R2.
One end of the bidirectional TVS transistor D1 is connected to an input terminal of the bidirectional isolator U1, and the other end of the bidirectional TVS transistor D1 is used as an input terminal of the digital isolation input circuit, i.e., the YX _ IN terminal.
The model of two-way TVS pipe D1 is SMBJ16CA, be punctured when two-way TVS pipe D1 both ends voltage surpasss 18V, the electric current can normally flow through, because the electric current in the circuit is less, be not enough to damage two-way TVS pipe D1, so two-way TVS pipe D1 both ends voltage withdraws back and can resume normally, when two-way TVS pipe D1 both ends voltage is less than 16V, positive and negative all can not have the electric current to pass through, thereby remote signalling can not appear the mistake and receives when guaranteeing the low-voltage.
One end of the current limiting resistor R2 is connected with the other input end of the bidirectional isolator U1, and the other end of the current limiting resistor R2 is used as the other input end of the digital isolation input circuit, namely, a YX _ COM end. Since the maximum input current of the bidirectional isolator U1 is 50mA, the bidirectional isolator U1 is protected by the current limiting resistor R2 to prevent overcurrent damage.
The two output terminals of the bidirectional isolator U1 are respectively connected to ground and serve as the output terminals of the digital isolation input circuit, i.e., YX _ OUT in the figure.
The bidirectional isolator U1 is a bidirectional optocoupler, the type is PC814, the maximum input current is 50mA, and a digital input signal can be converted into an optical signal from an electric signal and transmitted to a rear-stage phototriode, so that various interference sources mixed with the digital input signal are isolated at the front stage of the bidirectional isolator U1.
Two ends of the piezoresistor RV1 are respectively connected with a YX _ IN end and a YX _ COM end, the model is 14D470K, when the input voltage difference exceeds 47V, the piezoresistor RV1 is broken down and short-circuited, and therefore subsequent elements are protected, namely element protection is carried out when the input voltage is too high. The voltage dependent resistor RV1 and the bidirectional TVS tube D1 form an anti-interference circuit, the problems that a remote signaling signal is reversely connected and the reference potential of a common end of the remote signaling signal is uncertain are solved to a certain extent, and an anti-interference effect is achieved.
Two ends of the measuring resistor R3 are respectively connected with the YX _ IN end and the YX _ COM end, the resistance value is 20K, the voltage difference between the YX _ IN end and the YX _ COM end is measured, the input power supply is ensured to be correct, and meanwhile, a detection point is provided for maintenance.
Two ends of the shaping capacitor C1 are respectively connected with two input ends of the bidirectional isolator U1, and two ends of the shaping capacitor C2 are respectively connected with two output ends of the bidirectional isolator U1. The shaping capacitors C1 and C2 can quickly absorb leakage current generated by switching high and low levels of a remote signaling input signal, and have the effect of signal shaping.
One end of the pull-up resistor R1 is connected with a power supply, namely +3V3, the other end of the pull-up resistor R1 is connected with the output end of the digital isolation input circuit, and when no digital signal is input (no digital signal is input between the input ports YX _ IN and YX _ COM of the circuit), the high level 1 is ensured.
When YX _ IN is input at the positive end, YX _ COM is input at the negative end; YX _ COM is a positive input when YX _ IN is a negative input. When the voltage difference between the YX _ IN and the YX _ COM ranges from DC18V to DC48V, the output YX _ OUT is at a low level 0; when the voltage difference between the two is less than 8V, the output YX _ OUT is at high level 1.
Through the cooperation of the bidirectional TVS tube D1 and the current-limiting resistor R2, the circuit can realize the national standard requirement: when the digital input signal is less than 30% of the range of the circuit power supply voltage, the circuit can output a high level; when the digital input signal is in the range of more than 70% of the circuit power supply voltage, the circuit can output a low level.
The utility model discloses a two-way isolation technique, and adopt two-way TVS pipe D1 and piezo-resistor RV1 to constitute anti jamming circuit, guaranteed the remote signalling signal's of distribution terminal high resolution and reliability, improved the EMC interference killing feature.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be considered as the protection scope of the present invention.
Claims (6)
1. A digital isolated input circuit, characterized by: the bidirectional TVS tube voltage regulator comprises a bidirectional isolator U1, a bidirectional TVS tube D1, a voltage dependent resistor RV1 and a current limiting resistor R2;
one end of a bidirectional TVS tube D1 and one end of a current-limiting resistor R2 are respectively connected with two input ends of a bidirectional isolator U1, two output ends of the bidirectional isolator U1 are respectively grounded and used as output ends of a digital isolation input circuit, the other end of the bidirectional TVS tube D1 is used as one input end of the digital isolation input circuit, the other end of the current-limiting resistor R2 is used as the other input end of the digital isolation input circuit, and two ends of a piezoresistor RV1 are respectively connected with two input ends of the digital isolation input circuit.
2. A digital isolated input circuit according to claim 1, wherein: the bidirectional isolator U1 is a bidirectional optocoupler.
3. A digital isolated input circuit according to claim 1, wherein: the bidirectional isolator further comprises a shaping capacitor C1, and two ends of the shaping capacitor C1 are respectively connected with two input ends of the bidirectional isolator U1.
4. A digital isolated input circuit according to claim 1, wherein: the bidirectional isolator further comprises a shaping capacitor C2, and two ends of the shaping capacitor C2 are respectively connected with two output ends of the bidirectional isolator U1.
5. A digital isolated input circuit according to claim 1, wherein: the digital isolation input circuit further comprises a pull-up resistor R1, one end of the pull-up resistor R1 is connected with a power supply, and the other end of the pull-up resistor R1 is connected with the output end of the digital isolation input circuit.
6. A digital isolated input circuit according to claim 1, wherein: the digital isolation input circuit further comprises a measuring resistor R3, and two ends of the measuring resistor R3 are respectively connected with two input ends of the digital isolation input circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921832774.5U CN210780726U (en) | 2019-10-29 | 2019-10-29 | Digital isolation input circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921832774.5U CN210780726U (en) | 2019-10-29 | 2019-10-29 | Digital isolation input circuit |
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| Publication Number | Publication Date |
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| CN210780726U true CN210780726U (en) | 2020-06-16 |
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| CN201921832774.5U Active CN210780726U (en) | 2019-10-29 | 2019-10-29 | Digital isolation input circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109541287A (en) * | 2018-12-29 | 2019-03-29 | 天津康途科技有限公司 | A kind of leak current detection device |
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2019
- 2019-10-29 CN CN201921832774.5U patent/CN210780726U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109541287A (en) * | 2018-12-29 | 2019-03-29 | 天津康途科技有限公司 | A kind of leak current detection device |
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Effective date of registration: 20200814 Address after: No. 588-590, Tianshan West Road, Changning District, Shanghai, 200335 Co-patentee after: SHANGHAI TIANGUI ELECTRONIC TECHNOLOGY Co.,Ltd. Patentee after: Shanghai Zhixin Intelligent Electric Co., Ltd Address before: 200030 Hongqiao Road, Changning District, Shanghai 2239 Co-patentee before: SHANGHAI TIANGUI ELECTRONIC TECHNOLOGY Co.,Ltd. Patentee before: SHANGHAI ZHIXING ELECTRIC Co.,Ltd. |