CN210723020U - Circuit board and light-emitting device - Google Patents
Circuit board and light-emitting device Download PDFInfo
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- CN210723020U CN210723020U CN201922134326.4U CN201922134326U CN210723020U CN 210723020 U CN210723020 U CN 210723020U CN 201922134326 U CN201922134326 U CN 201922134326U CN 210723020 U CN210723020 U CN 210723020U
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Abstract
The utility model discloses a circuit board and illuminator, it includes base plate, circuit layer, solder mask and a plurality of counterpoint structure. The circuit layer is positioned on the substrate. The solder mask layer is positioned on the substrate and covers the circuit layer. The solder mask layer is provided with a plurality of windows, and the plurality of windows expose part of the circuit layer. The plurality of alignment structures are located on the solder mask layer, wherein the number of the plurality of alignment structures is an integral multiple of the number of the plurality of windows. The utility model provides a circuit board and illuminator have the counterpoint precision or the accuracy of preferred through a plurality of counterpoint structures.
Description
Technical Field
The utility model relates to a circuit board and illuminator especially relate to a circuit board and illuminator with a plurality of counterpoint structures.
Background
Light Emitting Diodes (LEDs) have advantages such as long life, small size, high shock resistance, low heat generation, and low power consumption, and thus have been widely used as indicators or light sources in home and various appliances. In recent years, light emitting diodes have been developed in multi-color and high brightness, and thus their application fields have been expanded to large outdoor billboards, traffic signals, and related fields. In the future, the light emitting diode may even become a main illumination light source with power saving and environmental protection functions.
Generally, a light emitting device with light emitting diodes is to arrange the light emitting diodes on a circuit board. However, in a light emitting device having a submillimeter light emitting diode (MiniLED) or a micro light emitting diode (micro led) as a light emitting element, there may be millions of light emitting elements. These light emitting elements are usually electrically connected to a circuit board by flip chip bonding (flip chip) to form a light emitting device. Therefore, the light emitting device often has a problem of misalignment due to thermal expansion and contraction.
SUMMERY OF THE UTILITY MODEL
The utility model provides a circuit board and have its illuminator, it can have the counterpoint precision (precision) or accuracy (accuracy) of preferred.
The utility model provides a light-emitting device with aforementioned circuit board, its yield that has the preferred.
According to the utility model discloses an embodiment, the circuit board includes base plate, circuit layer, solder mask and a plurality of counterpoint structure. The circuit layer is positioned on the substrate. The solder mask layer is positioned on the substrate and covers the circuit layer. The solder mask layer is provided with a plurality of windows, and the plurality of windows expose part of the circuit layer. The plurality of alignment structures are located on the solder mask layer, wherein the number of the plurality of alignment structures is an integral multiple of the number of the plurality of windows.
In an embodiment of the present invention, the size of the alignment structures is smaller than the size of the windows.
The utility model discloses an in the embodiment, a plurality of counterpoint structure's number is greater than a plurality of numbers of windowing.
In an embodiment of the present invention, the circuit board further includes a plurality of configuration units. The plurality of alignment structures includes a plurality of first alignment structures and a plurality of second alignment structures. The number of the plurality of first alignment structures is an integer multiple of the number of the plurality of windowing structures. The number of the second alignment structures is an integral multiple of the number of the windows. One of the plurality of windows, one of the plurality of first alignment structures, and at least one of the plurality of second alignment structures constitute each configuration unit.
In an embodiment of the present invention, in the top view state, the first alignment structures and the second alignment structures in each of the plurality of configuration units are configured in an asymmetric manner.
In an embodiment of the present invention, the circuit layer includes a plurality of first pads and a plurality of second pads. The plurality of first pads are electrically separated from the plurality of second pads, and each of the plurality of windows exposes at least one of the plurality of first pads and at least one of the plurality of second pads.
In an embodiment of the present invention, the circuit layer further includes a plurality of third pads and a plurality of fourth pads. The plurality of third pads are electrically separated from the fourth pads, and each of the plurality of windows exposes at least one of the plurality of first pads, at least one of the plurality of second pads, at least one of the plurality of third pads, and at least one of the plurality of fourth pads.
According to the utility model discloses an embodiment, illuminator includes aforementioned a circuit board and a plurality of light-emitting component. The light-emitting components are arranged on the circuit board and electrically connected to the circuit layer of the circuit board.
In an embodiment of the present invention, the plurality of light emitting elements are not overlapped on the plurality of alignment structures of the circuit board.
In an embodiment of the present invention, the number of the plurality of alignment structures of the circuit board is greater than or equal to the number of the plurality of light emitting elements.
Based on the foregoing, the utility model discloses a circuit board can have the counterpoint precision or the accuracy of preferred through a plurality of counterpoint structures. Therefore, the light-emitting device with the circuit board can have better yield.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
Fig. 1A is a schematic top view of a part of a circuit board according to a first embodiment of the present invention;
fig. 1B is a schematic top view of a portion of a light emitting device according to a first embodiment of the present invention;
fig. 2A is a schematic top view of a portion of a circuit board according to a second embodiment of the present invention;
fig. 2B is a schematic top view of a portion of a light emitting device according to a second embodiment of the present invention;
fig. 3A is a schematic top view of a part of a circuit board according to a third embodiment of the present invention;
fig. 3B is a schematic partial top view of a light emitting device according to a third embodiment of the present invention.
Description of the reference numerals
101. 201, 301: a circuit board;
102. 202, 302: a light emitting device;
110: a substrate;
120. 220, 320: a circuit layer;
121. 221, 321: a first pad;
122. 222, 322: a second pad;
123. 223, 323: a third pad;
124. 224, 324: a fourth pad;
125. 325: a fifth pad;
126. 326: a sixth pad;
130: a solder resist layer;
140. 240, 340: windowing;
341: a first windowing;
342: second windowing;
343: a third window is opened;
150: aligning structure;
151: a first alignment structure;
152: a second alignment structure;
153: a third alignment structure;
160. 260, 360: a configuration unit;
160c, 260 c: a center;
361: a first configuration unit;
362: a second configuration unit;
363: a third configuration unit;
170: a light emitting assembly;
171: a first light emitting assembly;
172: a second light emitting element;
173: and a third light emitting assembly.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are disclosed in order to provide a thorough and complete disclosure, and to fully convey the concept of the invention to those skilled in the art, and the invention will only be defined by the appended claims. Like reference numerals designate like components throughout the specification, and the sizes of some portions may be exaggerated for clarity of embodiments of the present invention.
It will be understood that, although the terms first, second, third and the like herein may be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be termed a second element, and, similarly, a second element may be termed a first element, without departing from the scope of the present inventive concept.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the inventive concepts. As used in this application, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In the drawings, the shapes shown may be modified as desired depending on manufacturing techniques and/or tolerances. Thus, the exemplary embodiments should not be construed as limited to the particular shapes of regions illustrated. These shapes may be changed during the manufacturing process. As used in this disclosure, the term "and/or" includes any and all combinations of one or more of the associated listed items. The term "substrate" as used herein may mean a substrate itself or a stack structure including a substrate and a predetermined layer or film formed thereon. Also, the expression "surface of the substrate" may mean an exposed surface of the substrate or an outer surface of a predetermined layer or film formed thereon.
Fig. 1A is a schematic partial top view of a circuit board according to a first embodiment of the present invention.
Referring to fig. 1A, a circuit board 101 includes a substrate 110, a circuit layer 120, a solder resist layer 130, and a plurality of alignment structures 150. The circuit layer 120 is disposed on the substrate 110. The solder resist layer 130 is located on the substrate 110 and covers the circuit layer 120. The solder resist layer 130 has a plurality of windows 140. The window 140 exposes a portion of the circuit layer 120. The alignment structure 150 is located on the solder mask layer 130. The number of alignment structures 150 is an integer multiple of the number of windows 140.
In an embodiment, the substrate 110 may be a flexible substrate or a flexible substrate, but the invention is not limited thereto.
In an embodiment, the window 140 may expose a portion of the substrate 110, but the invention is not limited thereto. In an embodiment not shown, if there are other layers or elements between the substrate 110 and the circuit layer 120, the window 140 may expose the above-mentioned layers or elements.
In an embodiment, the alignment structure 150 may be a microstructure located on the solder mask layer 130, but the invention is not limited thereto. The microstructure may be a component or a film formed on the solder mask layer 130, or a portion of the solder mask layer 130 may be removed.
In the present embodiment, the size of the alignment structure 150 is smaller than the size of the window 140. However, the present invention is not limited thereto.
In the present embodiment, the number of the alignment structures 150 is greater than the number of the windows 140. However, the present invention is not limited thereto.
For example, the number of the alignment structures 150 is three times the number of the windows 140, but the present invention is not limited thereto.
In this embodiment, the wiring board 101 further includes a plurality of configuration units 160. The alignment structures 150 include first alignment structures 151 and second alignment structures 152. The number of first alignment structures 151 is an integer multiple of the number of windows 140. The number of second alignment structures 152 is an integer multiple of the number of fenestrations 140. One of the plurality of windows 140, one of the plurality of first alignment structures 151, and at least one of the plurality of second alignment structures 152 constitute each configuration unit 160. However, the present invention is not limited thereto.
For example, the alignment structures 150 include a first alignment structure 151, a second alignment structure 152, and a third alignment structure 153. The number of first alignment structures 151 is one time the number of windows 140. The number of second alignment structures 152 is one time the number of windows 140. The number of third alignment structures 153 is one time the number of windows 140. One of the plurality of windows 140, one of the plurality of first alignment structures 151, one of the plurality of second alignment structures 152, and one of the plurality of third alignment structures 153 form each configuration unit 160.
In an embodiment, the first alignment structure 151, the second alignment structure 152 and the third alignment structure 153 are different from each other in appearance, but the present invention is not limited thereto.
In the present embodiment, the first alignment structures 151 and the second alignment structures 152 in the plurality of arrangement units 160 are asymmetrically arranged in a top view. However, the present invention is not limited thereto.
For example, in a top view (as shown in FIG. 1A), the first alignment structure 151, the second alignment structure 152, and the third alignment structure 153 in each configuration unit 160 cannot be overlapped when the center 160c of the configuration unit 160 is rotated by an angle (e.g., greater than 0 degrees and less than 360 degrees). That is, the first alignment structure 151, the second alignment structure 152, and the third alignment structure 153 in each allocation unit 160 are not arranged in a point-symmetric manner. Such a configuration can improve the judgment of the direction during alignment, which is also known as "fool-proof design".
In the embodiment, the circuit layer 120 includes a plurality of first pads 121 and a plurality of second pads 122. The first pads 121 are electrically separated from the plurality of second pads 122. Each of the windows 140 exposes at least one first pad 121 and at least one second pad 122. However, the present invention is not limited thereto.
In this embodiment, the circuit layer 120 further includes a plurality of third pads 123 and a plurality of fourth pads 124. The first pad 121, the second pad 122, the third pad 123 and the fourth pad 124 are electrically separated from each other. Each of the windows 140 exposes at least one first pad 121, at least one second pad 122, at least one third pad 123 and at least one fourth pad 124. However, the present invention is not limited thereto.
For example, the circuit layer 120 includes a plurality of first pads 121, a plurality of second pads 122, a plurality of third pads 123, a plurality of fourth pads 124, a plurality of fifth pads 125, and a plurality of sixth pads 126. The window 140 of the solder mask layer 130 exposes the first pad 121, the second pad 122, the third pad 123, the fourth pad 124, the fifth pad 125 and the sixth pad 126. The first pads 121, the second pads 122 and the third pads 123 are electrically separated from each other. The first pad 121 is electrically separated from the fourth pad 124, the fifth pad 125 and the sixth pad 126. The second pads 122 are electrically separated from the fourth pads 124, the fifth pads 125 and the sixth pads 126. The third pad 123 is electrically separated from the fourth pad 124, the fifth pad 125 and the sixth pad 126.
In an embodiment, the fourth pad 124, the fifth pad 125 and the sixth pad 126 may be electrically separated from each other, but the invention is not limited thereto.
In one embodiment, the fourth pads 124, the fifth pads 125 and the sixth pads 126 may be electrically connected to each other. For example, the fourth pad 124, the fifth pad 125 and the sixth pad 126 can be electrically connected to the common potential (Vcom).
Fig. 1B is a schematic partial top view of a light emitting device according to a first embodiment of the present invention.
Referring to fig. 1A and 1B, the light emitting device 102 includes a circuit board 101 and a plurality of light emitting elements 170. The light emitting element 170 is disposed on the circuit board 101, and the light emitting element 170 is electrically connected to the circuit layer 120 of the circuit board 101.
For example, the light emitting device 170 includes a first light emitting device 171, a second light emitting device 172, and a third light emitting device 173. The first light emitting element 171 is disposed on the circuit board 101, and the first light emitting element 171 is electrically connected to the first pad 121 and the fourth pad 124. The second light emitting element 172 is disposed on the circuit board 101, and the second light emitting element 172 is electrically connected to the second pad 122 and the fifth pad 125. The third light emitting element 173 is disposed on the circuit board 101, and the third light emitting element 173 is electrically connected to the third pad 123 and the sixth pad 126.
In one embodiment, the light emitting element 170 is, for example, a light emitting diode. For example, the light emitting element 170 is, for example, a sub-millimeter light emitting diode (MiniLED) or a micro light emitting diode (micro led), but the invention is not limited thereto.
In one embodiment, the light emitting element 170 is electrically connected to the circuit layer 120 of the circuit board 101 by flip chip bonding (flip chip), for example. For example, the light emitting element 170 and the circuit layer 120 may have solder balls or other similar solders.
In an embodiment, the first light emitting element 171 may be a red light emitting element 170, the second light emitting element 172 may be a green light emitting element 170, and the third light emitting element 173 may be a blue light emitting element 170, but the invention is not limited thereto.
In this embodiment, the light emitting element 170 does not overlap the alignment structure 150 of the circuit board 101. However, the present invention is not limited thereto.
For example, in a top view (as shown in FIG. 1B), the light emitting element 170 does not overlap the alignment structure 150 of the circuit board 101.
In this embodiment, the number of the alignment structures 150 of the circuit board 101 is greater than or equal to the number of the light emitting elements 170.
For example, the number of the first alignment structures 151 is equal to the number of the first light emitting elements 171, the number of the second alignment structures 152 is equal to the number of the second light emitting elements 172, and the number of the third alignment structures 153 is equal to the number of the third light emitting elements 173.
In the present embodiment, the first alignment structure 151, the second alignment structure 152, and the third alignment structure 153 may have different sizes, dimensions, or shapes. Therefore, the positions or orientations of the first light emitting element 171, the second light emitting element 172 and the third light emitting element 173 can be easily determined, and the possibility of wrong arrangement of the first light emitting element 171, the second light emitting element 172 or the third light emitting element 173 can be reduced.
Fig. 2A is a schematic top view of a part of a circuit board according to a second embodiment of the present invention.
Referring to fig. 2A, the circuit board 201 includes a substrate 110, a circuit layer 220, a solder mask layer 130, and a plurality of alignment structures 150. The circuit layer 220 is disposed on the substrate 110. The solder resist layer 130 is located on the substrate 110 and covers the circuit layer 220. The solder resist layer 130 has a plurality of windows 240. The window 240 exposes a portion of the circuit layer 220. The alignment structure 150 is located on the solder mask layer 130. The number of alignment structures 150 is an integer multiple of the number of fenestrations 240.
In an embodiment, the window 240 may expose a portion of the substrate 110, but the invention is not limited thereto. In an embodiment not shown, if there are other layers or elements between the substrate 110 and the circuit layer 220, the window 240 may expose the above-mentioned layers or elements.
In the present embodiment, the size of the alignment structure 150 is smaller than the size of the window 240. However, the present invention is not limited thereto.
In the present embodiment, the number of the alignment structures 150 is greater than the number of the windowing 240. However, the present invention is not limited thereto.
For example, the number of the alignment structures 150 is three times that of the windows 240, but the present invention is not limited thereto.
In this embodiment, the circuit board 201 further includes a plurality of configuration units 260. The alignment structures 150 include first alignment structures 151 and second alignment structures 152. The number of first alignment structures 151 is an integer multiple of the number of windowing 240. The number of second alignment structures 152 is an integer multiple of the number of fenestrations 240. One of the plurality of windows 240, one of the plurality of first alignment structures 151, and at least one of the plurality of second alignment structures 152 constitute each configuration unit 260. However, the present invention is not limited thereto.
For example, the number of first alignment structures 151 is one time the number of windowing 240. The number of second alignment structures 152 is one time the number of fenestrations 240. The number of third alignment structures 153 is one time the number of windowing 240. One of the plurality of windows 240, one of the plurality of first alignment structures 151, one of the plurality of second alignment structures 152, and one of the plurality of third alignment structures 153 form each configuration unit 260.
In the present embodiment, the first alignment structures 151 and the second alignment structures 152 in the plurality of configuration units 260 are asymmetrically configured in a top view. However, the present invention is not limited thereto.
For example, in a top view (as shown in FIG. 2A), the first alignment structure 151, the second alignment structure 152, and the third alignment structure 153 in each configuration unit 260 cannot be overlapped when the center 260c of the configuration unit 260 is rotated by an angle (e.g., greater than 0 degrees and less than 360 degrees). That is, the first alignment structure 151, the second alignment structure 152, and the third alignment structure 153 in each configuration unit 260 are not point-symmetrically configured.
In the embodiment, the circuit layer 220 includes a plurality of first pads 221 and a plurality of second pads 222. The first pads 221 are electrically separated from the plurality of second pads 222. Each of the windows 240 exposes at least one first pad 221 and at least one second pad 222. However, the present invention is not limited thereto.
In the present embodiment, the circuit layer 220 further includes a plurality of third pads 223 and a plurality of fourth pads 224. The first pad 221, the second pad 222, the third pad 223 and the fourth pad 224 are electrically separated from each other. Each of the windows 240 exposes at least one first pad 221, at least one second pad 222, at least one third pad 223, and at least one fourth pad 224. However, the present invention is not limited thereto.
For example, the circuit layer 220 includes a plurality of first pads 221, a plurality of second pads 222, a plurality of third pads 223, and a plurality of fourth pads 224. The window 240 of the solder mask layer 130 exposes the first pad 221, the second pad 222, the third pad 223 and the fourth pad 224.
In one embodiment, the fourth pad 224 can be electrically connected to the common potential (Vcom).
Fig. 2B is a schematic top view of a portion of a light emitting device according to a second embodiment of the present invention.
Referring to fig. 2A and 2B, the light emitting device 202 includes a circuit board 201 and a plurality of light emitting elements 170. The light emitting element 170 is disposed on the circuit board 201, and the light emitting element 170 is electrically connected to the circuit layer 220 of the circuit board 201.
For example, the light emitting device 170 includes a first light emitting device 171, a second light emitting device 172, and a third light emitting device 173. The first light emitting element 171 is disposed on the circuit board 201, and the first light emitting element 171 is electrically connected to the first pad 221 and the fourth pad 224. The second light emitting element 172 is disposed on the circuit board 201, and the second light emitting element 172 is electrically connected to the second pad 222 and the fourth pad 224. The third light emitting element 173 is disposed on the circuit board 201, and the third light emitting element 173 is electrically connected to the third pad 223 and the fourth pad 224.
In one embodiment, the light emitting element 170 is electrically connected to the circuit layer 220 of the circuit board 201 by flip chip bonding, for example. For example, the light emitting device 170 and the circuit layer 220 may have solder balls or other similar solders.
In the present embodiment, the light emitting element 170 is not overlapped on the alignment structure 150 of the circuit board 201. However, the present invention is not limited thereto.
For example, in a top view (as shown in FIG. 1B), the light emitting element 170 does not overlap the alignment structure 150 of the circuit board 201.
In this embodiment, the number of the alignment structures 150 of the circuit board 201 is greater than or equal to the number of the light emitting assemblies 170.
For example, the number of the first alignment structures 151 is equal to the number of the first light emitting elements 171, the number of the second alignment structures 152 is equal to the number of the second light emitting elements 172, and the number of the third alignment structures 153 is equal to the number of the third light emitting elements 173.
Fig. 3A is a schematic partial top view of a circuit board according to a third embodiment of the present invention.
Referring to fig. 1A, the circuit board 301 includes a substrate 110, a circuit layer 320, a solder resist layer 130, and a plurality of alignment structures 150. The circuit layer 320 is located on the substrate 110. The solder resist layer 130 is located on the substrate 110 and covers the circuit layer 320. The solder resist layer 130 has a plurality of windows 340. The window 340 exposes a portion of the circuit layer 320. The alignment structure 150 is located on the solder mask layer 130. The number of alignment structures 150 is an integer multiple of the number of fenestrations 340.
In an embodiment, the window 340 may expose a portion of the substrate 110, but the invention is not limited thereto. In an embodiment not shown, if there are other layers or elements between the substrate 110 and the circuit layer 320, the window 340 may expose the above-mentioned layers or elements.
In this embodiment, the windows 340 may include a first window 341, a second window 342, and a third window 343.
In the present embodiment, the size of the alignment structure 150 is smaller than the size of the window 340. However, the present invention is not limited thereto.
For example, the number of the alignment structures 150 is three times that of the windows 340, but the present invention is not limited thereto.
In this embodiment, the circuit board 301 further includes a plurality of configuration units 360. The alignment structures 150 include first alignment structures 151 and second alignment structures 152. The number of first alignment structures 151 is an integer multiple of the number of windowing 340. The number of second alignment structures 152 is an integer multiple of the number of fenestrations 340. At least one of the one or more second alignment structures 152 of the plurality of first alignment structures 151 and one of the plurality of windows 340 form each configuration unit 360. However, the present invention is not limited thereto.
For example, the configuration units 360 include a plurality of first configuration units 361, a plurality of second configuration units 362, and a plurality of third configuration units 363, and the alignment structures 150 include a plurality of first alignment structures 151, a plurality of second alignment structures 152, and a plurality of third alignment structures 153. The number of first alignment structures 151 is one time the number of first windows 341. The number of the second alignment structures 152 is twice the number of the second windows 342. The number of the third alignment structures 153 is one time of the number of the third windows 343. One of the first windows 341 and one of the first alignment structures 151 form each first configuration unit 361, one of the second windows 342 and one of the second alignment structures 152 form each second configuration unit 362, and one of the third windows 343 and one of the third alignment structures 153 form each third configuration unit 363.
In the embodiment, the circuit layer 320 includes a plurality of first pads 321, a plurality of second pads 322, a plurality of third pads 323, a plurality of fourth pads 324, a plurality of fifth pads 325, and a plurality of sixth pads 326. The first opening 341 exposes the at least one first pad 321 and the at least one fourth pad 324, the second opening 342 exposes the at least one second pad 322 and the at least one fifth pad 325, and the third opening 343 exposes the at least one third pad 323 and the at least one sixth pad 326.
In the embodiment, the first pad 321, the second pad 322 and the third pad 323 are electrically separated from each other. The first pad 321 is electrically separated from the fourth pad 324, the fifth pad 325 and the sixth pad 326. The second pads 322 are electrically separated from the fourth pads 324, the fifth pads 325 and the sixth pads 326. The third pad 323 is electrically separated from the fourth pad 324, the fifth pad 325 and the sixth pad 326.
In an embodiment, the fourth pad 324, the fifth pad 325 and the sixth pad 326 may be electrically separated from each other, but the invention is not limited thereto.
In one embodiment, the fourth pads 324, the fifth pads 325 and the sixth pads 326 may be electrically connected to each other. For example, the fourth pad 324, the fifth pad 325 and the sixth pad 326 can be electrically connected to the common potential (Vcom).
Fig. 3B is a schematic partial top view of a light emitting device according to a third embodiment of the present invention.
Referring to fig. 3A and 3B, the light emitting device 302 includes a circuit board 301 and a plurality of light emitting elements 170. The light emitting device 170 is disposed on the circuit board 301, and the light emitting device 170 is electrically connected to the circuit layer 320 of the circuit board 301.
For example, the light emitting device 170 includes a first light emitting device 171, a second light emitting device 172, and a third light emitting device 173. The first light emitting element 171 is disposed on the circuit board 301, and the first light emitting element 171 is electrically connected to the first pad 321 and the fourth pad 324. The second light emitting element 172 is disposed on the circuit board 301, and the second light emitting element 172 is electrically connected to the second pad 322 and the fifth pad 325. The third light emitting element 173 is disposed on the circuit board 301, and the third light emitting element 173 is electrically connected to the third pad 323 and the sixth pad 326.
In one embodiment, the light emitting device 170 is electrically connected to the circuit layer 320 of the circuit board 301 by flip chip bonding, for example. For example, the light emitting device 170 and the circuit layer 320 may have solder balls or other similar solders.
In the present embodiment, the light emitting element 170 does not overlap the alignment structure 150 of the circuit board 301. However, the present invention is not limited thereto.
For example, in a top view (as shown in FIG. 3B), the light emitting element 170 does not overlap the alignment structure 150 of the circuit board 301.
In this embodiment, the number of the alignment structures 150 of the circuit board 301 is greater than or equal to the number of the light emitting assemblies 170.
For example, the number of the first alignment structures 151 is equal to the number of the first light emitting elements 171, the number of the second alignment structures 152 is equal to the number of the second light emitting elements 172, and the number of the third alignment structures 153 is equal to the number of the third light emitting elements 173.
In summary of the above disclosure, the circuit board of the present invention can have a better alignment precision or accuracy through a plurality of alignment structures. Therefore, the light-emitting device with the circuit board can have better yield.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.
Claims (10)
1. A circuit board, comprising:
a substrate;
the circuit layer is positioned on the substrate;
the circuit layer is arranged on the substrate and covers the circuit layer, the circuit layer is provided with a plurality of windows, and the plurality of windows expose part of the circuit layer; and
and the alignment structures are positioned on the solder mask layer, wherein the number of the alignment structures is an integral multiple of the number of the windows.
2. The wiring board of claim 1, wherein the plurality of alignment structures have a size that is smaller than the plurality of fenestrations.
3. The wiring board of claim 1, wherein the number of the plurality of alignment structures is greater than the number of the plurality of fenestrations.
4. The wiring board of claim 3, further comprising:
a plurality of configuration units, wherein:
the plurality of alignment structures comprises a plurality of first alignment structures and a plurality of second alignment structures;
the number of the first alignment structures is an integral multiple of the number of the windowing structures;
the number of the second alignment structures is integral multiple of the number of the windows; and is
One of the plurality of windows, one of the plurality of first bit structures, and at least one of the plurality of second bit structures constitute each of the configuration units.
5. The circuit board according to claim 4, wherein the first alignment structure and the second alignment structure in each of the plurality of configuration units are asymmetrically configured in a top view.
6. The circuit board of claim 1, wherein the circuit layer comprises a plurality of first pads and a plurality of second pads, the plurality of first pads are electrically separated from the plurality of second pads, and each of the plurality of windows exposes at least one of the plurality of first pads and at least one of the plurality of second pads.
7. The circuit board of claim 6, wherein the circuit layer further comprises a plurality of third pads and a plurality of fourth pads, the plurality of third pads are electrically separated from the fourth pads, and each of the plurality of windows exposes at least one of the plurality of first pads, at least one of the plurality of second pads, at least one of the plurality of third pads, and at least one of the plurality of fourth pads.
8. A light-emitting device, comprising:
the wiring board of claim 1; and
and the light-emitting components are configured on the circuit board and are electrically connected to the circuit layer of the circuit board.
9. The apparatus of claim 8, wherein the light-emitting components do not overlap the alignment structures of the circuit board.
10. The light-emitting device according to claim 8, wherein the number of the alignment structures of the circuit board is greater than or equal to the number of the light-emitting assemblies.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922134326.4U CN210723020U (en) | 2019-12-03 | 2019-12-03 | Circuit board and light-emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922134326.4U CN210723020U (en) | 2019-12-03 | 2019-12-03 | Circuit board and light-emitting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210723020U true CN210723020U (en) | 2020-06-09 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021248970A1 (en) * | 2020-06-10 | 2021-12-16 | 海信视像科技股份有限公司 | Display apparatus |
| CN113820886A (en) * | 2020-06-19 | 2021-12-21 | 海信视像科技股份有限公司 | Display device |
| US11703716B2 (en) | 2020-04-28 | 2023-07-18 | Hisense Visual Technology Co., Ltd. | Display apparatus |
| US11822183B2 (en) | 2020-03-25 | 2023-11-21 | Hisense Visual Technology Co., Ltd. | Display apparatus |
-
2019
- 2019-12-03 CN CN201922134326.4U patent/CN210723020U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11822183B2 (en) | 2020-03-25 | 2023-11-21 | Hisense Visual Technology Co., Ltd. | Display apparatus |
| US11703716B2 (en) | 2020-04-28 | 2023-07-18 | Hisense Visual Technology Co., Ltd. | Display apparatus |
| WO2021248970A1 (en) * | 2020-06-10 | 2021-12-16 | 海信视像科技股份有限公司 | Display apparatus |
| CN113820886A (en) * | 2020-06-19 | 2021-12-21 | 海信视像科技股份有限公司 | Display device |
| CN113820886B (en) * | 2020-06-19 | 2022-10-14 | 海信视像科技股份有限公司 | Display device |
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