CN210722994U - Packaging structure of electronic element - Google Patents
Packaging structure of electronic element Download PDFInfo
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- CN210722994U CN210722994U CN201922209629.8U CN201922209629U CN210722994U CN 210722994 U CN210722994 U CN 210722994U CN 201922209629 U CN201922209629 U CN 201922209629U CN 210722994 U CN210722994 U CN 210722994U
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Abstract
The utility model discloses an electronic component's packaging structure. Wherein, electronic component's packaging structure includes: a substrate having a first surface and a second surface disposed opposite to each other; and the electronic element is arranged on the first surface, is of a plate-shaped structure, is arranged on the substrate along a direction vertical to the substrate and is electrically connected with the substrate. The utility model discloses electronic component's of electronic component's packaging structure integrated density is high, and the encapsulation size is little.
Description
Technical Field
The utility model relates to a semiconductor package technical field, in particular to electronic component's packaging structure.
Background
In the modern society, consumer electronic products are continuously developed toward miniaturization and thinning, which requires higher integration density. The current common system-in-package structures for increasing integration density mainly focus on the horizontal stacking scheme, and these structures are prone to warpage due to CTE (coefficient of thermal expansion) mismatch between the substrate and the chip. In the side mounting technology, the connection between the chip or device leads and the substrate is usually performed by direct wire bonding or lead frame, which results in complicated steps and large package size.
The above is only for the purpose of assisting understanding of the technical solutions of the present application, and does not represent an admission that the above is prior art.
SUMMERY OF THE UTILITY MODEL
The main object of the present invention is to provide an electronic component package structure, which aims to improve the integration density of the electronic component and reduce the package size.
In order to achieve the above object, the present invention provides an electronic component packaging structure, including:
a substrate having a first surface and a second surface disposed opposite to each other; and
the electronic element is arranged on the first surface, is of a plate-shaped structure, is arranged on the substrate along a direction perpendicular to the substrate and is electrically connected with the substrate.
Optionally, the electronic component is a component and/or a chip.
Optionally, the first surface is provided with a groove, the electronic component is a chip, and the chip is inserted into the groove and electrically connected to the substrate.
Optionally, a pin is arranged at one end of the chip close to the groove, an elastic part is arranged on the inner wall of the groove, and the chip is connected with the substrate electrically by the pin and the elastic part in an abutting mode.
Optionally, the first surface is provided with an accommodating groove, the electronic component is a component and a chip, and the chip is arranged on a bottom wall of the accommodating groove and electrically connected to the substrate;
the component is arranged on the side wall of the accommodating groove and is electrically connected with the substrate.
Optionally, the package structure of the electronic component further includes an adapter plate, the adapter plate is of a plate-shaped structure, the adapter plate is arranged on the substrate in a direction perpendicular to the substrate, the adapter plate has a first side surface and a second side surface which are arranged oppositely, the first side surface is provided with a connection circuit, the connection circuit is electrically connected with the substrate, the electronic component is arranged on the second side surface, and the electronic component is electrically connected with the connection circuit.
Optionally, the substrate is provided with a mounting groove, the interposer includes a first end and a second end that are disposed opposite to each other, the first end is accommodated in the mounting groove, the second end is exposed in the mounting groove, and the electronic component is disposed at the second end.
Optionally, the adapter plate and the substrate are integrally formed.
Optionally, the interposer includes a first section and a second section connected to the first section at an included angle, the electronic component is disposed on a side of the first section close to the second section, and the second section is connected to the substrate.
Optionally, the package structure of the electronic component further includes an insulating package, and the insulating package encapsulates the electronic component.
The utility model discloses electronic component's packaging structure includes base plate and electronic component, and the base plate has relative first surface and the second surface that sets up, and electronic component locates the first surface, through setting up electronic component to platelike structure, because electronic component locates the base plate along the direction of perpendicular to base plate to be connected with the base plate electricity, avoid with the range upon range of base plate of locating electronic component, can improve electronic component's integrated density greatly, because electronic component is high with the density of base plate connection, thereby the encapsulation is small. In addition, the installation is simple without the need of wire bonding or lead frame method.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an embodiment of an electronic device package structure according to the present invention;
fig. 2 is a top view of the package structure of the electronic device in fig. 1;
fig. 3 is a schematic structural diagram of another embodiment of the electronic device package structure according to the present invention;
fig. 4 is a top view of the package structure of the electronic device in fig. 3;
fig. 5 is a schematic structural diagram of another embodiment of the electronic device package structure according to the present invention;
fig. 6 is a schematic structural diagram of a package structure of an electronic component according to still another embodiment of the present invention;
FIG. 7 is a schematic structural diagram of the electronic component of FIG. 6;
fig. 8 is a schematic structural diagram of a further embodiment of the electronic device package structure according to the present invention;
fig. 9 is a schematic structural diagram of the adapter plate of the present invention.
The reference numbers illustrate:
the objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as upper, lower, left, right, front and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In the present application, unless expressly stated or limited otherwise, the terms "connected" and "fixed" are to be construed broadly, e.g., "fixed" may be fixedly connected or detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.
In addition, descriptions in the present application as to "first", "second", and the like are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit to the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides an electronic component's packaging structure.
Referring to fig. 1 to 8, in an embodiment of the present invention, the electronic device package structure includes:
a substrate 10, the substrate 10 having a first surface 11 and a second surface 13 oppositely disposed; and
the electronic component 30 is disposed on the first surface 11, the electronic component 13 is a plate-shaped structure, and the electronic component 30 is disposed on the substrate 10 along a direction perpendicular to the substrate 10 and electrically connected to the substrate 10.
Specifically, the substrate 10 is suitable for being mounted on a circuit board or a motherboard, the substrate 10 is made of an insulating polymer material, a conductive layer is disposed inside the substrate, the electronic component 30 is disposed on the first surface 11 and electrically connected to the conductive layer, a pad or a wire connected to the circuit board or the motherboard is disposed on the second surface 13, and the pad or the wire is electrically connected to the conductive layer. It is within the scope of the present disclosure that the electronic component 30 may be directly electrically connected to the substrate 10 or indirectly electrically connected to the substrate 10.
The electronic component 13 is in a plate-shaped structure, and the electronic component 30 is disposed on the substrate 10 along a direction perpendicular to the substrate 10, it can be understood that, since the dimension of the electronic component 13 along the direction perpendicular to the substrate 10 is smaller than the dimension thereof along the direction parallel to the substrate 10, more electronic components 30 can be mounted on the surface of the substrate 10 to a greater extent, thereby increasing the integration density of the electronic components 30. The electronic component 30 is a component 31 and/or a chip 33, the component 31 may be a resistor, a capacitor, or other parts, and the chip 33 may be a chip connected to the substrate 10 through a wire bonding process or a chip connected to the substrate 10 through a flip chip packaging process.
The utility model discloses electronic component's packaging structure includes base plate 10 and electronic component 30, base plate 10 has relative first surface 11 and the second surface 13 that sets up, first surface 11 is located to electronic component 30, set up to platelike structure through with electronic component 30, because electronic component 30 locates base plate 10 along the direction of perpendicular to base plate 10, and be connected with base plate 10 electricity, avoid with electronic component 30 range upon range of locating base plate 10, can improve electronic component 30's integrated density greatly, because electronic component 30 is high with the density that base plate 10 is connected, thereby the encapsulation is small. In addition, the installation is simple without the need of wire bonding or lead frame method.
Referring to fig. 6 and 7, in an embodiment, in order to further reduce the package volume, the first surface 11 is provided with a groove 111, the electronic component 30 is a chip 33, and the chip 33 is inserted into the groove 111 and electrically connected to the substrate 10. The electrical connection may be achieved by providing a pad or a wire on the inner wall of the groove 111 to electrically connect with the substrate 10, or by other means.
Furthermore, in order to ensure the reliability of the electrical connection between the substrate 10 and the chip 33, a pin 331 is disposed at one end of the chip 33 close to the groove 111, an elastic member 15 is disposed on an inner wall of the groove 111, and the chip 33 is in contact with the elastic member 15 through the pin 331 to achieve the electrical connection with the substrate 10. The elastic member 15 may be a metal sheet, the chip 33 may concentrate the pins 331 to one side and then be inserted into the substrate 10, and the elastic member 15 fixes the chip 33 and is tightly connected to the pins 331.
Referring to fig. 8, in another embodiment, in order to further reduce the package volume, a receiving groove 113 is formed on the first surface 11, the electronic component 30 is a component 31 and a chip 33, and the chip 31 is disposed on a bottom wall of the receiving groove 113 and electrically connected to the substrate 10;
the component 31 is disposed on the sidewall of the accommodating groove 113 and electrically connected to the substrate 10.
In this embodiment, the cross-sectional dimension of the receiving groove 113 is larger than the cross-sectional dimension of the chip 31, the chips 31 may be disposed in a plurality of numbers and stacked on the bottom wall of the receiving groove 113, and the planes of the uppermost ends of the chips 31 and the uppermost ends of the components 31 cannot exceed the edge of the substrate 10, so as to facilitate packaging.
Referring to fig. 1 to 5 and 9, the electronic component packaging structure further includes an interposer 50, the interposer 50 is a plate-shaped structure, the interposer 50 is disposed on the substrate 10 along a direction perpendicular to the substrate 10, the interposer 50 has a first side surface 51 and a second side surface 53 disposed opposite to each other, the first side surface 51 is provided with a connection circuit 511, the connection circuit 511 is electrically connected to the substrate 10, the electronic component 30 is disposed on the second side surface 53, and the electronic component 30 is electrically connected to the connection circuit 511.
In this embodiment, a plurality of the interposer 50 may be disposed, and one electronic component 30 may be disposed on the second side 53 of each interposer 50, or a plurality of electronic components 30 may be disposed at intervals, and the electronic components 30 are disposed on the second side 53 along a direction perpendicular to the substrate 10, so as to further reduce the package volume. Since the interposer 50 is inserted to block a partial region of the substrate 10, it is necessary to provide a partial passage and to perform rewiring as locally as possible. The first side 51 is provided with a connection circuit 511, and the specific structure of the connection circuit 511 is determined according to the number of pins and the mounting position of the electronic component 30. The connection circuit 511 is electrically connected to the substrate 10, and the connection circuit 511 may be electrically connected to a conductive layer on the substrate 10. The electronic component 30 is electrically connected to the connection circuit 511 in such a manner that a pad or a wire is provided.
The interposer 50 may be made of a heat conductive and insulating material (e.g., a partially ceramic material) and partially molded, wherein molding means covering a designated area with a molding compound, that is, encapsulating an area of the electronic component 30 on the interposer 50, and exposing a portion where the electronic component 30 is not mounted, so as to enhance heat dissipation.
Further, in order to further reduce the installation volume, the substrate 10 is provided with an installation groove 115, the interposer 50 includes a first end 55 and a second end 57 which are oppositely disposed, the first end 55 is accommodated in the installation groove 115, the second end 57 is exposed out of the installation groove 115, the electronic component 30 is disposed at the second end 57, that is, the electronic component 30 is exposed out of the installation groove 115, so that the electronic component 30 is conveniently installed on the substrate 10.
Referring to fig. 3 and 4, in another embodiment, an interposer 50 is integrally formed with the substrate 10. In this case, since the interposer 50 is not isolated from the substrate 10, the length of the interposer 50 can be much longer than that of the plug-in mounting method, and heat can be dissipated more efficiently. The adapter plate 50 is made of the same material as the substrate 10, and is formed by injection molding and integral molding for cost saving, and in addition, the adapter plate 50 can be formed by secondary casting and electroplating on the manufactured substrate 10.
Referring to fig. 5, in another embodiment, the interposer 50 includes a first section 58 and a second section 59 connected to the first section 58 at an included angle, the electronic component 30 is disposed on a side of the first section 58 close to the second section 59, and the second section 59 is connected to the substrate 10.
In this embodiment, the interposer 50 and the substrate 10 may be integrally formed or separately formed, and all within the protection scope of this patent, the interposer 50 includes a first section 58 and a second section 59 connected to the first section 58 at an included angle, that is, the interposer 50 is in an L-shaped configuration, and the lateral pins of the electronic component 30 can be transferred to the bottom surface of the interposer 50 and then connected to the substrate 10, so as to further reduce the installation space.
Further, the package structure of the electronic component further includes an insulating package (not shown) that covers the electronic component 30. In this embodiment, the insulating package is made of a resin material, which protects the electronic component 30 and prevents the electronic component 30 from being damaged and affecting the normal use of the electronic component 30.
The above only is the preferred embodiment of the present invention, not limiting the scope of the present invention, all the equivalent structure changes made by the contents of the specification and the drawings under the inventive concept of the present invention, or the direct/indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. An electronic component package structure, comprising:
a substrate having a first surface and a second surface disposed opposite to each other; and
the electronic element is arranged on the first surface, is of a plate-shaped structure, is arranged on the substrate along a direction perpendicular to the substrate and is electrically connected with the substrate.
2. The electronic component package structure according to claim 1, wherein the electronic component is a component and/or a chip.
3. The electronic component package structure according to claim 2, wherein the first surface has a groove, the electronic component is a chip, and the chip is inserted into the groove and electrically connected to the substrate.
4. The electronic component package structure according to claim 3, wherein a pin is disposed at an end of the chip close to the groove, an elastic member is disposed on an inner wall of the groove, and the chip is abutted against the elastic member through the pin to achieve electrical connection with the substrate.
5. The package structure of an electronic component according to claim 2, wherein the first surface is provided with a receiving groove, the electronic component is a component and a chip, and the chip is disposed on a bottom wall of the receiving groove and electrically connected to the substrate;
the component is arranged on the side wall of the accommodating groove and is electrically connected with the substrate.
6. The electronic component packaging structure according to any one of claims 1 to 5, further comprising an interposer, wherein the interposer is a plate-shaped structure, the interposer is disposed on the substrate along a direction perpendicular to the substrate, the interposer has a first side and a second side opposite to each other, the first side is provided with a connection circuit, the connection circuit is electrically connected to the substrate, the electronic component is disposed on the second side, and the electronic component is electrically connected to the connection circuit.
7. The package structure of electronic components of claim 6, wherein the substrate has a mounting slot, the interposer includes a first end and a second end opposite to each other, the first end is received in the mounting slot, the second end is exposed from the mounting slot, and the electronic component is disposed at the second end.
8. The electronic component package structure of claim 6, wherein the interposer is integrally formed with the substrate.
9. The package structure of electronic components of claim 6, wherein the interposer includes a first section and a second section connected to the first section at an included angle, the electronic component is disposed on a side of the first section adjacent to the second section, and the second section is connected to the substrate.
10. The package structure of an electronic component according to claim 1, further comprising an insulating package, wherein the insulating package encapsulates the electronic component.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922209629.8U CN210722994U (en) | 2019-12-10 | 2019-12-10 | Packaging structure of electronic element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922209629.8U CN210722994U (en) | 2019-12-10 | 2019-12-10 | Packaging structure of electronic element |
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| Publication Number | Publication Date |
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| CN210722994U true CN210722994U (en) | 2020-06-09 |
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| CN201922209629.8U Active CN210722994U (en) | 2019-12-10 | 2019-12-10 | Packaging structure of electronic element |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113380669A (en) * | 2021-05-12 | 2021-09-10 | 赵赛赛 | Intelligent packaging equipment and packaging method for frequency components |
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2019
- 2019-12-10 CN CN201922209629.8U patent/CN210722994U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113380669A (en) * | 2021-05-12 | 2021-09-10 | 赵赛赛 | Intelligent packaging equipment and packaging method for frequency components |
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