CN210693921U - WiFi module circuit of tablet computer - Google Patents

Abstract

The utility model relates to the technical field of a WiFi module of a tablet personal computer, and discloses a WiFi module circuit of a tablet personal computer with a simpler and more convenient operating system and complete data transmission, which comprises a controller, an oscillator and a radio frequency circuit, wherein the signal input end of the controller is connected with the signal output end of a host, and the controller is used for receiving data signals output by the host and packaging the data signals input by the host into frames; the signal output end of the oscillator is coupled to the clock signal input end of the controller and inputs the clock signal into the controller, and the signal input end of the radio frequency circuit is coupled to the radio frequency end of the controller; and the chip selection signal end of the controller is connected with the signal output end of the host, and if the signal input into the chip selection signal end is at a low level, the low level triggers the radio frequency circuit to transmit the data signal which is packaged into a frame by the controller.

Description

WiFi module circuit of tablet computer

Technical Field

The utility model relates to a panel computer wiFi module technical field, more specifically say, relate to a wiFi module circuit of panel computer.

Background

The Wi-Fi module is also called a serial port Wi-Fi module, belongs to an internet of things transmission layer, and has the function of converting a serial port or TTL level into an embedded module which accords with a Wi-Fi wireless network communication standard, and a built-in wireless network protocol IEEE802.11b.g.n protocol stack and a TCP/IP protocol stack. At present, an embedded system takes a processor as a core, has a similar architecture with a general-purpose computer, and has a software which can be large or small, but has a high requirement on real-time performance mostly, and the use of an operating system is complex, so that a part of data signals input by a host computer is lost, and the integrity of data transmission is not facilitated.

Therefore, how to implement a simpler operating system and maintain the integrity of data transmission becomes a technical problem that needs to be solved by those skilled in the art.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model lies in, to the comparatively complicated and lower defect of system safety of the above-mentioned operating system of prior art, provide the wiFi module circuit of the complete panel computer of a simpler and more convenient and data transmission of operating system.

The utility model provides a technical scheme that its technical problem adopted is: a WiFi module circuit of a tablet computer is constructed, and the WiFi module circuit comprises:

the signal input end of the controller is connected with the signal output end of a host, and the controller is used for receiving the data signal output by the host and packaging the data signal input by the host into a frame;

the oscillator is used for generating a clock signal, and a signal output end of the oscillator is coupled to a clock signal input end of the controller and inputs the clock signal into the controller so as to drive the controller to work;

a signal input end of the radio frequency circuit is coupled to a radio frequency end of the controller;

and a chip selection signal end of the controller is connected with a signal output end of the host, and if a signal input into the chip selection signal end is a low level, the low level triggers the radio frequency circuit to transmit the data signal which is packaged into a frame by the controller.

In some embodiments, a signal input terminal of the controller is connected to a signal output terminal of the rf circuit, and when the rf circuit receives a signal, the controller performs frame decapsulation according to input data.

In some embodiments, the circuit further comprises a first resistor, a first capacitor and a second capacitor,

one end of the first resistor is connected with the high level end, the other end of the first resistor is coupled with the power input end of the controller,

and the first capacitor is connected with the power input end of the controller after being connected with the second capacitor in parallel.

In some embodiments, the RF circuit includes a third capacitor, a fourth resistor, and a fourth capacitor,

the third capacitor and the fourth capacitor are connected in parallel with the fourth resistor,

one end of the fourth capacitor and one end of the fourth resistor are connected with the radio frequency end of the controller,

and one end of the third capacitor and the other end of the fourth resistor are respectively connected with one end of the antenna.

In some embodiments, the SPI interface data input end of the controller is connected with the data output end of the host through a thirteenth resistor,

and the SPI interface data output end of the controller is connected with the data input end of the host through a fifteenth resistor.

In some embodiments, further comprising a power supply circuit, the power supply circuit comprising a second controller,

the power input end of the second controller is connected with a 5V power end, and the power output end of the second controller is coupled to the power input end of the controller for connection.

The WiFi module circuit of the tablet computer of the present invention comprises a controller, an oscillator and a radio frequency circuit, wherein the controller is used for receiving data signals output by the host and packaging the data signals input by the host into a frame; the signal output end of the oscillator is coupled with the clock signal input end of the controller and inputs the clock signal into the controller so as to drive the controller to work; the signal input end of the radio frequency circuit is coupled with the signal output end of the controller; and the chip selection signal end of the controller is connected with the signal output end of the host, and if the signal input into the chip selection signal end is at a low level, the low level triggers the radio frequency circuit to transmit the data signal which is packaged into a frame by the controller. Compared with the prior art, the controller can package the input data into frames and send the frames through the radio frequency circuit, so that the integrity of data transmission is realized; on the other hand, when software is transplanted, the software can be modified according to the change, increase and decrease of system hardware, the functional design and operation are simpler, and the cost of the system is favorably controlled.

Drawings

The invention will be further explained with reference to the drawings and examples, wherein:

fig. 1 is a partial circuit diagram of an embodiment of a WiFi module circuit of a tablet computer provided by the present invention;

fig. 2 is a power circuit diagram of an embodiment of the WiFi module circuit of the tablet computer provided by the present invention.

Detailed Description

In order to clearly understand the technical features, objects, and effects of the present invention, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Fig. 1 is a partial circuit diagram of an embodiment of a WiFi module circuit of a tablet computer provided by the present invention; fig. 2 is a power circuit diagram of an embodiment of the WiFi module circuit of the tablet computer provided by the present invention. As shown in fig. 1 and fig. 2, in the first embodiment of the WiFi module circuit of the tablet computer of the present invention, the WiFi module circuit of the tablet computer includes a WiFi interface circuit 100 and a power circuit 200.

The WiFi interface circuit 100 is a passive serial device (such as a mobile phone) networking system, and all devices in the system are in a passive connection waiting state all the time. Namely, the background server actively initiates the connection with the serial device and carries out the mode of requesting or downloading data.

The power circuit 200 converts the input 5V voltage into a 3.3V dc voltage to provide a working power supply for the WiFi interface circuit 100.

Specifically, the WiFi interface circuit 100 mainly includes a controller U1, an oscillator Y1, and a radio frequency circuit 101.

The controller U1 is an embedded high performance compatible processor with a frequency of 128MHZ and is compatible with the ARM932 bit instruction set, having a data line with a bit width of 32 bits, for computing and processing data signals input by the host computer. Specifically, the controller U1 can encapsulate the input data signal into frames and transmit them, and when receiving the data signal, the controller U1 decapsulates the frames, thereby implementing the functions of data transmission integrity, maintaining the MAC protocol, addressing the MAC frames, and the like.

The oscillator Y1 is used to generate a clock signal and input the clock signal to the controller U1 to provide the clock signal required by the controller U1.

The rf circuit 101 is an essential module in the wireless communication terminal, and is responsible for modulating a baseband signal to an rf signal, transmitting the rf signal through an antenna, receiving the rf signal from the antenna, amplifying, filtering, and performing frequency conversion on the rf signal to a baseband signal for signal processing.

Specifically, a signal input end (corresponding to the g.spi-SDI end) of the controller U1 is connected to a signal output end (corresponding to the SPI-MOSIO end) of the host (i.e., the tablet computer), and is configured to receive the data signal output by the host and encapsulate the data signal input by the host into frames.

In other words, the encapsulation framing is to add a header and a trailer before and after a piece of data, respectively, to form a frame, and the header and the trailer play a role of frame delimitation. For example, a control word SOH of data is placed at the head of a frame to indicate the beginning of the frame; another control character EOT indicates the end of the frame to form a complete data chain.

The oscillator Y1 is used to generate a clock signal, which oscillates at a frequency of 128 MHZ.

The power input end of the oscillator Y1 is connected with 3.3V voltage, so that the oscillator Y1 starts oscillation, and further a clock signal is generated.

Specifically, the signal output terminal (corresponding to the CLKOUT terminal) of the oscillator Y1 is coupled to the clock signal input terminal (corresponding to the SLEEP-CLK terminal) of the controller U1, and inputs the clock signal to the controller U1 to drive the controller U1 to operate.

Further, a signal input terminal of the rf circuit 101 is coupled to a rf terminal (corresponding to the RFPORT terminal) of the controller U1, and the controller U1 inputs the framed data signal to the rf circuit 101.

The chip selection signal end (corresponding to the g.spi-SCSn end) of the controller U1 is connected to the signal output end (corresponding to the GPF5 end) of the host, and if the signal input to the chip selection signal end is at a low level, the low level triggers the radio frequency circuit 101 to transmit a data signal encapsulated by the controller U1 to the outside.

For example, a voltage greater than 3.3V is specified as a high level, representing 1; a voltage of less than 0.3V is set to a low level, indicating 0.

Data signals input by a host are packaged into frames through the controller U1, then the data signals are modulated to radio frequency by the radio frequency circuit 101, and then the data signals are transmitted out through an antenna, so that data integrity is realized; on the other hand, when software is transplanted, the software can be modified according to the change, increase and decrease of system hardware, the functional design and operation are simpler, and the cost of the system is favorably controlled.

In some embodiments, the signal input of the controller U1 is coupled to the signal output of the rf circuit 101, and the controller U1 is capable of performing frame decapsulation based on incoming data when the rf circuit 101 receives data signals.

In some embodiments, in order to improve the signal quality of the input circuit, a first resistor R1, a first capacitor C1 and a second capacitor C2 may be disposed in the circuit. The first capacitor C1 and the second capacitor C2 have a filtering function.

Specifically, one end of the first resistor R1 is connected to the high level (3.3V) terminal, and the other end of the first resistor R1 is coupled to the power input terminal (corresponding to VDD-SHI) of the controller U1.

The first capacitor C1 is connected in parallel with the second capacitor C2, and then connected to the power input terminal (corresponding to VDD-SHI) of the controller U1.

The 3.3V voltage passes through the filter circuit formed by the first resistor R1, the first capacitor C1 and the second capacitor C2, so that the voltage input to the controller U1 is smoother.

In some embodiments, the rf circuit 101 includes a third capacitor C3, a fourth resistor R4, and a fourth capacitor C4.

Specifically, the third capacitor C3 and the fourth capacitor C4 are connected in parallel with the fourth resistor R4.

One end of the fourth capacitor C4 and one end of the fourth resistor R4 are connected to the rf port (corresponding to the RFPORT end) of the controller U1.

One end of the third capacitor C3 and the other end of the fourth resistor R4 are connected to one end of the antenna (corresponding to pin 1 of RF-COND).

That is, the data signal outputted from the controller U1 is modulated to the radio frequency by the circuit composed of the third capacitor C3, the fourth capacitor C4 and the fourth resistor R4, and is transmitted from the antenna (corresponding to pin 1 of RF-COND).

The externally transmitted signal is also input to the controller U1 through the rf port (corresponding to the RFPORT terminal) for further demodulation.

In some embodiments, the SPI interface data input (corresponding to g.spi-SDI) of the controller U1 is connected to the data output (corresponding to SPI-MOSIO) of the host through a thirteenth resistor R13.

The SPI interface data output (corresponding to g.spi-SDO) of the controller U1 is connected to the data input (corresponding to SPI-MISOO) of the host through a fifteenth resistor R15.

The SPI is a Serial Peripheral Interface (Serial Peripheral Interface), a WiFi circuit and a control layer are completely separated from hardware, seamless connection between the WiFi circuit and a host can be realized through an SDIO or SPI Interface in design, and implantation of an operating system is facilitated.

In some embodiments, the power circuit 200 includes a second controller U2, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, and a fifteenth capacitor C15.

Specifically, the twelfth capacitor C12 is connected in parallel with the thirteenth capacitor C13, and the 5V power is filtered by the twelfth capacitor C12 and the thirteenth capacitor C13 and then input to the power input terminal of the second controller U2.

The fourteenth capacitor C14 and the fifteenth capacitor C15 are connected in parallel to the power output terminal of the second controller U2, the 5V power is regulated by the second controller U2 and then converted into 3.3V, and the 3.3V voltage is input to the power input terminals of the controller U1 and the oscillator Y1 after passing through the fourteenth capacitor C14 and the fifteenth capacitor C15, so as to provide working power for the controller U1 and the oscillator Y1.

While the embodiments of the present invention have been described with reference to the accompanying drawings, the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many modifications may be made by one skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.

Claims (6)

1. The utility model provides a wiFi module circuit of panel computer which characterized in that possesses:

the signal input end of the controller is connected with the signal output end of a host, and the controller is used for receiving the data signal output by the host and packaging the data signal input by the host into a frame;

the oscillator is used for generating a clock signal, and a signal output end of the oscillator is coupled to a clock signal input end of the controller and inputs the clock signal into the controller so as to drive the controller to work;

a signal input end of the radio frequency circuit is coupled to a radio frequency end of the controller;

and a chip selection signal end of the controller is connected with a signal output end of the host, and if a signal input into the chip selection signal end is a low level, the low level triggers the radio frequency circuit to transmit the data signal which is packaged into a frame by the controller.

2. The WiFi module circuit of claim 1,

and the signal input end of the controller is connected with the signal output end of the radio frequency circuit, and when the radio frequency circuit receives a signal, the controller carries out frame decapsulation according to input data.

3. The WiFi module circuit of claim 2,

also includes a first resistor, a first capacitor and a second capacitor,

one end of the first resistor is connected with the high level end, the other end of the first resistor is coupled with the power input end of the controller,

and the first capacitor is connected with the power input end of the controller after being connected with the second capacitor in parallel.

4. The WiFi module circuit of claim 3,

the radio frequency circuit comprises a third capacitor, a fourth resistor and a fourth capacitor,

the third capacitor and the fourth capacitor are connected in parallel with the fourth resistor,

one end of the fourth capacitor and one end of the fourth resistor are connected with the radio frequency end of the controller,

and one end of the third capacitor and the other end of the fourth resistor are respectively connected with one end of the antenna.

5. The WiFi module circuit of claim 1,

the SPI interface data input end of the controller is connected with the data output end of the host machine through a thirteenth resistor,

and the SPI interface data output end of the controller is connected with the data input end of the host through a fifteenth resistor.

6. The WiFi module circuit of claim 1,

also includes a power supply circuit including a second controller,

the power input end of the second controller is connected with a 5V power end, and the power output end of the second controller is coupled to the power input end of the controller for connection.

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