CN210665963U - EC fan start failure detection system - Google Patents
EC fan start failure detection system Download PDFInfo
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- CN210665963U CN210665963U CN201921202707.5U CN201921202707U CN210665963U CN 210665963 U CN210665963 U CN 210665963U CN 201921202707 U CN201921202707 U CN 201921202707U CN 210665963 U CN210665963 U CN 210665963U
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Abstract
The utility model discloses a system for detecting the start failure of an EC fan, which comprises the EC fan, a lower computer, an upper computer and a database; the lower computer comprises a single chip microcomputer, an electromagnetic relay and an RS485 communication chip; the upper computer is used for recording the starting and stopping times of the EC fan; the database is used for storing FG signal data of all EC fans; the single chip microcomputer controls the fan to be started and stopped repeatedly through an electromagnetic relay, collects the FG signal data of the EC fan, communicates with the upper computer through an RS485 communication chip, and sends the collected FG signal data of the EC fan to the upper computer; the upper computer receives the data sent by the lower computer, stores the data in a database and displays the data on a monitoring interface according to the corresponding position number of the lower computer; and the upper computer analyzes the data stored in the database to obtain the failure times of the EC fan in the repeated starting and stopping process. The utility model discloses with low costs, simple and practical, can evaluate the EC fan in the short time and open the failure number of times that stops the in-process repeatedly.
Description
Technical Field
The utility model relates to a motor detection area, concretely relates to EC fan start failure detecting system.
Background
The EC fan (permanent magnet brushless motor) has excellent speed regulation performance similar to that of a direct current motor, overcomes the defects of low reliability and the like of a reversing spark caused by a mechanical reversing device adopted by the direct current motor, has high operation efficiency, small volume and light weight, and is widely applied to the fields of aerospace, electric vehicles, medical instruments, instruments and meters, servo systems, numerical control machines, military equipment, chemical engineering, light spinning, modern household appliances and the like. Along with the continuous improvement of the cost performance of rare earth permanent magnet materials and the continuous progress of power electronic technology and microelectronic technology, the application of permanent magnet brushless motors is increasingly popularized.
At present, an EC fan has a starting failure phenomenon due to technical limitation, and the detection of the starting failure rate of the fan can be used as one of indexes for product reliability evaluation;
chinese patent (CN207164220U) discloses an automatic factory testing device for EC motors/fans, which comprises a dc resistance testing unit, an insulation resistance testing unit, a no-load/load testing unit, a back electromotive force testing unit, an ac/dc withstand voltage testing unit, an industrial personal computer and a power supply. The industrial personal computer controls starting, closing and running parameters of the direct current resistance testing unit, the insulation resistance testing unit, the no-load/load testing unit, the counter potential testing unit and the alternating current/direct current withstand voltage testing unit, and receives output data of the direct current resistance testing unit, the insulation resistance testing unit, the no-load/load testing unit, the counter potential testing unit and the alternating current/direct current withstand voltage testing unit. Two sets of no-load/load measuring instruments are used, so that the input end and the output end of the EC fan/motor controller can simultaneously acquire data, and the timeliness of data acquisition is improved. The whole system realizes the automatic control of the whole complete machine test process of the EC motor/fan and the automatic feedback of the test result, and avoids the management hidden danger and the safety hidden danger of manual detection.
The conventional EC fan controller MCU does not develop an automatic fault recording program, can not record the starting failure times of the fan in the starting process, if the EC fan can be started unsuccessfully, a pulse signal with a specific width is output through the FG signal end of the controller to serve as a fault signal, the fan is controlled to be started repeatedly, and the pulse signal output by the FG signal end of the controller is collected, so that the starting failure rate of the fan can be obtained.
Therefore, the present technology is yet to be further improved to provide a low-cost, simple and practical EC fan start-up failure detection system capable of evaluating the start-up failure rate of an EC fan in a short time.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome above-mentioned prior art not enough, provide a with low costs, simple and practical, can assess the EC fan start failure rate's in the short time EC fan start failure detecting system.
In order to achieve the above purpose, the technical scheme of the utility model realizes as follows: a system for detecting the starting failure of an EC fan comprises the EC fan, a lower computer, an upper computer and a database;
the lower computer comprises a single chip microcomputer, an electromagnetic relay and an RS485 communication chip;
the upper computer is used for displaying and recording the starting and stopping times of the EC fan;
the database is used for storing FG signal data of all EC fans;
the system comprises a singlechip, an upper computer, a lower computer, a data base and a data base, wherein the singlechip controls an EC fan to be repeatedly started and stopped through an electromagnetic relay, acquires FG (signal data), communicates with the upper computer through an RS485 communication chip and sends the acquired FG signal data to the upper computer, the upper computer stores the received FG signal data of the EC fan in the data base after receiving the FG signal data of the EC fan sent by the lower computer and displays the FG signal data on a monitoring interface according to a corresponding lower computer position number, and the upper computer analyzes all the FG signal data of the EC fan stored in the data base to obtain the failure times of the EC fan in the repeated starting and stopping process.
Preferably, the lower computer further comprises a controller FG signal end, and when the EC fan fails to start, the controller FG signal end outputs a pulse signal with a specific width as a fault signal.
Preferably, the single chip microcomputer controls the EC fan to be started and stopped repeatedly through an electromagnetic relay, and pulse signals output by an FG signal end of the controller are collected.
Preferably, the lower computer further comprises an FG signal isolation transmission module; the FG signal isolation transmission module comprises electrical elements SL1, RS1 and DL 2; the SL1 is an optical coupler, and an EC fan FG signal is input to an I/O port of the single chip microcomputer after being subjected to photoelectric isolation; the RS1 is an adjustable potentiometer and is adjusted according to the FG signal voltage of the EC fan; DL2 is a light emitting diode and is used for indicating whether the EC fan has FG signal output.
Preferably, the lower computer further comprises a power supply module comprising electrical elements DF1, UZ1, CA1, C1, DL1 and R1; the DF1 is a polarity protection diode for preventing the positive electrode and the negative electrode of the input end of the power supply from being reversely connected; the UZ1 is a three-terminal voltage regulator, and regulates the voltage of an external input power supply into 5V direct current voltage; the CA1 and the C1 are 5V direct-current voltage filter capacitors, and the DL1 is a power supply indication light-emitting diode; and the R1 is a current-limiting resistor of DL 1.
Preferably, the single chip microcomputer comprises electric elements UH1, C2, C3, R5, C4, C5 and XTAL 1; UH1 is STC89C52RC chip, C3 and R5 constitute the power-on reset circuit of the singlechip; the C2 is a filter capacitor of a power supply of the singlechip; and the C4, the C5 and the XTAL1 form a singlechip crystal oscillator circuit.
Preferably, the single chip microcomputer further comprises a pin P0.4; the electromagnetic relay is a JD1 electromagnetic relay, and the JD1 electromagnetic relay comprises an optocoupler SL2, a light-emitting diode DL3, a COM end, a NO end and an NC end; the singlechip control signal is output to a pin 1 of the optical coupler SL2 through a pin P0.4 of an I/0 port, when the pin P0.4 is at a high level, the optical coupler SL2 works, the light-emitting diode DL3 is lightened, at the moment, an internal coil of the JD1 electromagnetic relay is electrified, the JD1 electromagnetic relay is attracted, a COM end and a NO end are connected, and a COM end and an NC end are disconnected; when P0.4 is at low level, the optical coupler SL2 does not work, the light emitting diode DL3 is extinguished, NO current passes through the coil in the JD1 electromagnetic relay, the JD1 electromagnetic relay is disconnected, the COM end and the NC end are connected, and the COM end and the NO end are disconnected.
Preferably, the lower computer further comprises an RS485 communication module, and the RS485 communication module comprises electric elements UT1 and C6; the UT1 is a MAX485 chip; the MAX485 chip comprises a driver and a receiver, and an RO end, a DI end, a/RE end and a DE end are arranged on the MAX485 chip; the RO terminal and the DI terminal are respectively the output of the receiver and the input terminal of the driver; the single chip microcomputer is provided with an RXD end and a TXD end, and when the MAX485 chip is connected with the single chip microcomputer, the RO end and the DI end are respectively connected with the RXD end and the TXD end of the single chip microcomputer; the RE end and the DE end are respectively an enabling end for receiving and sending; when the/RE end is logic 0, the MAX485 chip is in a receiving state; when the DE terminal is logic 1, the MAX485 chip is in a sending state.
Preferably, the upper computer is written by using a Visual Basic language, the upper computer and the lower computer adopt master-slave structure distributed monitoring, and serial communication between the upper computer and the lower computer is realized by using Mscomm attribute setting and event response of a communication control Mscomm of Visual Basic 6.0.
Preferably, the upper computer communicates with the lower computer in sequence in a polling mode, and after the upper computer receives the data sent by the lower computer, the data are displayed on a monitoring interface according to the corresponding position number of the lower computer; when the monitoring software is opened, the upper computer establishes an Excel table at a designated position, and periodically records all pulse width data according to the set data recording frequency.
Advantageous effects
Compared with the prior art, the utility model discloses the beneficial effect who gains does: the utility model comprises an EC fan, a lower computer, an upper computer and a database; the lower computer comprises a single chip microcomputer, an electromagnetic relay and an RS485 communication chip; the single chip microcomputer controls the repeated start and stop of the EC fans through an electromagnetic relay, and FG signals of a plurality of EC fan products can be collected simultaneously; the upper computer Visual Basic language is simple and practical; the system comprises a singlechip, an upper computer, a lower computer, a data base and a data base, wherein the singlechip controls an EC fan to be repeatedly started and stopped through an electromagnetic relay, acquires the FG (signal data) of the EC fan, communicates with the upper computer through an RS485 communication chip, and sends the acquired FG signal data of the EC fan to the upper computer, the upper computer stores the received FG signal data of the EC fan into the data base after receiving the FG signal data of the EC fan sent by the lower computer, and displays the FG signal data of the EC fan on a monitoring interface according to the corresponding position number of the lower computer, and the upper computer analyzes the FG signal data of the EC fan stored in the data base to obtain the failure times of the EC fan in the repeated starting and stopping process, so that the starting failure rate of the EC fan can be evaluated in a short time, the testing efficiency is improved, the.
Drawings
Fig. 1 is a system block diagram of an EC blower start failure detection system according to the present invention;
fig. 2 is an upper computer interface diagram of an EC blower start failure detection system according to the present invention;
fig. 3 is a lower computer circuit diagram of the system for detecting the start failure of the EC fan according to the present invention.
The reference numbers in the attached figure 3 correspond to the technical characteristics that: 101. a power supply module; 102. a single chip microcomputer; 103, FG signal isolation transmission module; 104. an electromagnetic relay; an RS485 communication module.
Detailed Description
The following describes the present invention with reference to the accompanying drawings.
As shown in fig. 1, a system for detecting the start failure of an EC fan includes an EC fan, a lower computer, an upper computer, and a database;
the lower computer comprises a single chip microcomputer, an electromagnetic relay and an RS485 communication chip;
the lower computer comprises a controller FG (FG), a frequency generator and a signal end, wherein the frequency generator is used for measuring the rotating speed of the EC fan, and when the start of the EC fan fails, the FG signal end of the controller outputs a pulse signal with a specific width as a fault signal.
The single chip microcomputer controls the EC fan to be started and stopped repeatedly through an electromagnetic relay, and pulse signals output by an FG signal end of the controller are collected.
As shown in fig. 3, the lower computer further includes an FG signal isolation transmission module; the FG signal isolation transmission module comprises electrical elements SL1, RS1 and DL 2; the SL1 is an optical coupler, and an EC fan FG signal is input to an I/O port of the single chip microcomputer after being subjected to photoelectric isolation; DL2 is a light emitting diode and is used for indicating whether the EC fan has FG signal output. The RS1 is an adjustable potentiometer, is adjusted according to the FG signal voltage of the EC fan to play a role in voltage division and current limitation, and protects the optical coupler SL1 and the light emitting diode DL 2.
The lower computer further comprises a power supply module, wherein the power supply module comprises electrical elements DF1, UZ1, CA1, C1, DL1 and R1; the DF1 is a polarity protection diode for preventing the positive electrode and the negative electrode of the input end of the power supply from being reversely connected; the UZ1 is a three-terminal voltage regulator, and regulates the voltage of an external input power supply into 5V direct current voltage; the CA1 and the C1 are 5V direct-current voltage filter capacitors, and the DL1 is a power supply indication light-emitting diode; and the R1 is a current-limiting resistor of DL 1.
The single chip microcomputer comprises electric elements UH1, C2, C3, R5, C4, C5 and XTAL 1; UH1 is STC89C52RC (STC89C52RC, chip model) chip, C3 and R5 constitute singlechip power-on reset circuit; the C2 is a filter capacitor of a power supply of the singlechip; and the C4, the C5 and the XTAL1 form a singlechip crystal oscillator circuit.
The described single-chip computer (Microcontrollers) is an integrated circuit chip, and is a small and complete microcomputer system formed by adopting super-large scale integrated circuit technology to integrate the functions of central processing unit CPU with data processing capacity, random access memory RAM, read-only memory ROM, several I/O ports and interrupt system and timer/counter (possibly also including display driving circuit, pulse width modulation circuit, analog multiplexer and A/D converter) into a silicon chip.
The single chip microcomputer further comprises a P0.4 pin; the electromagnetic relay is a JD1 electromagnetic relay, and the JD1 electromagnetic relay comprises an optocoupler SL2, a light-emitting diode DL3, a COM end, a NO end and an NC end; the singlechip control signal is output to a pin 1 of the optical coupler SL2 through a pin P0.4 of an I/0 port, when the pin P0.4 is at a high level, the optical coupler SL2 works, the light-emitting diode DL3 is lightened, at the moment, an internal coil of the JD1 electromagnetic relay is electrified, the JD1 electromagnetic relay is attracted, a COM end and a NO end are connected, and a COM end and an NC end are disconnected; when P0.4 is at low level, the optical coupler SL2 does not work, the light emitting diode DL3 is extinguished, NO current passes through the coil in the JD1 electromagnetic relay, the JD1 electromagnetic relay is disconnected, the COM end and the NC end are connected, and the COM end and the NO end are disconnected.
The electromagnetic relay is an electronic control device, which has a control system (also called input loop) and a controlled system (also called output loop), is usually applied to an automatic control circuit, and is actually an automatic switch for controlling a larger current and a higher voltage by using a smaller current and a lower voltage. Therefore, the circuit plays the roles of automatic regulation, safety protection, circuit conversion and the like.
The lower computer further comprises an RS485 communication module, and the RS485 communication module comprises electric elements UT1 and C6; the UT1 is a MAX485 chip; the MAX485 chip adopts a half-duplex communication mode, the MAX485 chip comprises a driver and a receiver, and an RO end, a DI end, a/RE end and a DE end are arranged on the MAX485 chip; the RO terminal and the DI terminal are respectively the output of the receiver and the input terminal of the driver; the single chip microcomputer is provided with an RXD end and a TXD end, and when the MAX485 chip is connected with the single chip microcomputer, the RO end and the DI end are respectively connected with the RXD end and the TXD end of the single chip microcomputer; the RE end and the DE end are respectively an enabling end for receiving and sending; when/RE is logic 0, the MAX485 chip is in a receiving state; when DE is logic 1, MAX485 chip is in sending state; because MAX485 works in a half-duplex state, only one pin of the single chip microcomputer is needed to control the two pins, the RS485 communication module further comprises an A end and a B end, and the A end and the B end are differential signal ends for receiving and sending respectively. When the level of the pin A is higher than that of the pin B, the transmitted data is 1; when the level of a is lower than that of B terminal, it represents that the transmitted data is 0.
The upper computer is used for recording the starting and stopping times of the EC fan;
the database is used for storing FG signal data of all EC fans;
the upper computer is written by using Visual Basic language (the Visual Basic is a general object-based programming language developed by Microsoft corporation, and is a structured, modular, object-oriented visualization programming language which contains an event-driven mechanism for assisting a development environment), and is simple and practical.
The upper computer and the lower computer adopt master-slave structure distributed monitoring, and serial communication between the upper computer and the lower computer is realized by using attribute setting and event response of a communication control Mscomm (a serial communication control which is used for saving time for programmer serial port communication programming) of Visual Basic 6.0.
The upper computer is sequentially communicated with the lower computer in a polling mode, and after the upper computer receives the data sent by the lower computer, the data are displayed on a monitoring interface according to the position number of the corresponding lower computer; when the monitoring software is opened, the upper computer establishes an Excel table at a specified position, and periodically records all pulse width data according to the set data recording frequency;
as shown in fig. 2, the monitoring interface includes an acquisition control area, time setting, and operation transition state;
as shown in fig. 2, the time setting includes power-on time, power-off time, state of the fan, running timing and number of start-stop times; and inputting seconds at the position of the power-on time and the power-off time of the upper computer, wherein the seconds are decimal, the upper computer communicates with the lower computer according to the numerical value, a signal is sent to the lower computer within the specified time, the lower computer controls the on-off of an electromagnetic relay so as to control the starting and stopping of the fan, and the upper computer records the starting and stopping times of the EC fan.
The upper computer and the database are both the existing upper computer and the existing database.
The working principle of the present invention is described in detail below:
inputting seconds at the position of the power-on time and the power-off time of the upper computer, communicating the single chip microcomputer with the upper computer through an RS485 communication chip, enabling the upper computer to give a signal to the lower computer within a specified time, controlling the EC fan to be started and stopped repeatedly through an electromagnetic relay by the single chip microcomputer of the lower computer, collecting FG signal data of the EC fan, and sending the collected FG signal data of the EC fan to the upper computer; after the upper computer receives the EC fan FG signal data sent by the lower computer, the received EC fan FG signal data is stored in a database, all the EC fan FG signal data is recorded at regular time, and the data is displayed on a monitoring interface according to the corresponding lower computer position number; the upper computer analyzes the FG signal data of all the EC fans stored in the database to obtain the failure times of the EC fans in the repeated starting and stopping process, and the starting failure rate of the EC fans can be calculated in a short time.
The above description is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims; variations and modifications to the above-described embodiments may occur to those skilled in the art, in light of the above teachings and teachings. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and changes to the present invention should fall within the protection scope of the claims of the present invention. Furthermore, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.
Claims (8)
1. The utility model provides a system for detecting the start failure of EC fan which characterized in that: the system comprises an EC fan, a lower computer, an upper computer and a database;
the lower computer comprises a single chip microcomputer, an electromagnetic relay and an RS485 communication chip;
the upper computer is used for displaying and recording the starting and stopping times of the EC fan;
the database is used for storing FG signal data of all EC fans;
the single chip microcomputer controls the EC fan to be started and stopped repeatedly through an electromagnetic relay, collects FG signal data of the EC fan, communicates with the upper computer through an RS485 communication chip, and sends the collected FG signal data of the EC fan to the upper computer; after the upper computer receives the EC fan FG signal data sent by the lower computer, the received EC fan FG signal data is stored in a database and is displayed on a monitoring interface according to the corresponding lower computer position number; and the upper computer analyzes the FG signal data of all the EC fans stored in the database to obtain the failure times of the EC fans in the repeated starting and stopping process.
2. The EC fan start-up failure detection system of claim 1, wherein:
the lower computer further comprises a controller FG signal end, and when the EC fan fails to start, the controller FG signal end outputs a pulse signal with a specific width as a fault signal.
3. The EC fan start-up failure detection system of claim 2, wherein:
the single chip microcomputer controls the EC fan to be started and stopped repeatedly through an electromagnetic relay, and pulse signals output by an FG signal end of the controller are collected.
4. The EC fan start-up failure detection system of claim 1, wherein:
the lower computer also comprises an FG signal isolation transmission module; the FG signal isolation transmission module comprises electrical elements SL1, RS1 and DL 2; the SL1 is an optical coupler, and an EC fan FG signal is input to an I/O port of the single chip microcomputer after being subjected to photoelectric isolation; the RS1 is an adjustable potentiometer and is adjusted according to the FG signal voltage of the EC fan; DL2 is a light emitting diode and is used for indicating whether the EC fan has FG signal output.
5. The EC fan start-up failure detection system of claim 1, wherein:
the lower computer further comprises a power supply module, wherein the power supply module comprises electrical elements DF1, UZ1, CA1, C1, DL1 and R1; the DF1 is a polarity protection diode for preventing the positive electrode and the negative electrode of the input end of the power supply from being reversely connected; the UZ1 is a three-terminal voltage regulator, and regulates the voltage of an external input power supply into 5V direct current voltage; the CA1 and the C1 are 5V direct-current voltage filter capacitors, and the DL1 is a power supply indication light-emitting diode; and the R1 is a current-limiting resistor of DL 1.
6. The EC fan start-up failure detection system of claim 1, wherein:
the single chip microcomputer comprises electric elements UH1, C2, C3, R5, C4, C5 and XTAL 1; UH1 is STC89C52RC chip, C3 and R5 constitute the power-on reset circuit of the singlechip; the C2 is a filter capacitor of a power supply of the singlechip; and the C4, the C5 and the XTAL1 form a singlechip crystal oscillator circuit.
7. The EC fan start-up failure detection system of claim 1, wherein:
the single chip microcomputer further comprises a P0.4 pin; the electromagnetic relay is a JD1 electromagnetic relay, and the JD1 electromagnetic relay comprises an optocoupler SL2, a light-emitting diode DL3, a COM end, a NO end and an NC end; the singlechip control signal is output to a pin 1 of the optical coupler SL2 through a pin P0.4 of an I/0 port, when the pin P0.4 is at a high level, the optical coupler SL2 works, the light-emitting diode DL3 is lightened, at the moment, an internal coil of the JD1 electromagnetic relay is electrified, the JD1 electromagnetic relay is attracted, a COM end and a NO end are connected, and a COM end and an NC end are disconnected; when P0.4 is at low level, the optical coupler SL2 does not work, the light emitting diode DL3 is extinguished, NO current passes through the coil in the JD1 electromagnetic relay, the JD1 electromagnetic relay is disconnected, the COM end and the NC end are connected, and the COM end and the NO end are disconnected.
8. The EC fan start-up failure detection system of claim 1, wherein:
the lower computer further comprises an RS485 communication module, and the RS485 communication module comprises electric elements UT1 and C6; the UT1 is a MAX485 chip; the MAX485 chip comprises a driver and a receiver, and an RO end, a DI end, a/RE end and a DE end are arranged on the MAX485 chip; the RO terminal and the DI terminal are respectively the output of the receiver and the input terminal of the driver; the single chip microcomputer is provided with an RXD end and a TXD end, and when the MAX485 chip is connected with the single chip microcomputer, the RO end and the DI end are respectively connected with the RXD end and the TXD end of the single chip microcomputer; the RE end and the DE end are respectively an enabling end for receiving and sending by the MAX485 chip; when the/RE end is logic 0, the MAX485 chip is in a receiving state; when the DE terminal is logic 1, the MAX485 chip is in a sending state.
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