CN210640719U - Charging and discharging circuit, power management equipment and power utilization system - Google Patents

Charging and discharging circuit, power management equipment and power utilization system Download PDF

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CN210640719U
CN210640719U CN201922152011.2U CN201922152011U CN210640719U CN 210640719 U CN210640719 U CN 210640719U CN 201922152011 U CN201922152011 U CN 201922152011U CN 210640719 U CN210640719 U CN 210640719U
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diode
resistor
interface
triode
electrode
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肖国庆
陈志金
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Shenzhen Jiayu Mechatronic Co ltd
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Shenzhen Jiayu Mechatronic Co ltd
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Abstract

The utility model provides a charge-discharge circuit, power management equipment and power consumption system, relates to the electronic circuit field. In the circuit, an external power interface is respectively connected with a first end of a first resistor and a negative electrode of a first diode, a second end of the first resistor and a positive electrode of the first diode are both connected with a negative electrode of a voltage stabilizing diode, a positive electrode of the voltage stabilizing diode is connected with a base electrode of the first triode, a collector electrode of the first triode is connected with a detection interface and an emitting electrode of the first triode is grounded, a drain electrode of a field effect tube is further connected with a source electrode of the field effect tube, the source electrode of the field effect tube is respectively connected with a first end of a second resistor and a battery interface, a grid electrode of the field effect tube is respectively connected with a second end of the second resistor and a collector electrode of a second triode, a base electrode of the second triode is connected with a first end of a third resistor and an emitting electrode of the second triode is grounded, and. The present disclosure can improve reliability of power management and reduce cost.

Description

Charging and discharging circuit, power management equipment and power utilization system
Technical Field
The disclosure relates to the field of electronic circuits, and particularly relates to a charging and discharging circuit, power management equipment and a power utilization system.
Background
With the development of science and technology, electric equipment such as a gate system and the like is widely applied to various fields. The electric devices may operate by being powered by an external power source, but the external power source may be powered off, so that power management of the electric devices is also receiving more and more attention.
In the prior art, an electric device can be connected in parallel with an external power supply and a battery, and then the external power supply supplies power to the electric device or the battery supplies power to the electric device is manually selected through a switch.
However, the power supply is switched to the battery for power supply when the external power supply is determined to be powered off by manual operation, so that the operation is complex, the cost is high, and the reliability is low.
SUMMERY OF THE UTILITY MODEL
The present disclosure provides a charging and discharging circuit, a power management device and a power system, so as to improve reliability of power management and reduce cost.
In order to achieve the above purpose, the technical scheme adopted by the disclosure is as follows:
in a first aspect, the present disclosure provides a charging and discharging circuit, where the circuit includes an external power interface, a battery interface, a detection interface, a control interface, a first diode, a field effect transistor, a first resistor, a second resistor, a third resistor, a first triode, a second triode, and a zener diode, where the detection interface is configured to output a power-down detection signal, the control interface is configured to receive a discharging control signal, and the discharging control signal is configured to control the battery interface to discharge to the external power interface;
the external power supply interface is respectively connected with a first end of the first resistor and a cathode of the first diode, a second end of the first resistor and an anode of the first diode are both connected with a cathode of the voltage-stabilizing diode, an anode of the voltage-stabilizing diode is connected with a base electrode of the first triode, a collector of the first triode is connected with the detection interface, and an emitter of the first triode is grounded;
the positive electrode of the first diode is further connected with the drain electrode of the field effect transistor, the source electrode of the field effect transistor is respectively connected with the first end of the second resistor and the battery interface, the grid electrode of the field effect transistor is respectively connected with the second end of the second resistor and the collector electrode of the second triode, the base electrode of the second triode is connected with the first end of the third resistor, the emitting electrode of the second triode is grounded, and the second end of the third resistor is connected with the control interface.
Optionally, the circuit further includes a second diode and a third diode, the second diode is connected in series with the first resistor, the third diode is connected in series with the zener diode, the second end of the first resistor is connected with the anode of the second diode, the cathode of the second diode and the anode of the first diode are both connected with the anode of the third diode, and the anode of the third diode is connected with the cathode of the zener diode.
Optionally, the circuit further includes a fourth resistor, one end of the fourth resistor is connected between the base of the first triode and the anode of the zener diode, and the other end of the fourth resistor is connected to the emitter of the first triode.
Optionally, the circuit further includes a fourth diode, the fourth diode is connected in series to the collector terminal of the second triode, the gate of the field effect transistor is connected to the second terminal of the second resistor and the anode of the fourth diode, respectively, and the cathode of the fourth diode is connected to the collector terminal of the second triode.
Optionally, the circuit further includes a fifth resistor, one end of the fifth resistor is connected between the base of the second triode and the first end of the third resistor, and the other end of the fifth resistor is connected to the emitter of the second triode.
In a second aspect, the present disclosure also provides a power management device, in which the circuit according to any one of the first aspect is disposed;
and when the power management equipment determines that the external power interface is powered off according to the power failure detection signal of the detection interface, the power management equipment sends the discharge control signal to the control interface, wherein the discharge control signal is used for controlling the battery interface to discharge to the external power interface.
In a third aspect, the present disclosure further provides an electric system, where the system includes an external power source, an electric device, a battery, and the power management device according to the second aspect, where the external power source and the electric device are respectively connected to the external power source interface, and the battery is connected to the battery interface.
Optionally, the powered device comprises a gate system.
In the embodiment of the present disclosure, the charging and discharging circuit 100 includes an external power interface 101, a battery interface 102, a detection interface 103, a control interface 104, a first diode 105, a fet 106, a first resistor 107, a second resistor 108, a third resistor 109, a first transistor 110, a second transistor 111, and a zener diode 112, where the detection interface 103 is configured to output a power-down detection signal, the control interface 104 is configured to receive a discharge control signal, the external power interface 101 is respectively connected to a first end of the first resistor 107 and a negative electrode of the first diode 105, a second end of the first resistor 107 and a positive electrode of the first diode 105 are both connected to a negative electrode of the zener diode 112, a positive electrode of the zener diode 112 is connected to a base of the first transistor 110, a collector of the first transistor 110 is connected to the detection interface 103 and an emitter of the first transistor is grounded, a positive electrode of the first diode 105 is further connected to a drain of the fet 106, the source of the fet 106 is connected to the first end of the second resistor 108 and the battery interface, the gate of the fet 106 is connected to the second end of the second resistor 108 and the collector of the second transistor 111, the base of the second transistor 111 is connected to the first end of the third resistor 109 and the emitter is grounded, and the second end of the third resistor 109 is connected to the control interface 104. Because the power failure detection signal according to the detection interface 103 can also be used for judging whether the external power supply 200 is powered off or not, and the control interface 104 can receive the discharging control signal, when the voltage of the external power supply interface 101, namely the external power supply 200 is normal, power can be supplied to the battery interface 102 so as to charge the battery 400, and when the external power supply 200 is powered off, the discharging control signal can also be used for discharging to the external power supply interface 101, so that the charging, discharging and power failure detection is realized without manual operation, the reliability of power management is improved, and the cost is reduced.
Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the disclosure. The objectives and other advantages of the disclosure may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
To more clearly illustrate the technical solutions of the present disclosure, the drawings needed for the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present disclosure, and therefore should not be considered as limiting the scope, and those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 shows a schematic structural diagram of a charge and discharge circuit provided by the present disclosure;
fig. 2 shows a schematic structure diagram of another charge and discharge circuit provided by the present disclosure;
fig. 3 shows a schematic structure diagram of another charge and discharge circuit provided by the present disclosure;
fig. 4 shows a schematic structure diagram of another charge and discharge circuit provided by the present disclosure;
fig. 5 shows a schematic structure diagram of another charge and discharge circuit provided by the present disclosure;
FIG. 6 illustrates a block schematic diagram of a power management device provided by the present disclosure;
fig. 7 shows a module schematic diagram of an electric system provided by the present disclosure.
Icon:
100-a charge and discharge circuit; 101-an external power interface; 102-battery interface; 103-a detection interface; 104-a control interface; 105-a first diode; 106-field effect transistor; 107-first resistance; 108-a second resistance; 109-a third resistance; 110-a first triode; 111-a second triode; 112-a zener diode; 113-a second diode; 114-a third diode; 115-fourth resistance; 116-a fourth diode; 117-fifth resistance; 200-external power supply, 300-electric equipment; 400-a battery; 500-power management device.
Detailed Description
The technical solution in the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the present disclosure.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Before explaining the present disclosure in detail, an application scenario of the present disclosure will be described.
Fig. 1 is a schematic structural diagram of a charge and discharge circuit 100 according to the present disclosure. The charging and discharging circuit 100 comprises an external power interface 101, a battery interface 102, a detection interface 103, a control interface 104, a first diode 105, a field effect transistor 106, a first resistor 107, a second resistor 108, a third resistor 109, a first triode 110, a second triode 111 and a zener diode 112, wherein the detection interface 103 is used for outputting a power-down detection signal, the control interface 104 is used for receiving a discharge control signal, the external power interface 101 is respectively connected with a first end of the first resistor 107 and a negative electrode of the first diode 105, a second end of the first resistor 107 and a positive electrode of the first diode 105 are both connected with a negative electrode of the zener diode 112, a positive electrode of the zener diode 112 is connected with a base electrode of the first triode 110, a collector electrode of the first triode 110 is connected with the detection interface 103 and an emitter electrode thereof is grounded, a positive electrode of the first diode 105 is also connected with a drain electrode of the field effect transistor 106, a source electrode of the field effect transistor 106 is respectively connected with a first end of the second resistor, the gate of the fet 106 is connected to the second terminal of the second resistor 108 and the collector of the second transistor 111, the base of the second transistor 111 is connected to the first terminal of the third resistor 109, the emitter of the second transistor is grounded, and the second terminal of the third resistor 109 is connected to the control interface 104.
The operation of the electric device 300 requires electric energy, and the battery 400 and the external power source 200 may both provide electric energy, and the battery 400 may also need to be charged, so when the external power source 200 normally operates, the electric device 300 may be powered, and certainly, the battery 400 may also be charged, and when the external power source 200 is powered off, the electric device 300 may be powered through the battery 400, and in order to realize power management functions such as charging, discharging, and power down, reliability of power management is improved and cost is reduced, power management may be performed through the charging and discharging circuit 100 provided in the present disclosure.
The external power interface 101 may be used to access an external power source 200. The external power source 200 may be connected to the external power source interface 101 in parallel with the electric device 300.
It should be noted that the type of the external power source 200 is not limited in the embodiments of the present disclosure, for example, the external power source 200 may be used to provide 220 v or 380 v ac.
The battery interface 102 may be used to access a battery 400, wherein the battery 400 may be used to power the powered device 300 when the external power source 200 is powered off.
The detection interface 103 may be configured to output a power down detection signal, where the power down detection signal may be used to indicate whether the external power supply 200 is powered down, and when the power down detection signal is at a high level, it may be determined that the external power supply 200 is powered down.
The control interface 104 may be configured to receive a discharge control signal, wherein the discharge control signal may be used to control the battery interface 102 to discharge to the external power interface 101, and the discharge control signal may be at a high level.
Alternatively, the charging and discharging circuit 100 may be disposed in the power management device 500, the power management device 500 may include a processor (such as a single chip), the detection interface 103 and the control interface 104 may be connected to the processor (such as a single chip), and then the power management device 500 may detect a power failure detection signal from the detection interface 103 and input a discharging control signal to the control interface 104.
The first diode 105 may be used to prevent the voltage of the external power interface 101 from being directly input to the battery interface 102, thereby preventing the battery 400 from being burned.
The first transistor 110 may be used to convert an electrical signal in the circuit to a power down detection signal. The zener diode 112 may stabilize the voltage across the zener diode 112 at the breakdown voltage when the reverse voltage is close to the breakdown voltage, so as to perform a stabilizing function, and then in the embodiment of the present disclosure, the zener diode 112 may be used to determine whether the voltage of the external power interface 101 reaches the breakdown voltage. According to the actual requirements of the charging and discharging circuit, the zener diode 112 with the corresponding specification is selected, so that when the voltage of the external power interface 101 is normal, the zener diode 112 is broken through in the reverse direction, the electric signal passes through the zener diode 112 to the first triode 110, the first triode 110 is conducted, and the power failure detection signal is at a low level; on the contrary, if the external power interface 101 is powered off, the zener diode 112 is not broken down in the reverse direction, the first transistor 110 is not turned on, and the power down detection signal is at a high level. As can be seen from the above description, the first transistor 110 and the zener diode 112 may jointly form a power down detection loop.
Referring to fig. 1, when the voltage of the external power interface 101 is normal, that is, the external power 200 is normal, the first resistor 107, the first transistor 110 and the zener diode 112 may form a loop, a PN junction (PNjunction) of the first transistor 110 is turned on in a forward direction, the zener diode 112 generates a constant voltage, and a current flows to the battery interface 102 through the fet 106, so as to charge the battery 400. The voltage of the zener diode 112 is lower than the voltage of the battery interface 102 (i.e., the voltage of the external power source 200), the detection interface 103 is at a low level, and the voltage for charging the battery 400 may BE the voltage of the zener diode 112, plus the BE junction voltage drop of the first transistor 110, minus the diode voltage drop of the fet 106. When the external power interface 101 is powered off, that is, the external power supply 200 is powered off, the voltage of the battery interface 102 drops, and when the voltage of the external power interface 101 is lower than the voltage of the zener diode 112, the first transistor 110 is not turned on, and the detection interface 103 is at a non-low level (i.e., a high level), then if the control interface 104 is at a high level, the second transistor 111 and the fet 106 are turned on, and the battery interface 102 supplies power to the external power interface 101 through the fet 106 and the first diode 105.
In the embodiment of the present disclosure, the charging and discharging circuit 100 includes an external power interface 101, a battery interface 102, a detection interface 103, a control interface 104, a first diode 105, a fet 106, a first resistor 107, a second resistor 108, a third resistor 109, a first transistor 110, a second transistor 111, and a zener diode 112, where the detection interface 103 is configured to output a power-down detection signal, the control interface 104 is configured to receive a discharge control signal, the external power interface 101 is respectively connected to a first end of the first resistor 107 and a negative electrode of the first diode 105, a second end of the first resistor 107 and a positive electrode of the first diode 105 are both connected to a negative electrode of the zener diode 112, a positive electrode of the zener diode 112 is connected to a base of the first transistor 110, a collector of the first transistor 110 is connected to the detection interface 103 and an emitter of the first transistor is grounded, a positive electrode of the first diode 105 is further connected to a drain of the fet 106, the source of the fet 106 is connected to the first end of the second resistor 108 and the battery interface, the gate of the fet 106 is connected to the second end of the second resistor 108 and the collector of the second transistor 111, the base of the second transistor 111 is connected to the first end of the third resistor 109 and the emitter is grounded, and the second end of the third resistor 109 is connected to the control interface 104. Because the power failure detection signal according to the detection interface 103 can also be used for judging whether the external power supply 200 is powered off or not, and the control interface 104 can receive the discharging control signal, when the voltage of the external power supply interface 101, namely the external power supply 200 is normal, power can be supplied to the battery interface 102 so as to charge the battery 400, and when the external power supply 200 is powered off, the discharging control signal can also be used for discharging to the external power supply interface 101, so that the charging, discharging and power failure detection is realized without manual operation, the reliability of power management is improved, and the cost is reduced.
Optionally, referring to fig. 2, the charging and discharging circuit 100 further includes a second diode 113 and a third diode 114, the second diode 113 is connected in series with the first resistor 107, the third diode 114 is connected in series with the zener diode 112, a second end of the first resistor 107 is connected to an anode of the second diode 113, a cathode of the second diode 113 and an anode of the first diode 105 are both connected to an anode of the third diode 114, and an anode of the third diode 114 is connected to a cathode of the zener diode 112.
In order to prevent the external power source 200 and the ground from being reversely connected to cause the device damage in the circuit, thereby improving the safety of the charge and discharge circuit 100, a second diode 113 connected in series with the first resistor 107 and a third diode 114 connected in series with the zener diode 112 may be provided.
The second diode 113 may also be connected in series to the first end of the first resistor 107.
When the charging/discharging circuit 100 further includes the second diode 113 and the third diode 114, the voltage charged to the battery 400 may BE the voltage of the zener diode 112, plus the BE junction voltage drop of the first transistor 110 and the voltage drop of the third diode 114, minus the diode voltage drop of the field effect transistor 106.
Optionally, referring to fig. 3, the charging and discharging circuit 100 further includes a fourth resistor 115, wherein one end of the fourth resistor 115 is connected between the base of the first transistor 110 and the anode of the zener diode 112, and the other end is connected to the emitter of the first transistor 110.
The fourth resistor 115 may be used to limit current in the circuit, so as to improve the safety of the charge and discharge circuit 100.
Optionally, referring to fig. 4, the charging and discharging circuit 100 further includes a fourth diode 116, the fourth diode 116 is connected in series to the collector terminal of the second transistor 111, the gate of the field effect transistor 106 is connected to the second terminal of the second resistor 108 and the anode of the fourth diode 116, respectively, and the cathode of the fourth diode 116 is connected to the collector terminal of the second transistor 111.
In order to prevent the reverse connection of the positive and negative electrodes of the battery 400 and the circuit damage, thereby improving the safety of the charging and discharging circuit 100, a fourth diode 116 may be provided in series with the second transistor 111.
Optionally, referring to fig. 5, the charging and discharging circuit 100 further includes a fifth resistor 117, wherein one end of the fifth resistor 117 is connected between the base of the second transistor 111 and the first end of the third resistor 109, and the other end is connected to the emitter of the second transistor 111.
The fifth resistor 117 may be used to limit the current in the circuit, so as to improve the safety of the charge and discharge circuit 100.
Fig. 6 is a block diagram of a power management apparatus 500 according to the present disclosure. The power management device 500 may be provided with the charging and discharging circuit 100 as any one of the above, and the power management device 500 may send a discharging control signal to the control interface 104 when it is determined that the external power interface 101 is powered off according to the power-down detection signal of the detection interface 103, where the discharging control signal is used for controlling the battery interface 102 to discharge to the external power interface 101.
The processor in the power management device 500 may be connected to the detection interface 103 and the control interface 104, respectively, and determine that the external power interface 101 is powered off when the power failure detection signal is at a high level, so as to output the high level to the control interface 104 as the discharge control signal.
The beneficial effects of the power management device 500 are similar to those of the charging and discharging circuit 100, and are not described herein again.
Referring to fig. 7, a schematic block diagram of an electric system provided in the present disclosure is shown, the system includes an external power source 200, an electric device 300, a battery 400, and a power management device 500 as described above, the external power source 200 and the electric device 300 are respectively connected to an external power source interface 101, and the battery 400 is connected to a battery interface 102.
The beneficial effects of the power utilization system are similar to those of the charge and discharge circuit 100, and are not described herein again.
Optionally, powered device 300 includes a gate system.
When the electric device 300 includes the gate system, the electric device can supply power to the gate system and charge the battery 400 when the external power source 200 is normal, and when the external power source 200 is powered off, the electric device can supply power to the gate system through the battery 400 in time, and the conscious gate system is powered off in time when the external power source 200 is powered off. After the switching-off is completed, the discharging control signal may not be output to the control interface any more, thereby stopping the power supply of the battery 400 and powering off the gate system.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.

Claims (8)

1. A charging and discharging circuit is characterized by comprising an external power interface, a battery interface, a detection interface, a control interface, a first diode, a field effect transistor, a first resistor, a second resistor, a third resistor, a first triode, a second triode and a voltage stabilizing diode, wherein the detection interface is used for outputting a power failure detection signal, the control interface is used for receiving a discharging control signal, and the discharging control signal is used for controlling the battery interface to discharge to the external power interface;
the external power supply interface is respectively connected with a first end of the first resistor and a cathode of the first diode, a second end of the first resistor and an anode of the first diode are both connected with a cathode of the voltage-stabilizing diode, an anode of the voltage-stabilizing diode is connected with a base electrode of the first triode, a collector of the first triode is connected with the detection interface, and an emitter of the first triode is grounded;
the positive electrode of the first diode is further connected with the drain electrode of the field effect transistor, the source electrode of the field effect transistor is respectively connected with the first end of the second resistor and the battery interface, the grid electrode of the field effect transistor is respectively connected with the second end of the second resistor and the collector electrode of the second triode, the base electrode of the second triode is connected with the first end of the third resistor, the emitting electrode of the second triode is grounded, and the second end of the third resistor is connected with the control interface.
2. The circuit of claim 1, further comprising a second diode connected in series with the first resistor and a third diode connected in series with the zener diode, wherein a second terminal of the first resistor is connected to an anode of the second diode, wherein a cathode of the second diode and an anode of the first diode are both connected to an anode of the third diode, and wherein an anode of the third diode is connected to a cathode of the zener diode.
3. The circuit of claim 1, further comprising a fourth resistor having one end connected between the base of the first transistor and the anode of the zener diode and another end connected to the emitter of the first transistor.
4. The circuit of claim 1, further comprising a fourth diode connected in series to the collector terminal of the second transistor, wherein the gate of the fet is connected to the second terminal of the second resistor and the anode of the fourth diode, respectively, and wherein the cathode of the fourth diode is connected to the collector terminal of the second transistor.
5. The circuit of claim 1, further comprising a fifth resistor having one end connected between the base of the second transistor and the first end of the third resistor and another end connected to the emitter of the second transistor.
6. A power management device, characterized in that a circuit according to any of claims 1-5 is provided in the device;
and when the power management equipment determines that the external power interface is powered off according to the power failure detection signal of the detection interface, the power management equipment sends the discharge control signal to the control interface, wherein the discharge control signal is used for controlling the battery interface to discharge to the external power interface.
7. An electrical system, characterized in that the system comprises an external power source, an electrical consumer, a battery and a power management device according to claim 6, the external power source and the electrical consumer being respectively interfaced with the external power source, the battery being interfaced with the battery.
8. The electrical system of claim 7, wherein the electrical device comprises a gate system.
CN201922152011.2U 2019-12-04 2019-12-04 Charging and discharging circuit, power management equipment and power utilization system Active CN210640719U (en)

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CN201922152011.2U CN210640719U (en) 2019-12-04 2019-12-04 Charging and discharging circuit, power management equipment and power utilization system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201922152011.2U CN210640719U (en) 2019-12-04 2019-12-04 Charging and discharging circuit, power management equipment and power utilization system

Publications (1)

Publication Number Publication Date
CN210640719U true CN210640719U (en) 2020-05-29

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