CN210579367U - Linear constant-current stepless dimming controller integrated circuit, driving device and intelligent lighting lamp - Google Patents
Linear constant-current stepless dimming controller integrated circuit, driving device and intelligent lighting lamp Download PDFInfo
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Abstract
The utility model discloses a stepless dimming controller integrated circuit of linear constant current, integrated circuit is connected to input voltage source through the constant current source load, input voltage source provides the one-way ripple grid voltage to alternating current network voltage rectification, inside digital analog conversion circuit, electric wire netting current control circuit and the error amplification circuit of adjusting luminance that is equipped with of integrated circuit. The utility model discloses a stepless leap from nothing of stepless dimming of high efficiency linear constant current to having to the only low-cost implementation is provided.
Description
Technical Field
The utility model relates to a linear constant current controller circuit particularly, relates to a linear constant current stepless dimming controller integrated circuit, contains controller integrated circuit's drive arrangement, and contain drive arrangement's intelligent lighting lamp.
Background
As a new generation of illumination light sources, Light Emitting Diodes (LEDs) have been widely used. In the global lighting market, LED lighting is expected to account for seven, eight or more decades. As the LED lighting market becomes saturated, growing debilitated, and profits continue to decline, this industry is beginning to seek transition upgrades. Compared to conventional lighting, LED lighting has a considerable advantage in that it is relatively much easier to achieve dimming (adjusting the brightness) and toning (changing the color of the light) of the luminaire. This advantage is exactly what is needed for intelligent lighting. At present, the world enters an intelligent era, and intellectualization gradually becomes an innovative hotspot, such as artificial intelligence AI, Internet of things, intelligent home and the like. In smart homes, it is generally well understood in the industry that smart lighting may be the first to be commercialized. The next decade will be the decade for intelligent technology to evolve, and the decade for LED intelligent lighting to evolve.
The LED constant current controllers in the market are classified into low-PF (PF is less than 0.6) switch constant current controllers, high-PF (PF is more than 0.9) switch constant current controllers, common linear constant current controllers and high-efficiency linear constant current controllers. At present, the market share of the first two types of controllers is the highest, and multiple drive chip companies strive for innovation, so that the two types of constant current controllers already have perfect and mature intelligent dimming interface circuits. The market share is continuously increased immediately after the common linear constant current controller, and the intelligent dimming is very simple and mature to realize. Market share of high-efficiency linear constant current controllers is also continuously increasing, but only such constant current controllers do not have intelligent dimming interface circuits.
The invention discloses a high-efficiency linear constant current controller, which is invented by the inventor, and fig. 1 is a circuit structure diagram of the controller. As shown in fig. 1, the input voltage source VIN provides a unidirectional pulsating grid voltage of 100/120Hz after the ac 110V or 220V grid voltage is rectified by the rectifier bridge 180. The control loop of the controller 100 is formed by a grid current control circuit 120 and an error amplification circuit 130 to achieve accurate control of the grid current. The controller 100 is integrated on one chip.
The grid current control circuit 120 controls the acquisition of the grid current within the current window of the unidirectional pulsating grid voltage based on the VSD node voltage signal and the amplified error signal EAO. The voltage at the VSD node is derived from the divided voltage of the input voltage source VIN and acts as a feed forward to enable the control loop to respond very quickly to fluctuations in the grid voltage.
Based on the detection signal CS of the grid current flowing through the grid current control circuit 120, the error amplification circuit 130 determines the average current of the grid current, i.e. the average current of the LED load 190, and outputs an amplified error signal EAO. Signal EAO is sent to grid current control circuit 120.
Referring to fig. 2, fig. 2 shows signal waveforms of the controller of fig. 1 acquiring the grid current. The operating principle of the high-efficiency linear constant current controller is that the controller 100 draws the grid current when the VIN voltage passes near the turn-on voltage VLED of the LED load 190, and the grid current is zero at other times. The low point of this VIN window is VLED and the high point is VLED + Δ V. It can be seen that the operating current of the high-efficiency linear constant-current controller is not continuous, but pulsating; the period of the ripple is one half of the period of the mains voltage, i.e. the frequency of the controller operating current is 100/120Hz (corresponding to 50/60Hz ac mains voltage frequency, respectively).
Reference is again made to fig. 1. Since the frequency bandwidth of the control loop of the controller 100 is much larger (usually more than 5000 times larger) than the bandwidth of the error amplifier 131, the peak current amplifier 123 directly controls the magnitude of the grid current. The peak value of the grid current is determined by the reference voltage REFP and the sense resistor 181, i.e.
IPEAK＝V(REFP)/R181(1)
The average output current is determined by the error amplifier 131 and the reference voltage REFA, i.e.
IAVG＝V(REFA)/R181(2)
In general, the reference voltage REFP is two to ten times higher than REFA, with a substantially fixed ratio.
Compared with the common linear constant current controller, the high-efficiency linear constant current controller has the biggest characteristics that the controller wastes small power (as low as 0.8W) and the energy conversion efficiency is high (as high as 90%). Market examination for many years has proven that this solution is reliable and valuable.
As is known to those skilled in the art, the dimming methods are mainly divided into two types, PWM digital dimming and analog dimming. PWM digital dimming is an intermittent lighting mode, while analog dimming is a continuous stable lighting mode. Historically, analog dimming techniques were first applied. But with the rise of digital technology, digital dimming quickly takes an overwhelming advantage. Compared with the analog dimming technology which has the problems of high cost, poor interference resistance, inconvenient debugging and the like, the digital dimming circuit has simple and reliable structure, easy design and debugging production and low cost. In a relatively mature liquid crystal backlight control system (such as liquid crystal television backlight, liquid crystal display backlight, notebook computer backlight, tablet computer backlight, etc.), the digital dimming technology is in absolute monopoly.
In the LED intelligent lighting industry, a PWM digital dimming interface is also standard, and the current switch constant-current intelligent controller and the common linear constant-current intelligent controller on the market all adopt the PWM digital dimming interface. That is to say, both the switching constant current intelligent controller and the common linear constant current intelligent controller support an intermittent light emitting mode, and the intermittent light emitting frequency is generally 200Hz to 5KHz, which is also the frequency of the PWM dimming signal.
However, the above-mentioned high-efficiency linear constant current controller does not support the digital intermittent light emitting mode, which is determined by its unique operation mode. As previously described, the operating current of a high efficiency linear constant current controller (which may not be the same as the LED load current) is periodically pulsed at a frequency of only 100/120 Hz. Theoretically, in order to ensure the system to operate stably, the PWM dimming frequency must be far lower than the operating frequency of the system by 100/120Hz, which is usually required to be lower than ten times, i.e. lower than 10Hz, and the light flicker caused by such a low PWM dimming frequency cannot be accepted. The working frequency of the common switch constant current controller is above 50KHz, so that the intermittent digital dimming below 5KHz can be supported. The working current (same as the LED load current) of the common linear constant-current controller is generally direct current, and the common linear constant-current controller has no any obstacle to supporting intermittent digital dimming.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a suitable stepless realization scheme of adjusting luminance of intelligence is provided for this type of controller to the unable defect of carrying out intelligent light-adjusting of high efficiency linear constant current controller to realize the leap from nothing to having of the linear constant current stepless light-adjusting of high efficiency.
According to the utility model discloses a first aspect provides a linear constant current stepless dimming controller integrated circuit, integrated circuit is connected to input voltage source VIN through the constant current source load, input voltage source VIN provides the one-way ripple electric network voltage to alternating current electric network voltage rectification, integrated circuit is inside to be equipped with dimming digital analog conversion circuit, electric network current control circuit and error amplification circuit, wherein, dimming digital analog conversion circuit converts a PWM dimming signal into the first analog signal REFA and the second analog signal REFP of voltage proportion, the voltage of first analog signal REFA equals the product of duty cycle and a reference voltage of PWM dimming signal; the power grid current control circuit is used for controlling to obtain power grid current in a current taking window of the unidirectional pulsating power grid voltage and adjusting the peak value of the power grid current based on a voltage division signal from the input voltage source VIN, an amplified error signal and a second analog signal REFP; and the error amplifying circuit is used for adjusting the average value of the power grid current based on the detection signal of the power grid current flowing out through the power grid current control circuit and the first analog signal REFA and generating the amplified error signal.
In the first aspect, it is preferable that the voltage of the second analog signal REFP is two to ten times the voltage of the first analog signal REFA.
Preferably, the dimming digital-to-analog conversion circuit comprises a first NMOS transistor, a second NMOS transistor, an inverter, a filter circuit, and a proportional amplifier, wherein the gate of the first NMOS transistor receives the PWM dimming signal, and the drain of the first NMOS transistor is connected to the reference voltage; a grid electrode of the second NMOS tube receives the PWM dimming signal through the phase inverter, a source electrode of the second NMOS tube is connected with a reference ground, and a drain electrode of the second NMOS tube and a source electrode of the first NMOS tube are connected to an SD node together; a filter circuit for filtering a signal of the SD node; the proportional amplifier is composed of an operational amplifier and a first resistor and a second resistor, wherein the first resistor and the second resistor are connected between the output end of the operational amplifier and the reference ground in series; the non-inverting input end of the operational amplifier receives the output signal of the filter circuit, the inverting input end of the operational amplifier is connected with a node between the first resistor and the second resistor, and is used for generating a first analog signal REFA at the node between the first resistor and the second resistor and generating a second analog signal REFP at the output end of the operational amplifier.
Preferably, the grid current control circuit comprises: a subtractor having an input terminal receiving a divided signal from the input voltage source (VIN) and another input terminal receiving the amplified error signal to generate a first output signal; an adder, one input end of which receives the first output signal and the other input end of which receives the detection signal of the grid current and generates a second output signal; a peak current amplifier having an input receiving said second output signal and another input receiving said second analog signal (REFP); and a power field effect transistor, wherein the grid electrode of the power field effect transistor is connected with the output end of the peak current amplifier, the drain electrode of the power field effect transistor is connected to an input voltage source (VIN) through the constant current source load, and the source electrode of the power field effect transistor is connected to a reference ground through the detection resistor.
Preferably, the error amplifying circuit comprises an error amplifier and an integrating circuit composed of an integrating resistor and an integrating capacitor, wherein a first input terminal of the error amplifier receives the detection signal of the grid current through the integrating resistor, a second input terminal of the error amplifier receives the first analog signal (REFA), and an output terminal of the error amplifier generates the amplified error signal; and the integrating capacitor is connected between a node between the first input end of the error amplifier and the integrating resistor and the output end of the error amplifier.
Preferably, the integrated circuit further includes: the voltage division signal providing circuit comprises a first resistor, a second resistor, a third resistor and a voltage stabilizing circuit, wherein one end of the first resistor is connected to an input voltage source (VIN) through a power supply resistor positioned outside the integrated circuit, and the other end of the first resistor is connected with the voltage stabilizing circuit; one end of the second resistor is connected with a node in the integrated circuit between the power supply resistor and the first resistor, and the other end of the second resistor is connected to a reference ground through a third resistor; and the VSD node between the second resistor and the third resistor is connected with the grid current control circuit and used for providing the voltage division signal.
Preferably, inside the voltage division signal providing circuit, a VCC node between the first resistor and the voltage stabilizing circuit supplies power to the integrated circuit.
According to a second aspect, there is provided an apparatus for driving a constant current source load, comprising the integrated circuit according to the first aspect, an electrolytic capacitor, and an intelligent MCU, wherein the electrolytic capacitor is connected in parallel to two ends of the constant current source load, and the intelligent MCU provides a PWM dimming signal to a dimming digital-to-analog conversion circuit in the integrated circuit.
According to a third aspect, there is provided an apparatus for driving a constant current source load, comprising the integrated circuit according to the first aspect, a power supply resistor, an electrolytic capacitor, and an intelligent MCU, wherein the electrolytic capacitor is connected in parallel to two ends of the constant current source load, and the intelligent MCU provides a PWM dimming signal to a dimming digital-to-analog conversion circuit in the integrated circuit.
According to a fourth aspect, there is provided an intelligent lighting fixture comprising the apparatus of the second or third aspect as described above and an LED load.
According to the utility model discloses, make the linear constant current controller of high efficiency innovation adopt the mixed technique of adjusting luminance of digital simulation, solved the difficult problem that this type of controller does not support digital intermittent type nature luminous mode ingeniously, not only realized the stepless leap from nothing of adjusting luminance of the linear constant current of high efficiency, provided only low-cost implementation moreover. And simultaneously, the utility model discloses a linear constant current stepless dimming controller integrated circuit has remain this advantage of energy conversion efficiency height. Therefore, the utility model discloses will be favorable to the popularization with higher speed of the linear intelligent illumination of LED high efficiency, make some bigger contributions to energy saving and emission reduction in the world.
Drawings
For better understanding of the present invention, the following embodiments are described in detail with reference to the accompanying drawings. In the drawings:
fig. 1 is a circuit configuration diagram of a high-efficiency linear constant current controller in the prior art;
FIG. 2 illustrates signal waveforms of the controller of FIG. 1 to obtain grid current;
fig. 3 is a circuit structure diagram of a linear constant-current stepless dimming controller according to an embodiment of the present invention;
fig. 4 is an example of the dimming digital-to-analog conversion circuit of fig. 3:
fig. 5 shows operating voltage waveforms of nodes in the dimming digital-to-analog conversion circuit;
fig. 6 is a circuit diagram of a linear constant-current stepless dimming controller according to another embodiment of the present invention.
Detailed Description
The inventors contemplate that high efficiency linear constant current controllers do not support intermittent PWM digital dimming and have attempted to employ analog dimming techniques. And on the circuit interface of the external intelligent MCU, a PWM digital interface is preferably adopted. This is because, compared with the analog dimming circuit interface, the PWM digital dimming circuit interface has low cost, good interference resistance, and easy debugging and production. Therefore, the utility model discloses in, the linear constant current controller of high efficiency adopts the digital external interface of PWM, and inside is again with the digital signal conversion of adjusting luminance of PWM for the analog dimming signal, realizes inside analog dimming control, and this is the mixed technique of adjusting luminance of digital simulation.
Referring to fig. 3, fig. 3 is a circuit structure diagram of a linear constant-current stepless dimming controller according to an embodiment of the present invention. Different from the scheme of fig. 1, a dimming digital-to-analog conversion circuit 240 is additionally arranged inside the controller integrated circuit 200; in addition, an intelligent MCU 199 is added outside the controller integrated circuit 200 to provide a PWM dimming signal to the dimming digital-to-analog conversion circuit 240. Here, the intelligent MCU module 199 may be any intelligent dimming control module capable of providing a PWM dimming signal, for example, a human infrared sensing control module, a microwave sensing control module, a bluetooth control module, a 2.4G wireless control module, a WIFI remote control module, and the like. The dimming dac circuit 240 receives the external PWM dimming signal, converts it into two analog dimming signals REFA and REFP with proportional voltages through digital-to-analog conversion.
The analog dimming signal REFP is fed to a peak current amplifier 123 in the grid current control circuit 120 for adjusting the peak I of the grid currentPEAK. The analog dimming signal REFA is then fed to an error amplifier 131 in the error amplifier circuit 130 for adjusting the average value I of the mains currentAVG。
Theoretically, the following linear mathematical relationship is satisfied between the voltage of the analog dimming signal REFA and the duty ratio D of the PWM dimming signal:
V(REFA)＝DPWM*V(REF) (3)
fig. 4 is an example of the dimming digital-to-analog conversion circuit 240. As shown in fig. 4, the dimming digital-to-analog conversion circuit 240 includes NMOS transistors 241 and 243, an inverter 242, a filter circuit, and a proportional amplifier. The gate of the NMOS transistor 241 receives the PWM dimming signal, and the drain is connected to a reference voltage REF; the gate of the NMOS transistor 243 receives the PWM dimming signal through the inverter 242, the source is connected to the ground GND, and the drain and the source of the NMOS transistor 241 are connected to the SD node. The signal at the SD node is filtered by a filter circuit consisting of resistor 244 and capacitor 245. The proportional amplifier is composed of an operational amplifier 246 and resistors 247 and 248. Resistors 247, 248 are connected in series between the output of the operational amplifier 246 and ground GND; the non-inverting input of the operational amplifier 246 receives the output signal of the filter circuit and the inverting input is connected to the node between the resistors 247 and 248.
When the PWM dimming signal output by the external intelligent MCU module 199 is at a high level, the NMOS transistor 243 is turned off, and the NMOS transistor 241 is turned on, so that the voltage at the SD node is equal to the reference voltage REF; when the PWM dimming signal is at a low level, the NMOS transistor 241 is turned off, and the NMOS transistor 243 is turned on, so that the voltage at the SD node is equal to zero. Referring to fig. 5, fig. 5 shows operating voltage waveforms of the above three key nodes. It can be seen that the waveform frequency and duty cycle information of the SD node are the same as those of the PWM dimming signal, except that the high level of the SD node is no longer a coarse digital voltage, but becomes an accurate and clean stable analog reference voltage (e.g., 300 mV). Then, through the filter circuit, a stable and smooth analog voltage DAC can be obtained, and the voltage is mathematically equal to the average value of the SD voltage, i.e. the product of the duty cycle of SD and V (REF), and the strict mathematical expression is the above formula 3.
In fig. 4, the filter circuit formed by the resistor 244 and the capacitor 245 generally requires that the RC time constant is 10 times larger than the PWM pulse period, i.e. the RC time constant is 10 times larger than the PWM pulse period
R244*C245＞10/FPWM(4)
Since the lowest frequency of the PWM dimming pulse is about 200Hz and the period is about 5 ms, the RC time constant of the filter circuit needs to be greater than 50 ms. If R is244Taking 100 mega ohm, C245The tolerance of (d) cannot be lower than 500 pF. For modern integrated circuit technology, such resistance values of resistors and capacitance values of capacitors are not difficult to realize.
In the proportional amplifier of fig. 4, the analog dimming signal REFA is generated at the node between the resistors 247 and 248, and the analog dimming signal REFP is generated at the output of the operational amplifier 246. It can be seen that the REFA voltage is equal to the node DAC voltage, and the mathematical relationship of the REFP voltage to the REFA voltage is as follows, which is a linear proportional relationship:
V(REFP)＝(1+R247/R248)*V(REFA) (5)
by selecting the resistance values of resistors 247, 248, the REFP voltage can preferably be made 2 to 10 times the REFA voltage.
Therefore, the high-efficiency linear constant-current system realizes stepless dimming, the theoretical dimming range is 0-100%, the system still keeps high-efficiency conversion in the dimming range, the cost is low, and no additional element is added in a control loop of the system.
Reference is again made to fig. 3. Inside controller integrated circuit 200, grid current control circuit 120 includes subtractor 121, adder 122, peak current amplifier 123, and power fet 124. Subtractor 121 receives the divided voltage signal VIN via the VSD node at one input terminal, and receives the amplified error signal EAO at the other input terminal to generate an output signal SUBO. The output signal SUBO has a voltage obtained by multiplying the voltage difference between the two nodes VSD and EAO by a factor K
V(SUBO)＝K*(VSD-EAO) (6)
K ═ 1, the magnitude of K determines the slope of the grid current drop/rise at the upper limit of the current-taking window.
V(ADDO)＝SUBO+CS (7)
The peak current amplifier 123 has an input terminal receiving the output signal ADDO and another input terminal receiving the analog dimming signal REFP generated by the dimming digital-to-analog conversion circuit 240. The gate of the power fet 124 is connected to the output of the peak current amplifier, the drain is connected to VIN via the LED load 190, and the source is connected to ground via the sense resistor 181.
As shown in fig. 3, the error amplifier circuit 130 includes an error amplifier 131 and an integrating circuit including an integrating resistor 133 and an integrating capacitor 132. The first input end of the error amplifier 131 receives the grid current detection signal CS through the integrating resistor 133, the second input end receives the analog dimming signal REFA generated by the dimming digital-to-analog conversion circuit 240, and the output end generates the amplified error signal EAO; the integrating capacitor 132 is connected between the node between the first input of the error amplifier and the integrating resistor 133 and the output of the error amplifier.
Inside the controller integrated circuit 200, a voltage division signal supply circuit is also provided. The circuit includes a resistor 102, a resistor 105, a resistor 106, and a stabilizing circuit 110. One end of the resistor 102 is connected to the input voltage source VIN through a supply resistor 183 located outside the integrated circuit 200, and the other end is connected to the voltage stabilizing circuit 110; one end of the resistor 105 is connected to a node in the integrated circuit 200 between the power supply resistor 183 and the resistor 102, and the other end is connected to the reference ground through the resistor 106; the VSD node between the resistors 105 and 106 is connected to the grid current control circuit 120 to provide a voltage division signal for VIN. Also, within the divided voltage signal supply circuit, the VCC node between the resistor 102 and the voltage regulator circuit 110 provides power to the integrated circuit.
It can be seen that the voltage division signal providing circuit is disposed inside the controller integrated circuit 200, so that the external elements in fig. 3 are very few, and only one electrolytic capacitor 185 and two resistors are connected in parallel across the LED load 190, thereby optimizing the cost of the high-efficiency linear constant-current stepless dimming system to the maximum extent.
The voltage division signal providing circuit can also be arranged outside the controller integrated circuit. Referring to fig. 6, fig. 6 shows a circuit structure of a linear constant-current stepless dimming controller according to another embodiment of the present invention. In this embodiment, the VSD node is external to controller integrated circuit 300 and the voltage at this node is derived from the voltage division of input voltage source VIN by integrated circuit external resistors 005,006. In addition, the VCC node that supplies power to the integrated circuit is also located outside the controller integrated circuit 300, as shown in fig. 6, the VCC node is the node between the external resistor 183 and the capacitor 004; the VCC clamp circuit 010, located inside the controller integrated circuit 300, acts to limit the maximum voltage at the VCC node. The working principle and the circuit structure of other parts of the embodiment are similar to those of fig. 3, and are not described again.
In the foregoing description, although the present invention is exemplified to drive the LED load, it is easily understood by those skilled in the art that the present invention can be used to drive any kind of constant current source load.
Obviously, many variations of the invention described herein are possible, and such variations are not to be regarded as a departure from the spirit and scope of the invention. Accordingly, all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of this invention as set forth in the following claims.
Claims (10)
1. A linear constant current stepless light modulation controller integrated circuit is provided, the integrated circuit is connected to an input voltage source (VIN) through a constant current source load, the input voltage source (VIN) provides a unidirectional pulsating network voltage for rectifying an alternating current network voltage, a light modulation digital-to-analog conversion circuit, a network current control circuit and an error amplification circuit are arranged in the integrated circuit, wherein,
a dimming digital-to-analog conversion circuit converting a PWM dimming signal into a first analog signal (REFA) and a second analog signal (REFP) with proportional voltages, wherein the voltage of the first analog signal (REFA) is equal to the product of the duty ratio of the PWM dimming signal and a reference voltage;
the power grid current control circuit is used for controlling to obtain power grid current in a current taking window of the unidirectional pulsating power grid voltage and adjusting the peak value of the power grid current based on a voltage division signal from the input voltage source (VIN), an amplified error signal and a second analog signal (REFP);
an error amplifying circuit for adjusting an average value of the grid current based on a detection signal of the grid current flowing out through the grid current control circuit and a first analog signal (REFA), and generating the amplified error signal.
2. The integrated circuit of claim 1, wherein the voltage of the second analog signal (REFP) is two to ten times the voltage of the first analog signal (REFA).
3. The integrated circuit of claim 2, wherein the dimming DAC circuit comprises a first NMOS transistor, a second NMOS transistor, an inverter, a filter circuit, and a proportional amplifier,
a first NMOS tube, wherein the grid electrode of the first NMOS tube receives the PWM dimming signal, and the drain electrode of the first NMOS tube is connected with the reference voltage;
a grid electrode of the second NMOS tube receives the PWM dimming signal through the phase inverter, a source electrode of the second NMOS tube is connected with a reference ground, and a drain electrode of the second NMOS tube and a source electrode of the first NMOS tube are connected to an SD node together;
a filter circuit for filtering a signal of the SD node;
the proportional amplifier is composed of an operational amplifier and a first resistor and a second resistor, wherein the first resistor and the second resistor are connected between the output end of the operational amplifier and the reference ground in series; the non-inverting input end of the operational amplifier receives the output signal of the filter circuit, the inverting input end of the operational amplifier is connected with a node between the first resistor and the second resistor, and is used for generating a first analog signal (REFA) at the node between the first resistor and the second resistor and generating a second analog signal (REFP) at the output end of the operational amplifier.
4. The integrated circuit of claim 1, wherein the grid current control circuit comprises:
a subtractor having an input terminal receiving a divided signal from the input voltage source (VIN) and another input terminal receiving the amplified error signal to generate a first output signal;
an adder, one input end of which receives the first output signal and the other input end of which receives the detection signal of the grid current and generates a second output signal;
a peak current amplifier having an input receiving said second output signal and another input receiving said second analog signal (REFP); and
and the grid of the power field effect transistor is connected with the output end of the peak current amplifier, the drain of the power field effect transistor is connected to an input voltage source (VIN) through the constant current source load, and the source of the power field effect transistor is connected to a reference ground through the detection resistor.
5. The integrated circuit of claim 1, wherein the error amplification circuit comprises an error amplifier and an integration circuit comprising an integration resistor and an integration capacitor, wherein,
the error amplifier has a first input receiving a detection signal of the grid current via an integrating resistor, a second input receiving the first analog signal (REFA), and an output generating the amplified error signal;
and the integrating capacitor is connected between a node between the first input end of the error amplifier and the integrating resistor and the output end of the error amplifier.
6. The integrated circuit of claim 1, wherein the integrated circuit further comprises:
the voltage division signal providing circuit comprises a first resistor, a second resistor, a third resistor and a voltage stabilizing circuit, wherein one end of the first resistor is connected to an input voltage source (VIN) through a power supply resistor positioned outside the integrated circuit, and the other end of the first resistor is connected with the voltage stabilizing circuit; one end of the second resistor is connected with a node in the integrated circuit between the power supply resistor and the first resistor, and the other end of the second resistor is connected to a reference ground through a third resistor; and the VSD node between the second resistor and the third resistor is connected with the grid current control circuit and used for providing the voltage division signal.
7. The integrated circuit of claim 6, wherein a VCC node between the first resistor and a regulation circuit within the divided signal providing circuit provides power to the integrated circuit.
8. An apparatus for driving a constant current source load, comprising the integrated circuit of any one of claims 1 to 5, an electrolytic capacitor connected in parallel across the constant current source load, and an intelligent MCU for supplying a PWM dimming signal to a dimming digital-to-analog conversion circuit in the integrated circuit.
9. An apparatus for driving a constant current source load, comprising the integrated circuit of claim 6 or 7, a supply resistor, an electrolytic capacitor, and an intelligent MCU, wherein the electrolytic capacitor is connected in parallel across the constant current source load, and the intelligent MCU provides a PWM dimming signal to a dimming digital-to-analog conversion circuit in the integrated circuit.
10. An intelligent lighting fixture, comprising the apparatus of claim 8 or 9 and an LED load.
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Cited By (2)
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|---|---|---|---|---|
| CN109982489A (en) * | 2019-04-30 | 2019-07-05 | 北京模电半导体有限公司 | Linear constant current stepless dimming controller IC |
| CN112188674A (en) * | 2020-10-19 | 2021-01-05 | 美芯晟科技（北京）有限公司 | PWM dimming control method and circuit without stroboflash |
-
2019
- 2019-04-30 CN CN201920611254.5U patent/CN210579367U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109982489A (en) * | 2019-04-30 | 2019-07-05 | 北京模电半导体有限公司 | Linear constant current stepless dimming controller IC |
| CN112188674A (en) * | 2020-10-19 | 2021-01-05 | 美芯晟科技（北京）有限公司 | PWM dimming control method and circuit without stroboflash |
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| GR01 | Patent grant | ||
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Granted publication date: 20200519 |