CN210575960U

CN210575960U - Display substrate and display device

Info

Publication number: CN210575960U
Application number: CN201922113414.6U
Authority: CN
Inventors: 彭锦涛; 彭宽军; 牛亚男; 周婷婷; 任锦宇; 秦斌; 王锦谦
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2019-11-29
Filing date: 2019-11-29
Publication date: 2020-05-19
Anticipated expiration: 2029-11-29

Abstract

The application discloses display substrate and display device belongs to and shows technical field. The display substrate includes: the ultrasonic sensor includes a substrate, a photodetection device located on a first surface of the substrate, and an ultrasonic device located on a second surface of the substrate. The orthographic projection of the photoelectric detection device on the substrate and the orthographic projection of the ultrasonic device on the substrate are both located in the display area, and the photoelectric detection device and the ultrasonic device both belong to the biological characteristic identification module, so that the biological characteristic identification module in the display substrate in the embodiment of the application is located in the display area, the area of the display area cannot be influenced, and the screen occupation ratio of the display device prepared by adopting the display substrate is effectively improved.

Description

Display substrate and display device

Technical Field

The present disclosure relates to display technologies, and particularly to a display substrate and a display device.

Background

With the development of display technologies, the functions of display devices are more and more abundant, and more display devices integrate a biometric feature (e.g., fingerprint) identification function, and these display devices may be smart phones, tablet computers, wearable devices, or the like.

Currently, a display device integrated with a biometric function generally includes a display panel having a display area and a non-display area, and a biometric module disposed in the non-display area.

However, the arrangement of the biometric recognition module in the non-display region results in a larger area of the non-display region and thus a smaller area of the display region, and thus a lower screen occupation ratio of the display device.

SUMMERY OF THE UTILITY MODEL

The embodiment of the application provides a display substrate and a display device. The problem that the screen ratio of the display device in the related art is low can be solved, and the technical scheme is as follows:

in one aspect, a display substrate is provided, including:

a substrate having a display area;

a photodetector device on the first surface of the substrate;

an ultrasonic device on a second surface of the substrate;

wherein, the orthographic projection of the photoelectric detection device on the substrate and the orthographic projection of the ultrasonic device on the substrate are both positioned in the display area.

Optionally, the display substrate further includes: a light emitting device on the first surface of the substrate, an orthographic projection of the photodetecting device on the substrate being offset from an orthographic projection of the light emitting device on the substrate.

Optionally, the display substrate further includes: a detection circuit electrically connected to the photodetection device, and a driving circuit electrically connected to the light emitting device;

the detection circuit includes: a first transistor, the first transistor comprising: the first source drain, the first grid and the first active layer;

the drive circuit includes: a second transistor, the second transistor comprising: the second source drain, the second grid and the second active layer;

the first source drain and the second source drain are arranged on the same layer, the first grid and the second grid are arranged on the same layer, and the first active layer and the second active layer are arranged on the same layer.

Optionally, the photodetecting device includes: the first photosensitive electrode, the photosensitive structure and the second photosensitive electrode are stacked along the direction far away from the substrate, the first photosensitive electrode is electrically connected with the first grid electrode, the first photosensitive electrode and the first source drain electrode are arranged on the same layer, and the second photosensitive electrode is made of transparent electrode materials.

Optionally, the light emitting device includes: an anode, an organic light-emitting layer, and a cathode laminated in a direction away from the substrate;

the detection circuit further includes: and the first auxiliary electrode is electrically connected with the second photosensitive electrode and is arranged on the same layer as the anode.

Optionally, the substrate further has a non-display area, and the display substrate further includes: the signal routing is positioned in the non-display area, and the binding electrode is electrically connected with the signal routing;

the ultrasonic device includes a transmitting electrode, a piezoelectric material layer, and a receiving electrode stacked in a direction away from the substrate;

the transmitting electrode and the binding electrode are arranged on the same layer, and the signal routing is arranged on the same layer as the first source drain electrode and the second source drain electrode.

Optionally, the signal routing includes: the first sub-signal wire is electrically connected with the detection circuit, and the second sub-signal wire is electrically connected with the driving circuit;

the binding electrode includes: the first sub-bonding electrode is electrically connected with the first sub-signal wire, the second sub-bonding electrode is electrically connected with the second sub-signal wire, and the third sub-bonding electrode is electrically connected with the transmitting electrode and the receiving electrode in the ultrasonic device.

Optionally, the ultrasonic device further includes: and the second auxiliary electrode is electrically connected with the third sub-binding electrode and is arranged on the same layer as the binding electrode.

Optionally, the display substrate further includes: the packaging structure is located on one side, away from the substrate, of the photoelectric detection device, and the protection layer is located on one side, away from the substrate, of the ultrasonic device.

In another aspect, there is provided a display device including: the display substrate of any of the above.

The technical scheme provided by the embodiment of the application has the following beneficial effects:

the display substrate includes: the ultrasonic sensor includes a substrate, a photodetection device located on a first surface of the substrate, and an ultrasonic device located on a second surface of the substrate. The orthographic projection of the photoelectric detection device on the substrate and the orthographic projection of the ultrasonic device on the substrate are both located in the display area, and the photoelectric detection device and the ultrasonic device both belong to the biological characteristic identification module, so that the biological characteristic identification module in the display substrate in the embodiment of the application is located in the display area, the area of the display area cannot be influenced, and the screen occupation ratio of the display device prepared by adopting the display substrate is effectively improved. Moreover, the photoelectric detection device can identify the blood oxygen content and the pulse of a human body, and the ultrasonic device can identify the fingerprint of the human body, so that the display substrate can identify the blood oxygen content, the pulse and the fingerprint of the human body, and the display substrate can identify more biological characteristics, thereby enriching the functions of the display substrate.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of another display substrate provided in this embodiment of the present application;

FIG. 3 is a top view of the display substrate shown in FIG. 2;

FIG. 4 is a schematic structural diagram of another display substrate provided in the embodiments of the present application;

fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present disclosure;

fig. 6 is a schematic view of sequentially forming a sacrificial layer and a seventh conductive pattern on a glass substrate according to an embodiment of the present disclosure;

fig. 7 is a schematic view illustrating a substrate and an active layer pattern sequentially formed on a seventh conductive pattern according to an embodiment of the present disclosure;

fig. 8 is a schematic view illustrating a first gate insulating layer and a first conductive pattern sequentially formed on an active layer pattern according to an embodiment of the present disclosure;

fig. 9 is a schematic view of sequentially forming a second gate insulating layer and a second conductive pattern on a first conductive pattern according to an embodiment of the present disclosure;

FIG. 10 is a schematic view of an interlayer dielectric layer formed on a second conductive pattern according to an embodiment of the present disclosure;

FIG. 11 is a schematic view of a third conductive pattern formed on an interlayer dielectric layer according to an embodiment of the present disclosure;

FIG. 12 is a schematic diagram of a photosensitive structure pattern formed on a third conductive pattern according to an embodiment of the present disclosure;

FIG. 13 is a schematic diagram of a fourth conductive pattern formed on a photosensitive structure pattern according to an embodiment of the present disclosure;

fig. 14 is a schematic view illustrating a passivation layer and a planarization layer sequentially formed on a fourth conductive pattern according to an embodiment of the present disclosure;

fig. 15 is a schematic view illustrating a passivation layer and a planarization layer sequentially formed on a fourth conductive pattern according to an embodiment of the present disclosure;

fig. 16 is a schematic view illustrating a pixel defining layer formed on a fifth conductive pattern according to an embodiment of the present disclosure;

fig. 17 is a schematic view illustrating a light emitting layer pattern, a sixth conductive pattern and an encapsulation structure formed on a pixel defining layer in sequence according to an embodiment of the present disclosure;

FIG. 18 is a schematic view of a glass substrate being peeled according to an embodiment of the present application;

FIG. 19 is a schematic diagram of a method for patterning a piezoelectric material layer on a second surface of a substrate according to an embodiment of the present disclosure;

fig. 20 is a schematic diagram of forming an eighth conductive pattern on a pattern of a piezoelectric material layer according to an embodiment of the present disclosure.

Detailed Description

To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a display substrate provided in an embodiment of the present application. The display substrate 100 may include:

a substrate 10, a photodetection device 20 located on a first surface of the substrate 10, and an ultrasonic device 30 located on a second surface of the substrate 10.

The substrate 10 has a display area (not labeled in fig. 1) in which an orthographic projection of the photodetecting device 20 on the substrate 10 and an orthographic projection of the ultrasonic device 30 on the substrate 10 are both located. It should be noted that the first surface and the second surface of the substrate 10 are generally two opposite surfaces of the substrate 10, for example, the first surface is an upper surface of the substrate 10, and the second surface is a lower surface of the substrate 10.

In the embodiment of the present application, the photodetection device 20 and the ultrasonic device 30 belong to a biometric identification module. The display substrate 100 may identify biological characteristics of a human body, such as blood oxygen content, pulse, and fingerprint, through the biometric identification module. For example, the blood oxygen content and pulse of the human body can be identified by the photo detection device 20, and the fingerprint of the human body can be identified by the ultrasonic device 30. It should be noted that, because the ultrasonic wave that ultrasonic device 30 sent has higher penetrability, consequently can acquire the depth information of object, when discerning human fingerprint through ultrasonic device 30, it can acquire 3D fingerprint information, can effectually improve fingerprint identification's accuracy when comparing discernment to 3D fingerprint information.

To sum up, the display substrate provided by the embodiment of the present application includes: the ultrasonic sensor includes a substrate, a photodetection device located on a first surface of the substrate, and an ultrasonic device located on a second surface of the substrate. The orthographic projection of the photoelectric detection device on the substrate and the orthographic projection of the ultrasonic device on the substrate are both located in the display area, and the photoelectric detection device and the ultrasonic device both belong to the biological characteristic identification module, so that the biological characteristic identification module in the display substrate in the embodiment of the application is located in the display area, the area of the display area cannot be influenced, and the screen occupation ratio of the display device prepared by adopting the display substrate is effectively improved. Moreover, the photoelectric detection device can identify the blood oxygen content and the pulse of a human body, and the ultrasonic device can identify the fingerprint of the human body, so that the display substrate can identify the blood oxygen content, the pulse and the fingerprint of the human body, and the display substrate can identify more biological characteristics, thereby enriching the functions of the display substrate.

In the embodiment of the present application, please refer to fig. 2, and fig. 2 is a schematic structural diagram of another display substrate provided in the embodiment of the present application. The display substrate 100 may further include: a light emitting device 40 on the first surface of the substrate 10. The orthographic projection of the light emitting device 40 on the substrate 10 is offset from the orthographic projection of the photodetecting device 20 on the substrate 10. At this time, the light outside the display substrate 100 is not shielded by the light emitting device 40, so that the light can be smoothly detected by the photo detection device 20, and the accuracy of detecting the blood oxygen content and the pulse of the human body through the photo detection device 20 is further improved.

Alternatively, referring to fig. 3, fig. 3 is a top view of the display substrate shown in fig. 2, and the display area 10a of the substrate 10 includes: biometric identification area 10a 1. The orthographic projection of the photodetecting device 20 on the substrate 10 in the display substrate 100 and the orthographic projection of the ultrasonic device 30 on the substrate 10 are both located within the biometric identification area 10a1, while the orthographic projection of the light emitting device 30 on the substrate 10 in the display substrate 100 is located within the display area 10 a. That is, the photodetection device 20 and the ultrasonic wave device 30 in the display substrate 100 are both located in the biometric characteristic recognition area 10a1, and the light emitting device in the display substrate 100 is located in the biometric characteristic recognition area 10a1 and also in the other area 10a2 of the display area 10a than the biometric characteristic recognition area 10a 1.

Optionally, as shown in fig. 2, the display substrate 100 may further include: a detection circuit 50 electrically connected to the photodetection device 20, and a driving circuit 60 electrically connected to the light emitting device 40. The detection circuit 50 may include: a first transistor, which may include: a first source-drain 501, a first gate 502, and a first active layer 503. The driving circuit 60 may include: a second transistor, which may include: a second source-drain 601, a second gate 602, and a second active layer 603. The first source/drain 501 and the second source/drain 601 are disposed on the same layer, the first gate 502 and the second gate 602 are disposed on the same layer, and the first active layer 503 and the second active layer 603 are disposed on the same layer. It should be noted that, the two structures arranged in the same layer here and the two structures arranged in the same layer in the following embodiments are all referred to as: both structures are formed using a single patterning process. When the first source drain 501 and the second source drain 601 are disposed on the same layer, the first gate 502 and the second gate 602 are disposed on the same layer, and the first active layer 503 and the second active layer 603 are disposed on the same layer, the number of times of the composition process in the preparation of the display substrate 100 can be effectively reduced, and the preparation process of the display substrate 100 is simplified.

In the embodiment of the present application, the driving circuit 60 may further include: and a storage capacitor formed by the second gate 602, a capacitor auxiliary electrode 604 on a side of the second gate 602 away from the substrate, and an insulating layer between the second gate 602 and the capacitor auxiliary electrode 604.

Alternatively, the photodetection device 20 may include: a first photo-sensitive electrode 201, a photo-sensitive structure 202 and a second photo-sensitive electrode 203 stacked in a direction away from the substrate 10. The photosensitive structure 202 may be a PN junction, a PIN junction, a photoconductive or schottky barrier, or the like. The first photosensitive electrode 201 is electrically connected to a first gate 502 in the first transistor. The second photosensitive electrode 203 can be made of a transparent electrode material so that light outside the display substrate can be detected by the photosensitive structure 202 through the second optical film electrode 203, for example, the material of the second photosensitive electrode 203 can be ITO. The first photosensitive electrode 201 is disposed in the same layer as the first source drain 501 in the first transistor. At this time, the number of patterning processes in preparing the display substrate 100 may be further reduced, thereby further simplifying the preparation process of preparing the display substrate 100.

In the embodiment of the present application, the light emitting device 40 may include: an anode 401, an organic light emitting layer 402, and a cathode 403 stacked in a direction away from the substrate 10. The display substrate 100 has a plurality of pixels, each pixel having three sub-pixels, in which the organic light emitting layers 402 are: an organic light emitting layer for emitting red light, an organic light emitting layer for emitting green light, and an organic light emitting layer for emitting blue light. The detection circuit 50 in the display substrate 100 may further include: and a first auxiliary electrode 50b electrically connected to the second photo-sensitive electrode 203. The first auxiliary electrode 50b is used for applying an electrical signal to the second photosensitive electrode 203 to enable the photoelectric detection device 50 to be in an operating state, so that the photoelectric detection device 50 can identify the blood oxygen content and the pulse of the human body. The first auxiliary electrode 50b may be disposed on the same layer as the anode 401, so that the number of patterning processes for preparing the display substrate 100 may be further reduced, and the preparation process for preparing the display substrate 100 may be further simplified.

Optionally, the substrate 10 in the display substrate 100 further has a non-display region. The display substrate 100 may further include: a signal trace 70 positioned in the non-display area, and a bonding electrode 80 electrically connected to the signal trace 70. The ultrasonic device 40 may include: a transmission electrode 301, a piezoelectric material layer 302, and a reception electrode 303 stacked in a direction away from the substrate 10. The piezoelectric material layer 302 may be a polyvinylidene fluoride (PVDF) layer. When an electric signal is applied to the transmitting electrode 301 and the receiving electrode 303, the piezoelectric material layer 302 may emit an ultrasonic wave, so that the ultrasonic wave device 30 may recognize a fingerprint of a human body. The transmitting electrode 301 and the bonding electrode 80 in the ultrasonic device 30 are disposed at the same layer, and the signal trace 70 may be disposed at the same layer as the first source-drain electrode 501 in the first transistor and the second source-drain electrode 601 in the second transistor. At this time, the number of patterning processes in preparing the display substrate 100 may be further reduced, thereby further simplifying the preparation process of preparing the display substrate 100. It should be noted that, since the ultrasonic device 30 is located on the second surface of the substrate 10, and the first transistor and the second transistor are both located on the first surface of the substrate 10, the signal trace 70 needs to penetrate through the substrate 10 and then be electrically connected to the bonding electrode 80.

For example, the signal traces 70 in the display substrate 100 may include: a first sub-signal trace (not shown in fig. 2) electrically connected to the detection circuit 50, and a second sub-signal trace (not shown in fig. 2) electrically connected to the driving circuit 60. The binding structure 80 in the display substrate 100 may include: a first sub-bonding electrode (not shown in fig. 2) electrically connected to the first sub-signal trace, a second sub-bonding electrode (not shown in fig. 2) electrically connected to the second sub-signal trace, and a third sub-bonding electrode (not shown in fig. 2) electrically connected to the transmitting electrode 301 and the receiving electrode 303 in the ultrasonic device 30. The first sub-binding electrode is configured to be connected with a first control chip for driving the photodetecting device 20 to work, and the first control chip can drive the photodetecting device 20 to work through the first sub-binding electrode and the first sub-signal trace; the second sub-bonding electrode is configured to be connected with a second control chip for driving the light emitting device 40 to operate, and the second control chip can drive the light emitting device 40 to operate through the second sub-bonding electrode and the second sub-signal wire; the third sub-bonding electrode is configured to be connected to a third control chip for driving the operation of the ultrasonic device 30, and the third control chip controls the operation of the ultrasonic device 30 through the third sub-bonding electrode.

In the embodiment of the present application, the ultrasonic device 30 may further include: a second auxiliary electrode 304 electrically connected to the receiving electrode 303, wherein the second auxiliary electrode 304 is further electrically connected to a third sub-binding electrode of the binding electrodes 80, and the second auxiliary electrode 304 is disposed on the same layer as the binding electrodes 80. The second auxiliary electrode 304 can electrically connect the receiving electrode 303 and the third sub-binding electrode, and when the second auxiliary electrode 304 and the binding electrode 80 are disposed on the same layer, the number of patterning processes in the process of manufacturing the display substrate 100 can be further reduced, thereby further simplifying the manufacturing process of manufacturing the display substrate 100.

Optionally, the display substrate 100 may further include: package structure 90 and protective layer 110. The encapsulation structure 90 is located on a side of the photodetection device 20 away from the substrate 10, and the encapsulation layer 90 is used for encapsulating the light-emitting device 40, which can improve the service life of the light-emitting device 40. The protective layer 110 is located on the side of the ultrasonic device 30 away from the substrate 10, and the ultrasonic device 30 is used for protecting the ultrasonic device 30, which can improve the service life of the ultrasonic device 30.

As shown in fig. 4, fig. 4 is a schematic structural diagram of another display substrate provided in the embodiment of the present application, and a film structure included in the display substrate 100 provided in the embodiment of the present application is as follows:

an active layer pattern a1, a first gate insulating layer a2, a first conductive pattern A3, a second gate insulating layer a4, a second conductive pattern a5, an interlayer dielectric layer A6, a third conductive pattern a7, a photosensitive structure pattern A8, a fourth conductive pattern a9, a passivation layer a10, a planarization layer a11, a fifth conductive pattern a12, a pixel defining layer a13, a light emitting layer pattern a14, a sixth conductive pattern a15, and an encapsulation structure 90 are sequentially stacked on the first surface of the substrate 10.

A seventh conductive pattern B1, a piezoelectric material layer pattern B2, an eighth conductive pattern B3, and a protective layer 110, which are sequentially stacked on the second surface of the substrate 10.

The substrate 10 may include a Polyimide (PI) layer 101, a barrier layer 102, and a buffer layer 103, which are sequentially stacked, where a surface of the buffer layer 103 away from the barrier layer 102 is a first surface of the substrate 10, and a surface of the PI layer 101 away from the barrier layer 102 is a second surface of the substrate 10. The active layer pattern a1 may include: a first active layer pattern 503 and a second active layer pattern 603. The first conductive pattern a3 may include: a first gate 502 and a second gate 602. The second conductive pattern a5 may include: the capacitive auxiliary electrode 604. The third conductive pattern a7 may include: a first source drain 501, a second source drain 601, a first photosensitive electrode 201 and a signal trace 70. The photosensitive structure pattern A8 may include: a photosensitive structure 202. The fourth conductive pattern a9 may include: a second photosensitive electrode 203. The fifth conductive pattern a12 may include: an anode 401 and a first auxiliary electrode 50 b. The light emitting layer pattern a14 may include: an organic light emitting layer 402. The sixth conductive pattern a15 may include: and a cathode 403. The seventh conductive pattern B1 may include: a binding electrode 80, a transmitting electrode 301, and a second auxiliary electrode 304. The piezoelectric material layer pattern B2 may include: a layer of piezoelectric material 302. The eighth conductive pattern B3 may include: receiving electrode 303.

The embodiment of the application also provides a display device. The display device may include the display substrate 100 shown in fig. 1, 2, or 4. The display device may be: any product or component with a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator or a wearable device, and the like.

Optionally, please refer to fig. 5, and fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present application. The display substrate 100 in the display device may be the display substrate 100 shown in fig. 2, and the display device may further include: and a control chip 200 coupled to the bonding electrode 80 in the display substrate 100. The control chip 200 may be electrically connected to the photodetection device 20, the light emitting device 40, and the ultrasonic device 30 in the display substrate 100 through the bonding electrodes 80, respectively. By way of example, the control chip 200 may include: a first control chip electrically connected to a first sub-binding electrode in the binding electrodes 80, a second control chip electrically connected to a second sub-binding electrode in the binding electrodes 80, and a third control chip electrically connected to a third sub-binding electrode in the binding electrodes 80. The first control chip can drive the photoelectric detection device 20 to work through the first sub-binding electrode and the first sub-signal wiring; the second control chip can drive the light-emitting device 40 to work through the second sub-bonding electrode and the second sub-signal wiring; the third control chip controls the operation of the ultrasonic device 30 through the third sub-bonding electrode.

The embodiment of the application also provides a manufacturing method of the display substrate, which is used for manufacturing the display substrate shown in fig. 4. The manufacturing method of the display substrate can comprise the following steps:

step S1, sequentially forming a sacrificial layer and a seventh conductive pattern on the glass substrate.

Optionally, the material of the sacrificial layer may be a silicon oxide material or a silicon nitride material. The material of the seventh conductive pattern may include: such as metal molybdenum (abbreviated as Mo), metal copper (abbreviated as Cu), metal aluminum (abbreviated as Al) or alloy.

For example, please refer to fig. 6, fig. 6 is a schematic diagram illustrating a sacrificial layer and a seventh conductive pattern sequentially formed on a glass substrate according to an embodiment of the present disclosure. First, the sacrificial layer 01 and the seventh conductive material layer may be sequentially formed on the glass substrate 00 by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed once on the seventh conductive material layer to form a seventh conductive pattern B1. The seventh conductive pattern B1 may include: a binding electrode 80, a transmitting electrode 301, and a second auxiliary electrode 304.

Step S2, sequentially forming a substrate and an active layer pattern on the seventh conductive pattern.

Optionally, the material of the active layer pattern may include: polycrystalline silicon.

For example, referring to fig. 7, fig. 7 is a schematic diagram illustrating a substrate and an active layer pattern sequentially formed on a seventh conductive pattern according to an embodiment of the present disclosure. First, the substrate 10 and the active material layer may be sequentially formed on the glass substrate 00 on which the seventh conductive pattern B1 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed once on the active material layer to form an active layer pattern a 1. The substrate 10 may include: a PI layer 101, a barrier layer 102, and a buffer layer 103 are stacked. The active layer pattern a1 may include: a first active layer pattern 503 and a second active layer pattern 603.

Step S3 is to sequentially form a first gate insulating layer and a first conductive pattern on the active layer pattern.

Optionally, the material of the first gate insulating layer may include: silicon dioxide, silicon nitride or a mixed material of silicon dioxide and silicon nitride. The material of the first conductive pattern may include: a metallic material such as metallic Mo, metallic Cu, metallic Al or an alloy.

For example, referring to fig. 8, fig. 8 is a schematic diagram illustrating a first gate insulating layer and a first conductive pattern sequentially formed on an active layer pattern according to an embodiment of the present disclosure. First, the first gate insulating layer a2 and the first conductive material layer may be sequentially formed on the glass substrate 00 on which the active layer pattern a1 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed once on the first conductive material layer to form a first conductive pattern a 3. The first conductive pattern a3 may include: a first gate 502 and a second gate 602.

Step S4, a second gate insulating layer and a second conductive pattern are sequentially formed on the first conductive pattern.

Optionally, the material of the second gate insulating layer may include: silicon dioxide, silicon nitride or a mixed material of silicon dioxide and silicon nitride. The material of the second conductive pattern may include: a metallic material such as metallic Mo, metallic Cu, metallic Al or an alloy.

For example, referring to fig. 9, fig. 9 is a schematic diagram illustrating a second gate insulating layer and a second conductive pattern sequentially formed on a first conductive pattern according to an embodiment of the present disclosure. First, the second gate insulating layer a4 and the second conductive material layer may be sequentially formed on the glass substrate 00 on which the first conductive pattern A3 is formed by any of a variety of means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed on the second conductive material layer once to form a second conductive pattern a 5. The second conductive pattern a5 may include: the capacitive auxiliary electrode 604.

Step S5 is to form an interlayer dielectric layer on the second conductive pattern.

Optionally, the material of the interlayer dielectric layer may include: silicon dioxide, silicon nitride or a mixed material of silicon dioxide and silicon nitride.

For example, referring to fig. 10, fig. 10 is a schematic diagram illustrating an interlayer dielectric layer formed on a second conductive pattern according to an embodiment of the present disclosure. The interlayer dielectric layer a6 may be sequentially formed on the glass substrate 00 on which the second conductive pattern a5 is formed by any of a variety of means such as deposition, coating, sputtering, and the like. The interlayer dielectric layer a6 has a first via a, a second via b, a third via c and a fourth via d therein. Wherein the first via a needs to penetrate through to the bonding electrode 80 in the seventh conductive pattern B1; the second via hole b needs to penetrate through to the first active layer 503 in the active layer pattern a 1; the third via hole c needs to penetrate through to the second active layer 603 in the active layer pattern a 1; the fourth via d needs to penetrate to the first gate 502 in the first conductive pattern a 3.

In the embodiment of the present application, the first via a, the second via b, the third via c, and the fourth via d may be formed through a two to three patterning process after the formation of the interlayer dielectric layer a 6.

Step S6, forming a third conductive pattern on the interlayer dielectric layer.

Optionally, the material of the third conductive pattern may include: a metallic material such as metallic Mo, metallic Cu, metallic Al or an alloy.

For example, referring to fig. 11, fig. 11 is a schematic diagram illustrating a third conductive pattern formed on an interlayer dielectric layer according to an embodiment of the present disclosure. The third conductive material layer may be sequentially formed on the glass substrate 00 on which the interlayer dielectric layer a6 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed once on the third conductive material layer to form a third conductive pattern a 7. The third conductive pattern a7 may include: a first source drain 501, a second source drain 601, a first photosensitive electrode 201 and a signal trace 70. The signal trace 70 may be electrically connected to the bonding electrode 80 in the seventh conductive pattern B1 through the first via a; the first source-drain electrode 501 may be electrically connected to the first active layer 503 in the active layer pattern a1 through the second via b; the second source and drain electrodes 601 may be electrically connected to the second active layer 603 in the active layer pattern a1 through third vias c; the first photosensitive electrode 201 may be electrically connected to the first gate 502 in the first conductive pattern a3 through a fourth via d.

Step S7, forming a photosensitive structure pattern on the third conductive pattern.

For example, please refer to fig. 12, fig. 12 is a schematic diagram illustrating a photosensitive structure pattern formed on a third conductive pattern according to an embodiment of the present disclosure. The photosensitive structure material layer may be sequentially formed on the glass substrate 00 on which the third conductive pattern a7 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed on the photosensitive structure material layer to form a photosensitive structure pattern A8. The photosensitive structure pattern A8 may include: a photosensitive structure 202. The photosensitive structure 202 may be a PN junction, a PIN junction, a photoconductive or schottky barrier, or the like.

Step S8, a fourth conductive pattern is formed on the photosensitive structure pattern.

Alternatively, the material of the fourth conductive pattern may be a transparent electrode material, for example, it may be ITO.

For example, please refer to fig. 13, fig. 13 is a schematic diagram illustrating a fourth conductive pattern formed on a photosensitive structure pattern according to an embodiment of the present disclosure. The fourth conductive material layer may be sequentially formed on the glass substrate 00 on which the photo-sensitive structure pattern A8 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed on the fourth conductive material layer once to form a fourth conductive pattern a 9. The fourth conductive pattern a9 may include: a second photosensitive electrode 203.

And step S9, sequentially forming a passivation layer and a planarization layer on the fourth conductive pattern.

Optionally, the passivation layer may be made of a material such as a silicon oxide material or a silicon nitride. The material of the flat layer may be acrylic resin or epoxy resin.

For example, referring to fig. 14, fig. 14 is a schematic diagram illustrating a passivation layer and a planarization layer sequentially formed on a fourth conductive pattern according to an embodiment of the present disclosure. The passivation layer a10 and the planarization layer a11 may be sequentially formed on the glass substrate 00 on which the fourth conductive pattern a9 is formed by any of a variety of means such as deposition, coating, sputtering, and the like. The passivation layer a10 has a fifth via e and a sixth via f. Wherein, the fifth via e needs to penetrate through to the second photosensitive electrode 203 in the fourth conductive pattern a 9; the sixth via f needs to penetrate to the second source-drain electrode 601 in the third conductive pattern a 7.

In the embodiment of the present application, the fifth via e and the sixth via f may be formed through a single patterning process after the formation of the planarization layer a 11.

Step S10, a fifth conductive pattern is formed on the planarization layer.

Alternatively, the material of the fifth conductive pattern may include a metal material such as metal Mo, metal Cu, metal Al, or an alloy.

For example, please refer to fig. 15, fig. 15 is a schematic diagram illustrating a passivation layer and a planarization layer sequentially formed on a fourth conductive pattern according to an embodiment of the present disclosure. The fifth conductive material layer may be sequentially formed on the glass substrate 00 on which the planarization layer a11 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed on the fifth conductive material layer once to form a fifth conductive pattern a 12. The fifth conductive pattern a12 may include: an anode 401 and a first auxiliary electrode 50 b. Wherein, the first auxiliary electrode 50b may be electrically connected to the second photosensitive electrode 203 in the fourth conductive pattern a9 through a fifth via e; the anode electrode 401 may be electrically connected to the second source-drain electrode 601 in the third conductive pattern a7 through the sixth via hole f.

Step S11, forming a pixel defining layer on the fifth conductive pattern.

For example, referring to fig. 16, fig. 16 is a schematic diagram illustrating a pixel defining layer formed on a fifth conductive pattern according to an embodiment of the present disclosure. The pixel defining material layer may be sequentially formed on the glass substrate 00 on which the fifth conductive pattern a12 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed once on the pixel defining material layer to form a pixel defining layer a 13. The pixel defining layer a13 has spacer pillars g and pixel regions h. It should be noted that the pixel defining layer a13 with the spacer pillars g and the pixel regions h can be formed by performing a patterning process on the pixel defining material layer once using a gray mask.

Step S12, forming a light emitting layer pattern, a sixth conductive pattern and an encapsulation structure on the pixel defining layer in sequence.

Alternatively, the material of the sixth conductive pattern may be a transparent electrode material, for example, it may be ITO.

For example, referring to fig. 17, fig. 17 is a schematic diagram illustrating a light emitting layer pattern, a sixth conductive pattern and a package structure sequentially formed on a pixel defining layer according to an embodiment of the present disclosure.

First, the light emitting layer pattern a14 may be formed on the glass substrate 00 on which the pixel defining layer a13 is formed using an inkjet printing process or an evaporation process. The luminescent layer pattern a14 may include: an organic light emitting layer 402. The organic light emitting layer 402 is located in the pixel region h in the pixel defining layer a 13.

Thereafter, the sixth conductive pattern a15 may be sequentially formed on the glass substrate 00 on which the light-emitting layer pattern a14 is formed by any of various means such as deposition, coating, sputtering, and the like. The sixth conductive pattern a15 may include a cathode 403.

Finally, the encapsulation structure 90 may be sequentially formed on the glass substrate 00 on which the sixth conductive pattern a15 is formed by any of a variety of means such as deposition, coating, sputtering, and the like.

And step S13, stripping the glass substrate.

For example, please refer to fig. 18, fig. 18 is a schematic diagram of a glass substrate peeling method according to an embodiment of the present disclosure. The sacrificial layer 01 may be cut using a laser cutting technique to peel the glass substrate 00 off the substrate 10.

Step S14, a piezoelectric material layer pattern is formed on the second surface of the substrate.

For example, referring to fig. 19, fig. 19 is a schematic diagram illustrating a pattern of a piezoelectric material layer formed on the second surface of the substrate according to an embodiment of the present disclosure. The piezoelectric material layer may be formed on the second surface of the substrate 10 on which the seventh conductive pattern B1 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed on the piezoelectric material layer to form a piezoelectric material layer pattern B2. The piezoelectric material layer pattern B2 may include: a layer of piezoelectric material 302.

Step S15 is to form an eighth conductive pattern and a protective layer on the piezoelectric material layer pattern.

Alternatively, the material of the eighth conductive pattern may include a metal material such as metal Mo, metal Cu, metal Al, or an alloy.

For example, referring to fig. 20, fig. 20 is a schematic diagram illustrating an eighth conductive pattern formed on a pattern of a piezoelectric material layer according to an embodiment of the present disclosure. The eighth conductive material layer may be formed on the second surface of the substrate 10 on which the piezoelectric material layer pattern B2 is formed by any of various means such as deposition, coating, sputtering, and the like. Then, a patterning process is performed once on the eighth conductive material layer to form an eighth conductive pattern B3. The eighth conductive pattern B3 may include: receiving electrode 303.

Thereafter, the protective layer 110 is deposited, coated, sputtered, etc. in any of various ways on the second surface of the substrate 10 on which the eighth conductive pattern B3 is formed.

It should be noted that each patterning process in the above embodiments may include: photoresist coating, exposure, development, etching and photoresist stripping.

It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific principles of the display substrate described above may refer to the corresponding contents in the foregoing embodiments of the structure of the display substrate, and are not repeated herein.

It is noted that in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. Also, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layer or intervening layers may also be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may also be present. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intermediate layer or element may also be present. Like reference numerals refer to like elements throughout.

In this application, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" means two or more unless expressly limited otherwise.

The above description is intended to be exemplary only, and not to limit the present application, and any modifications, equivalents, improvements, etc. made within the spirit and scope of the present application are intended to be included therein.

Claims

1. A display substrate, comprising:

a substrate having a display area;

a photodetector device on the first surface of the substrate;

an ultrasonic device on a second surface of the substrate;

2. The display substrate of claim 1,

the display substrate further includes: a light emitting device on the first surface of the substrate, an orthographic projection of the photodetecting device on the substrate being offset from an orthographic projection of the light emitting device on the substrate.

3. The display substrate of claim 2,

the display substrate further includes: a detection circuit electrically connected to the photodetection device, and a driving circuit electrically connected to the light emitting device;

4. The display substrate of claim 3,

the photodetecting device includes: the first photosensitive electrode, the photosensitive structure and the second photosensitive electrode are stacked along the direction far away from the substrate, the first photosensitive electrode is electrically connected with the first grid electrode, the first photosensitive electrode and the first source drain electrode are arranged on the same layer, and the second photosensitive electrode is made of transparent electrode materials.

5. The display substrate of claim 4,

the light emitting device includes: an anode, an organic light-emitting layer, and a cathode laminated in a direction away from the substrate;

6. The display substrate of claim 3,

the substrate further has a non-display area, and the display substrate further includes: the signal routing is positioned in the non-display area, and the binding electrode is electrically connected with the signal routing;

7. The display substrate of claim 6,

the signal routing includes: the first sub-signal wire is electrically connected with the detection circuit, and the second sub-signal wire is electrically connected with the driving circuit;

8. The display substrate of claim 7,

the ultrasonic device further includes: and the second auxiliary electrode is electrically connected with the third sub-binding electrode and is arranged on the same layer as the binding electrode.

9. The display substrate according to any one of claims 1 to 8,

the display substrate further includes: the packaging structure is located on one side, away from the substrate, of the photoelectric detection device, and the protection layer is located on one side, away from the substrate, of the ultrasonic device.

10. A display device, comprising: a display substrate according to any one of claims 1 to 9.