CN210575035U - Array substrate and display panel - Google Patents
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- CN210575035U CN210575035U CN201922109469.XU CN201922109469U CN210575035U CN 210575035 U CN210575035 U CN 210575035U CN 201922109469 U CN201922109469 U CN 201922109469U CN 210575035 U CN210575035 U CN 210575035U
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Abstract
The embodiment of the utility model discloses array substrate and display panel. Wherein, the array substrate has display area and non-display area, and the array substrate includes: a plurality of pixel driving circuits located in the display region and a plurality of driving signal lines extending from the non-display region to the display region; the pixel driving circuits in one row or one column arranged along the extension direction of the driving signal line are divided into at least two pixel driving circuit groups; each pixel driving circuit group is electrically connected with one driving signal line; the lengths of at least two driving signal lines electrically connected with the pixel driving circuits in one row or one column comprise at least two different lengths, and the longer the length, the smaller the number of the pixel driving circuits in the pixel driving circuit group electrically connected with the driving signal line. The embodiment of the utility model provides a technical scheme can solve the increase of the last pixel number of jumbo size display panel, and the length of signal lines such as data line and scanning line increases, leads to the great problem of resistance-capacitance delay.
Description
Technical Field
The utility model relates to a show technical field, especially relate to an array substrate and display panel.
Background
An Organic Light-Emitting Diode (OLED) display panel, also called an Organic electroluminescent display panel, is a new flat display device, and has the advantages of simple manufacturing process, low cost, low power consumption, high brightness, thin and Light volume, fast response speed, easy realization of color display and large-screen display, easy realization of flexible display, and the like, thereby having a wide application prospect.
The OLED display panel includes: the array substrate comprises a plurality of pixel driving circuits, a data driving circuit, a scanning driving circuit, a light emitting control circuit and the like. The organic light-emitting device comprises a plurality of pixel driving circuits, a data driving circuit, a scanning driving circuit and a light-emitting control circuit, wherein the plurality of pixel driving circuits are used for driving an organic light-emitting device film layer to emit light, the data driving circuit is used for providing data voltage for the pixel driving circuits, the scanning driving circuit is used for providing scanning signals for the pixel driving circuits, and the light-emitting control circuit is used for providing light-emitting control signals for the pixel driving circuits and controlling the light-emitting time.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides an array substrate and display panel to solve along with the increase of display panel size and the improvement of resolution ratio, because the pixel number increases on the display panel, the length of signal lines such as data line and scanning line increases, leads to signal line resistance grow, RC Delay (signal Delay) increase during the transmission signal, and too big RC Delay can influence the luminance of display, contrast etc. thereby reduce the problem of demonstration quality.
In a first aspect, an embodiment of the present invention provides an array substrate, the array substrate has a display area and a non-display area, the array substrate includes:
a plurality of pixel driving circuits located in the display region and a plurality of driving signal lines extending from the non-display region to the display region;
the pixel driving circuits in one row or one column arranged along the extension direction of the driving signal line are divided into at least two pixel driving circuit groups; each pixel driving circuit group is electrically connected with one driving signal line; the lengths of at least two driving signal lines electrically connected with the pixel driving circuits in one row or one column comprise at least two different lengths, and the longer the length, the smaller the number of the pixel driving circuits in the pixel driving circuit group electrically connected with the driving signal line.
Further, the longer the length, the larger the width of the driving signal line.
Further, the driving signal line includes at least one of: scan lines, data lines, or light emission control lines.
Further, the array substrate further includes: and the signal driving circuit is positioned in the non-display area and is electrically connected with the plurality of driving signal wires.
Further, the signal driving circuit includes at least one of: a scan driving circuit, a data driving circuit, and a light emission control circuit.
Furthermore, the signal driving circuit comprises a first signal driving unit and a second signal driving unit which are separated by the display area and have the same extending direction with the driving signal lines electrically connected with the first signal driving unit and the second signal driving unit,
the display area includes a first sub-display area and a second sub-display area,
the first signal driving unit, the first sub-display area, the second sub-display area and the second signal driving unit are sequentially arranged along the extending direction of the driving signal lines electrically connected with the first signal driving unit and the second signal driving unit, the pixel driving circuit group positioned in the first sub-display area is electrically connected with the first signal driving unit through the corresponding driving signal lines, and the pixel driving circuit group positioned in the second sub-display area is electrically connected with the second signal driving unit through the corresponding driving signal lines.
Further, the first sub display area and the second sub display area are symmetrically disposed about a center of the display area.
Furthermore, at least two driving signal lines electrically connected with the pixel driving circuits in one row or one column are arranged in different layers.
Furthermore, at least two driving signal lines electrically connected with the odd-row pixel driving circuits are arranged in the same layer; at least two driving signal lines electrically connected with the even-numbered row pixel driving circuits are arranged in the same layer; at least two driving signal lines electrically connected with the odd-numbered row pixel driving circuits and at least two driving signal lines electrically connected with the even-numbered row pixel driving circuits are arranged in different layers;
or at least two driving signal lines electrically connected with the odd-numbered column pixel driving circuits are arranged in the same layer; at least two driving signal lines electrically connected with the even-numbered row pixel driving circuit are arranged in the same layer; at least two driving signal lines electrically connected with the odd-numbered column pixel driving circuits and at least two driving signal lines electrically connected with the even-numbered column pixel driving circuits are arranged in different layers.
In a second aspect, the embodiment of the present invention further provides a display panel, including the array substrate provided by any embodiment of the present invention.
The utility model discloses array substrate among the technical scheme has display area and non-display area, and array substrate includes: the pixel driving circuits are positioned in the display area and extend from the non-display area to the display area, wherein one row or one column of pixel driving circuits arranged along the extending direction of the driving signal lines are divided into at least two pixel driving circuit groups; each pixel driving circuit group is electrically connected with one driving signal line; the lengths of at least two driving signal lines electrically connected with one row or one column of pixel driving circuits comprise at least two different lengths, the number of the pixel driving circuits in the pixel driving circuit group electrically connected with the driving signal line with the longer length is smaller, so that the resistance-capacitance delay between the pixel driving circuits at two ends of the row or one column of pixel driving circuits is reduced, the uniformity of display is improved, and the problems that when the size of a display panel is larger, the row or one column of pixel driving circuits are electrically connected to the same driving signal line, the resistance-capacitance delay of the pixel driving circuits at the head end and the tail end of the row or one column of pixel driving circuits is larger, and the uniformity of display brightness is poorer are solved.
Drawings
Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a partial cross-sectional structure of an array substrate according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 7 is a schematic partial cross-sectional view of another array substrate according to an embodiment of the present invention;
fig. 8 is a schematic partial cross-sectional view of another array substrate according to an embodiment of the present invention;
fig. 9 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
The embodiment of the utility model provides an array substrate. Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention. The array substrate 1 has a display region 10 and a non-display region 20. The array substrate includes: a plurality of pixel driving circuits 30 located in the display region 10, and a plurality of driving signal lines extending from the non-display region 20 to the display region 10.
Wherein, a row or a column of pixel driving circuits 30 arranged along the extending direction of the driving signal line is divided into at least two pixel driving circuit groups 31; each pixel driving circuit group 31 is electrically connected with one driving signal line; the lengths of at least two driving signal lines electrically connected to the pixel driving circuits 30 in one row or one column include at least two different lengths, and the longer the length, the smaller the number of pixel driving circuits 30 in the pixel driving circuit group 31 to which the longer the driving signal line is electrically connected.
The array substrate 1 may be disposed in a display panel, such as a liquid crystal display panel or an organic light emitting display panel. Optionally, the driving signal line includes at least one of: scan lines, data lines, or light emission control lines. The driving signal line is used for transmitting a driving signal. The pixel driving circuit is electrically connected with the corresponding scanning line, data line, light-emitting control line and the like to receive scanning signals, data signals, light-emitting control signals and the like, so that the light-emitting brightness, time and the like of the corresponding light-emitting unit are independently controlled. The embodiment of the utility model provides a number to each row of pixel drive circuit 30 divided pixel drive circuit group 31 to and pixel drive circuit 30's in the pixel drive circuit group 31 number does not do the injecion, can set up as required. The number of pixel drive circuit groups 31 into which each row of pixel drive circuits 30 is divided may be the same or different. The drive signals of at least two drive signal lines electrically connected to the pixel drive circuits 30 of one row or one column may be the same. At least two pixel driving circuit groups 31 into which the pixel driving circuits 30 of one row or one column are divided are electrically connected to different driving signal lines.
Fig. 1 exemplarily shows a case where the driving signal lines are only the scanning lines 41. Among them, the scan lines 41 may extend in the row direction X, the data lines 42 may extend in the column direction Y, and the light emission control lines 43 may extend in the row direction X. Fig. 1 exemplarily shows that the pixel driving circuits 30 in one row are divided into two pixel driving circuit groups 31, and the number of the pixel driving circuits 30 in the two pixel driving circuit groups 31 is 2 and 4, respectively. Among them, the length of the scanning line 41 electrically connected to the pixel drive circuit group 31 including the 2 pixel drive circuits 30 is long; the length of the scanning line 41 electrically connected to the pixel drive circuit group 31 including the 4 pixel drive circuits 30 is short. It should be noted that fig. 2 is a schematic diagram of a partial cross-sectional structure of an array substrate according to an embodiment of the present invention, where any one of the pixel driving circuits 30 may include a thin film transistor 32, a storage capacitor 33, and the thin film transistor 32 in the pixel driving circuit 30 includes: an active layer 301, a gate insulating layer 302, a gate layer 303, a source-drain layer 304, an interlayer insulating layer 305, and the like. The active layer 301 includes a source region, a channel region, and a drain region. A parasitic capacitance exists between the source/drain layer 304 of the thin film transistor 32 and the gate layer 303.
The total resistance value of one driving signal line is:
wherein R isCTotal resistance-capacitance resistance, R, of pixel driving circuit connected to driving signal lineC＝n×ΔRC，ΔRCIs a resistance-capacitance resistor of the pixel drive circuit 30, a parasitic capacitance between a source drain layer and a gate layer of a thin film transistor connected with a drive signal line, n is the number of the pixel drive circuits 30 in the pixel drive circuit group 31, RLTo drive the total line resistance value of the signal line,
rho is the resistivity of the driving signal line, l is the length of the driving signal line, S is the cross-sectional area of the driving signal line, d is the width of the driving signal line, and t is the film thickness of the driving signal line. It can be seen that, as the number of pixel drive circuits connected to one drive signal line increases, the length of the drive signal line increases, and the total resistance value R of the drive signal line increasesCThe larger the total line resistance value R (the larger the number of pixel drive circuits-the larger the resistance-capacitance resistance), the larger the total line resistance value RL(the longer the drive signal line length), the larger the total resistance value RGeneral assemblyThe larger the rc delay, the more severe the rc delay affects the charging rate and charging voltage of the driving signal lines to the pixel driving circuit, thereby affecting the uniformity of the display. In the pixel driving circuit group 31, there is a resistance-capacitance delay between the pixel driving circuits; in the same pixel driving circuit group 31, the resistance-capacitance delay between the pixel driving circuits at the two ends is the largest; the larger the number of pixel drive circuits in the pixel drive circuit group 31 is, the larger the resistance-capacitance delay of the pixel drive circuits located at both ends of the pixel drive circuit group 31 is.
By dividing the pixel driving circuits 30 of one row or one column into at least two pixel driving circuit groups 31 electrically connected to the driving signal lines having different lengths, the number of the pixel driving circuits 30 in the pixel driving circuit group 31 electrically connected to the driving signal line having the longer length is smaller, so that the total resistance-capacitance value R of the pixel driving circuit group 31 electrically connected to the driving signal line having the longer length is made smallerCSmaller than the total resistance value R of the pixel drive circuit group 31 electrically connected to the drive signal line having a shorter lengthCTotal line resistance R of the drive signal line due to the long lengthLGreater than the total line resistance R of the shorter drive signal lineLSo that the total resistance value R of at least two driving signal lines connected to the at least two pixel driving circuit groups 31General assemblyThe difference value of the voltage difference value is reduced, even is approximately equal, so that the resistance-capacitance delay between the driving signals transmitted to the pixel driving circuits at two ends of the pixel driving circuit in a row (as shown in fig. 1) or a column through the driving signal lines with different lengths is reduced, the charging speed of the pixel driving circuits at two ends of the pixel driving circuit in the row or the column is approximate, the uniformity of display is improved, and the problems that when the size of the display panel is larger, the pixel driving circuits in the row or the column are electrically connected to the same driving signal line, the resistance-capacitance delay of the pixel driving circuits at the head end and the tail end of the row or the column is larger, the difference between the charging speed and the charging voltage is larger, and the uniformity of picture display is poorer are solved.
The array substrate in the technical scheme of this embodiment has a display area and a non-display area, and the array substrate includes: the pixel driving circuits are positioned in the display area and extend from the non-display area to the display area, wherein one row or one column of pixel driving circuits arranged along the extending direction of the driving signal lines are divided into at least two pixel driving circuit groups; each pixel driving circuit group is electrically connected with one driving signal line; the lengths of at least two driving signal lines electrically connected with one row or one column of pixel driving circuits comprise at least two different lengths, the number of the pixel driving circuits in the pixel driving circuit group electrically connected with the driving signal line with the longer length is smaller, so that the resistance-capacitance delay between the pixel driving circuits at two ends of the row or one column of pixel driving circuits is reduced, the uniformity of display is improved, and the problems that when the size of a display panel is larger, the row or one column of pixel driving circuits are electrically connected to the same driving signal line, the resistance-capacitance delay of the pixel driving circuits at the head end and the tail end of the row or one column of pixel driving circuits is larger, and the uniformity of display brightness is poorer are solved.
Fig. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention. In addition to the above embodiments, the longer the length, the larger the width of the driving signal line.
Fig. 3 exemplarily shows a case where the driving signal line is only the data line 42. Fig. 3 exemplarily shows that the pixel driving circuits 30 in one column are divided into two pixel driving circuit groups 31, and the number of the pixel driving circuits 30 in the two pixel driving circuit groups 31 is 2 and 4, respectively. Among them, the data line 42 electrically connected to the pixel driving circuit group 31 including the 2 pixel driving circuits 30 is long in length and large in width; the data line 42 electrically connected to the pixel driving circuit group 31 including the 4 pixel driving circuits 30 is short in length and small in width. By increasing the width of the driving signal line with a long length, the total line resistance value R of the driving signal line with a long length is increasedLDecreases so that the total resistance value R of at least two driving signal lines connected to the at least two pixel driving circuit groups 31General assemblyThe difference value of (a) is further reduced, even close to the same, so that the resistance-capacitance delay between the driving signals transmitted to the pixel driving circuits at the two ends of the pixel driving circuit in a row or a column (as shown in fig. 3) through the driving signal lines with different lengths and widths is reduced, the charging speeds of the pixel driving circuits at the two ends of the pixel driving circuit in a row or a column 30 are close, the uniformity of display is further improved, and the problems that when the size of the display panel is larger, the pixel driving circuits in a row or a column are electrically connected to the same driving signal line, the resistance-capacitance delay of the pixel driving circuits at the head end and the tail end of the row or the column is larger, and the uniformity of display brightness is poorer are solved.
Fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention. On the basis of the above embodiment, the array substrate 1 further includes: the signal driving circuit 50 is located in the non-display area 20 and electrically connected to the plurality of driving signal lines.
Here, fig. 4 exemplarily shows a case where the driving signal line is only the emission control line 43. At least two driving signal lines electrically connected to the pixel driving circuits 30 of one row or one column may be electrically connected to the same output terminal or different output terminals of the signal driving circuit 50. Optionally, the signal driving circuit 50 includes at least one of: a scan driving circuit, a data driving circuit, and a light emission control circuit. If the driving signal lines include the scan lines, the signal driving circuit 50 includes a scan driving circuit; if the driving signal line includes a data line, the signal driving circuit 50 includes a data driving circuit; if the driving signal line includes a light emission control line, the signal driving circuit 50 includes a light emission control circuit.
Fig. 5 is a schematic structural diagram of another array substrate according to an embodiment of the present invention. On the basis of the above embodiment, the signal driving circuit includes the first signal driving unit 51 and the second signal driving unit 52, which are spaced apart from the display area 10, and the extending direction of the driving signal lines electrically connected to the first signal driving unit 51 and the second signal driving unit 52 is the same. The display area 10 includes a first sub-display area 11 and a second sub-display area 12. The first signal driving unit 51, the first sub-display area 11, the second sub-display area 12, and the second signal driving unit 52 are sequentially arranged along an extending direction of driving signal lines electrically connected to the first signal driving unit 51 and the second signal driving unit 52, the pixel driving circuit group 31 located in the first sub-display area 11 is electrically connected to the first signal driving unit 51 through the corresponding driving signal line, and the pixel driving circuit group 31 located in the second sub-display area 12 is electrically connected to the second signal driving unit 52 through the corresponding driving signal line.
Fig. 5 exemplarily shows a case where the driving signal line is only the data line 42. The first signal driving unit 51 and the second signal driving unit 52 are disposed on two opposite frames, for example, may be disposed on a left frame and a right frame, respectively, or disposed on an upper frame and a lower frame, respectively, to drive the pixel driving circuits in adjacent sub-display regions, respectively, so as to reduce the resistance-capacitance delay between the pixel driving circuits at two ends of a row or a column of pixel driving circuits in the sub-display regions, so as to improve the uniformity of display. In any sub-display region, one or more driving signal lines may be electrically connected to the pixel driving circuits 30 in one row or one column, and if there are more driving signal lines electrically connected to the pixel driving circuits 30 in one row or one column, the driving signal lines may be electrically connected to the same output terminal or different output terminals of the corresponding signal driving unit.
Fig. 6 is a schematic structural diagram of another array substrate according to an embodiment of the present invention. On the basis of the above-described embodiment, the first sub-display section 11 and the second sub-display section 12 are disposed symmetrically with respect to the center O of the display section 10.
The first sub-display area 11 and the second sub-display area 12 equally divide the whole display area 10, and the first sub-display area 11 and the second sub-display area 12 can be symmetrically arranged, so that the length of the driving signal line with the longest length is reduced, the resistance-capacitance delay is reduced, and the uniformity of picture display is improved. The length of the driving signal line having the longest length in the first sub-display region 11 is equal to the length of the driving signal line having the longest length in the second sub-display region 12.
Fig. 7 is a schematic partial cross-sectional view of another array substrate according to an embodiment of the present invention. In addition to the above embodiments, as shown in fig. 6 and 7, if the extending direction of the driving signal lines is the row direction X, at least two driving signal lines 40 electrically connected to the odd-numbered row pixel driving circuits 30 are disposed in the same layer; at least two driving signal lines 40 electrically connected with the even-numbered row pixel driving circuits 30 are arranged in the same layer; at least two driving signal lines 40 electrically connected to the odd-numbered row pixel driving circuits 30 and at least two driving signal lines 40 electrically connected to the even-numbered row pixel driving circuits 30 are provided in different layers.
Fig. 7 may be a schematic cross-sectional structure along the direction AB in fig. 6, and the driving signal lines in fig. 6 and 7 are only scanning lines. Fig. 7 exemplarily shows two driving signal lines 40 electrically connected to the first row pixel driving circuit 30, which are located in the region 401; two driving signal lines 40 electrically connected to the second row pixel driving circuits 30, and located in the region 402; two driving signal lines 40 electrically connected to the pixel driving circuits 30 in the third row are located in the region 403. Due to the fact that the driving signal lines 40 connected with the pixel driving circuits of the adjacent rows are arranged in different layers, the distance D between the driving signal lines 40 connected with the pixel driving circuits of the adjacent rows can be reduced, the electrical distance can meet the requirements, and meanwhile the situation that the resolution of pixels is reduced due to the fact that the number of the signal lines is increased and the size of a single pixel is increased is avoided. It should be noted that the requirement for the distance between the signal lines arranged on the same layer is relatively large, and the requirement for the distance between the signal lines arranged on different layers is relatively small, so that the wiring requirement can be met.
Alternatively, on the basis of the above embodiment, as shown in fig. 3 and 7, if the extending direction of the driving signal line is the column direction Y, at least two driving signal lines 40 electrically connected to the odd-numbered column pixel driving circuits 30 are disposed in the same layer; at least two driving signal lines 40 electrically connected with the even-numbered row pixel driving circuit 30 are arranged in the same layer; at least two driving signal lines 40 electrically connected to the odd-numbered column pixel driving circuits 30 and at least two driving signal lines 40 electrically connected to the even-numbered column pixel driving circuits 30 are provided in different layers.
Fig. 7 may also be a schematic cross-sectional structure along the direction AB in fig. 3, and the driving signal lines in fig. 3 and 7 are only data lines. Fig. 7 exemplarily shows two driving signal lines 40 electrically connected to the first column of pixel driving circuits 30, which are located in the region 401; two driving signal lines 40 electrically connected to the second column pixel driving circuit 30, and located in the region 402; two driving signal lines 40 electrically connected to the pixel driving circuit 30 of the third column are located in the region 403.
Fig. 8 is a schematic partial cross-sectional view of another array substrate according to an embodiment of the present invention. On the basis of the above embodiment, at least two driving signal lines 40 electrically connected to the pixel driving circuits 30 of one row or one column are provided in different layers.
Fig. 8 is a schematic cross-sectional view along the direction AB in fig. 3 or fig. 6, and in conjunction with fig. 3 and fig. 8, the driving signal lines in fig. 3 and fig. 8 are only data lines; as shown in fig. 6 and 8 in combination, the driving signal lines in fig. 6 and 8 are only scanning lines. Fig. 8 exemplarily shows two driving signal lines 40 electrically connected to the pixel driving circuits 30 of the first row or the first column, which are located in the region 404; two driving signal lines 40 electrically connected to the second row or second column pixel driving circuits 30, located in the region 405; two driving signal lines 40 electrically connected to the pixel driving circuits 30 of the third row or the third column are located in the region 406, and two driving signal lines 40 electrically connected to the pixel driving circuits 30 of the fourth row or the fourth column are located in the region 407. By arranging at least two driving signal lines 40 electrically connected with the pixel driving circuits 30 in one row or one column in a different-layer insulation manner, the situation that the resolution of a pixel is reduced due to the fact that the number of signal lines is increased and the size of a single pixel is increased is avoided.
The scan lines and the data lines are provided to be insulated from each other, and the light-emitting control lines and the data lines are provided to be insulated from each other.
An embodiment of the utility model provides a display panel. Fig. 9 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention. The display panel comprises the array substrate 1 provided by any embodiment of the utility model.
The display panel may be a liquid crystal display panel or an organic light emitting display panel. Fig. 9 exemplarily shows a case where the display panel is an organic light emitting display panel. Optionally, if the display panel is an organic light emitting display panel, the display panel further includes an organic light emitting device film layer 2 and a thin film encapsulation layer 3. The organic light emitting device film layer 2 may include an anode, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, and a cathode. The embodiment of the utility model provides a display panel includes the array substrate in the above-mentioned embodiment, consequently the embodiment of the utility model provides a display panel also possesses the beneficial effect that the above-mentioned embodiment described, and this is no longer repeated here.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. An array substrate having a display region and a non-display region, the array substrate comprising:
a plurality of pixel driving circuits located in the display region and a plurality of driving signal lines extending from the non-display region to the display region;
the pixel driving circuits in one row or one column arranged along the extension direction of the driving signal line are divided into at least two pixel driving circuit groups; each pixel driving circuit group is electrically connected with one driving signal line; the lengths of at least two driving signal lines electrically connected with the pixel driving circuits in one row or one column comprise at least two different lengths, and the longer the length, the smaller the number of the pixel driving circuits in the pixel driving circuit group electrically connected with the driving signal lines.
2. The array substrate of claim 1, wherein the drive signal lines have a greater width for longer lengths.
3. The array substrate of claim 1, wherein the driving signal lines comprise at least one of: scan lines, data lines, or light emission control lines.
4. The array substrate of claim 1, further comprising: and the signal driving circuit is positioned in the non-display area and is electrically connected with the plurality of driving signal wires.
5. The array substrate of claim 4, wherein the signal driving circuit comprises at least one of: a scan driving circuit, a data driving circuit, and a light emission control circuit.
6. The array substrate of claim 4, wherein the signal driving circuit comprises a first signal driving unit and a second signal driving unit separated by the display area, and the extending directions of the driving signal lines electrically connected with the first signal driving unit and the second signal driving unit are the same,
the display area comprises a first sub-display area and a second sub-display area,
the first signal driving unit, the first sub-display area, the second sub-display area and the second signal driving unit are sequentially arranged along the extending direction of the driving signal lines electrically connected with the first signal driving unit and the second signal driving unit, the pixel driving circuit group located in the first sub-display area is electrically connected with the first signal driving unit through the corresponding driving signal lines, and the pixel driving circuit group located in the second sub-display area is electrically connected with the second signal driving unit through the corresponding driving signal lines.
7. The array substrate of claim 6, wherein the first sub-display area and the second sub-display area are symmetrically arranged about a center of the display area.
8. The array substrate of claim 1 or 2, wherein at least two driving signal lines electrically connected to the pixel driving circuits of one row or one column are arranged in different layers.
9. The array substrate of claim 1 or 2, wherein at least two driving signal lines electrically connected to the odd-numbered row of pixel driving circuits are disposed in the same layer; at least two driving signal lines electrically connected with the even-numbered row pixel driving circuits are arranged in the same layer; at least two driving signal lines electrically connected with the odd-numbered row pixel driving circuits and at least two driving signal lines electrically connected with the even-numbered row pixel driving circuits are arranged in different layers;
or at least two driving signal lines electrically connected with the odd-numbered column pixel driving circuits are arranged in the same layer; at least two driving signal lines electrically connected with the even-numbered row pixel driving circuit are arranged in the same layer; at least two driving signal lines electrically connected with the odd-numbered column pixel driving circuits and at least two driving signal lines electrically connected with the even-numbered column pixel driving circuits are arranged in different layers.
10. A display panel comprising the array substrate according to any one of claims 1 to 9.
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| CN111951691A (en) * | 2020-08-25 | 2020-11-17 | 上海天马微电子有限公司 | Display panel and display device |
| CN112419977A (en) * | 2020-11-27 | 2021-02-26 | 云谷（固安）科技有限公司 | Display panel and display device |
| WO2022116333A1 (en) * | 2020-12-04 | 2022-06-09 | Tcl华星光电技术有限公司 | Display device and driving method therefor |
| WO2022134019A1 (en) * | 2020-12-25 | 2022-06-30 | 京东方科技集团股份有限公司 | Drive backplane and display apparatus |
| CN115512659A (en) * | 2022-09-30 | 2022-12-23 | 厦门天马显示科技有限公司 | Array substrate, display panel and display device |
| WO2023000830A1 (en) * | 2021-07-19 | 2023-01-26 | Oppo广东移动通信有限公司 | Display module and display device |
| US11935484B2 (en) | 2020-10-23 | 2024-03-19 | Hefei Boe Joint Technology Co., Ltd. | Display panel and display apparatus |
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2019
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| CN112419977A (en) * | 2020-11-27 | 2021-02-26 | 云谷（固安）科技有限公司 | Display panel and display device |
| WO2022116333A1 (en) * | 2020-12-04 | 2022-06-09 | Tcl华星光电技术有限公司 | Display device and driving method therefor |
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