CN210572761U

CN210572761U - Structure for carrying out BD receiving transformation on GPS common-view receiver

Info

Publication number: CN210572761U
Application number: CN201920897124.2U
Authority: CN
Inventors: 朱亚; 邱祖雄; 马广新; 杨涛
Original assignee: Shanghai Taitan Communication Engineering Co ltd
Current assignee: Shanghai Taitan Communication Engineering Co ltd
Priority date: 2019-06-14
Filing date: 2019-06-14
Publication date: 2020-05-19
Anticipated expiration: 2029-06-14

Abstract

The utility model provides a carry out the structure that BD received the transformation with GPS common vision receiver, it is provided with the translation circuit including common vision receiver between common vision receiver and big dipper receiver, the translation circuit includes: the main control chip U1; pins 1, 24, 36, 48 and 9 of the main control chip U1 are connected with the positive electrode of a 3.3V power supply; pins 5 and 6 of the main control chip U1 are connected with a crystal oscillator circuit; the 7-pin reset circuit of the main control chip U1; pins 8, 23, 35 and 47 of the main control chip U1 are grounded; the 12 pins and the 13 pins of the main control chip U1 are connected with a common-view receiver; the pin 20 of the main control chip U1 is grounded through a resistor R7; the 30 pins and the 31 pins of the main control chip U1 are connected with a Beidou receiver; the pin 44 of the main control chip U1 is grounded through a resistor R6. The structure can effectively improve the data security of remote co-view comparison in China.

Description

Structure for carrying out BD receiving transformation on GPS common-view receiver

Technical Field

The utility model relates to the field of communication technology, especially, relate to a carry out BD with GPS common vision receiver and receive structure of transformation.

Background

The principle of GPS remote co-view comparison is shown in fig. 1, where GPS co-view receivers located in a user laboratory and a reference site receive signals from the same GPS satellite at the same time. Two laboratories compare their local hydrogen clocks or cesium clocks with a GPS co-vision receiver to obtain the difference between the clock of the station under test and the clock of the reference station, and if the difference is too large, perform the necessary calibration. Therefore, remote tracing and comparison of the time and frequency signals with high precision are tested, and remote transmission of the high-precision time frequency signals is realized.

At present, remote comparison equipment used in national time service centers, measurement institutions, measurement and control stations and the like in China is a GPS (global positioning system) common-view receiver based on GPS signals, but the GPS signals are controlled by American military, and once the American military closes GPS information transmission for some reason, the remote common-view comparison equipment based on the GPS signals becomes a pile of scrap iron and is applied to safety and high-precision time frequency of crisis countries.

Based on the reasons, some companies in China develop a BD-based common-view receiver successively, but the core technology of the common-view comparison is not completely mastered in China, so that the precision of the common-view comparison is not high, and the common-view comparison cannot actually replace a GPS common-view receiver imported from abroad.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a carry out BD with GPS common vision method receiver and receive the structure of transformation, it can improve the long-range data security of looking the comparison altogether of china.

The utility model provides a carry out BD with GPS common vision receiver and receive structure of transformation, it is provided with translation circuit including common vision receiver between common vision receiver and big dipper receiver, translation circuit includes:

the main control chip U1;

pins

1, 24, 36, 48 and 9 of the main control chip U1 are connected with the positive electrode of a 3.3V power supply;

pins

2, 3, 4, 10-11, 14-19, 21-22, 25-29, 32-34 and 37-46 of the main control chip U1 are empty pins;

pins

5 and 6 of the main control chip U1 are connected with a crystal oscillator circuit;

the 7-pin reset circuit of the main control chip U1;

pins

8, 23, 35 and 47 of the main control chip U1 are grounded;

the 12 pins and the 13 pins of the main control chip U1 are connected with a common-view receiver;

the pin 20 of the main control chip U1 is grounded through a resistor R7;

the 30 pins and the 31 pins of the main control chip U1 are connected with a Beidou receiver;

the pin 44 of the main control chip U1 is grounded through a resistor R6.

Compared with the prior art, the utility model provides a carry out the structure that the BD received the transformation with GPS common vision receiver the former dress import based on GPS common vision receiver look through the change, can effectively improve the long-range data safety of comparing of looking altogether of china to, reform transform simple structure, cost economy.

Further, the main control chip U1 is STM32F103CBT6 singlechip.

Further, the crystal oscillator circuit includes: the circuit comprises a crystal oscillator Y, a capacitor C5 and a capacitor C6, wherein the crystal oscillator Y is connected between a pin 5 and a pin 6 of a control chip U1, the capacitor C5 is connected with a pin 5 of a control chip U1, the capacitor C6 is connected with a pin 6 of the control chip, and the other ends of the capacitor C5 and the capacitor C6 are grounded.

Further, the reset circuit includes: the circuit comprises a resistor R1, a capacitor C7 and an RES recovery switch, wherein one end of the resistor R1 is connected with a main control chip U1, the other end of the resistor R1 is connected with a pin 7 of the main control chip U1, the capacitor C7 and the RES recovery switch, and the other ends of the RES recovery switch and the capacitor C7 are grounded.

Further, the power circuit connected with the

pins

1, 24, 36, 48 and 9 of the main control chip U1 includes:

a 5V power-on plug circuit;

the 5V-3.3V DC-DC conversion circuit is connected with a 5V electrified plug circuit, the 3.3V power output end of the 5V-3.3V DC-DC conversion circuit is connected with

pins

1, 24, 36, 48 and 9 of a main control chip U1, and the 5V-3.3V DC-DC conversion circuit is connected with a 3.3V power indication circuit, a reset circuit and a power filter circuit.

Drawings

Fig. 1 is a schematic diagram of GPS remote co-view alignment in the background art.

Fig. 2 is a schematic block diagram of a GPS common view receiver.

Fig. 3 is a schematic block diagram of a structure for implementing BD reception modification on a GPS common-view receiver according to an embodiment of the present invention.

FIG. 4a is a wiring diagram of the STM32 single chip microcomputer.

FIG. 4b is a circuit diagram of a crystal oscillator externally connected with an STM32 single chip microcomputer.

FIG. 4c is a reset circuit diagram externally connected with the STM32 single chip microcomputer.

Fig. 4d shows a 3.3V power supply indicating circuit.

Fig. 4e shows a 5V-3.3V DC-DC converter circuit.

Fig. 4f shows a power filter circuit.

Fig. 4g is a 5V power on plug circuit.

Fig. 5 is a schematic diagram of the TRIMBLE SMT-360 BD receiver connection.

Detailed Description

The present invention will now be described in more detail with reference to the drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art could modify the invention herein described while still achieving the beneficial effects of the invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.

Refer to fig. 2 for former quick-witted circuit schematic block diagram of GPS common vision method receiver, fig. 3 is the embodiment of the utility model provides a carry out the structure schematic block diagram that BD received the transformation with GPS common vision method receiver, can see from the picture, the utility model discloses aim at increasing a translation circuit of compriseing STM32 singlechip between former BD module (big dipper module) and former CPU (former GPS common vision method receiver CPU), on the one hand BD receiver (big dipper receiver) adopts 115200 baud rate high-speed communication with STM32 singlechip, then the STM32 singlechip adopts (the same instruction with GPS receiving module with former inside CPU of common vision method receiver, data format, rate) communication, and former common vision method receiver inside CPU procedure does not do any change promptly.

The invention is described in detail below with reference to fig. 4 a-5:

the utility model discloses a carry out BD with GPS common vision method receiver and receive structure of transformation, it includes common vision method receiver, is provided with translation circuit between common vision method receiver and big dipper receiver, see figure 4a, translation circuit includes main control chip U1, and main control chip U1 is STM32F103CBT6 singlechip, 1 foot, 24 feet, 36 feet, 48 feet, 9 feet of main control chip U1 connect 3.3V power positive pole;

pins

2, 3, 4, 10-11, 14-19, 21-22, 25-29, 32-34 and 37-46 of the main control chip U1 are empty pins; the 5 feet and 6 feet of the main control chip U1 are connected with a crystal oscillator circuit, and the crystal oscillator circuit comprises: the circuit comprises a crystal oscillator Y, a capacitor C5 and a capacitor C6, wherein the crystal oscillator Y is connected between a pin 5 and a pin 6 of a control chip U1 (see fig. 4b), the capacitor C5 is connected with a pin 5 of a control chip U1, the capacitor C6 is connected with a pin 6 of the control chip, and the other ends of the capacitor C5 and the capacitor C6 are grounded; the 7-pin reset circuit (see fig. 4c) of the master control chip U1 includes: the circuit comprises a resistor R1, a capacitor C7 and an RES recovery switch, wherein one end of the resistor R1 is connected with a main control chip U1, the other end of the resistor R1 is connected with a pin 7 of the main control chip U1, the capacitor C7 and the RES recovery switch, and the other ends of the RES recovery switch and the capacitor C7 are grounded;

pins

8, 23, 35 and 47 of the main control chip U1 are grounded; the 12 pins and the 13 pins of the main control chip U1 are connected with a common-view receiver; the pin 20 of the main control chip U1 is grounded through a resistor R7; the 30 pins and the 31 pins of the main control chip U1 are connected with a Beidou receiver; the pin 44 of the main control chip U1 is grounded through a resistor R6.

The utility model discloses a mode of control is monitored former GPS and is looked the communication between the inside GPS module of receiver and the CPU altogether, analyzes the instruction format that involves in its receiving and dispatching communication, data format, speed, initialization information and so on.

The utility model discloses well STM32 adopts two serial ports communication, and a serial ports adopts the high rate to communicate with the BD receiver, adopts the instruction set that the BD receiver acquiesces, and data format etc. then handles the back with STM32 singlechip, through another serial ports output, the instruction format of output, data format, rate etc. are unanimous completely with former GPS module, have nevertheless increased the data of BD satellite.

It should be noted that the utility model discloses need increase daughter board, fix BD receiver and STM32 singlechip on daughter board, then from former common vision receiver grafting 5V power supply, RX/TX communication etc..

The utility model discloses on the 1PPS information pin of former GPS is directly linked to the 1PPS signal of BD receiver output, do not make any change.

Referring to fig. 4d-4g, the power circuit connected to the

pins

1, 24, 36, 48 and 9 of the main control chip U1 includes: a 5V power-on plug circuit; the 5V-3.3V DC-DC conversion circuit is connected with a 5V electrified plug circuit, the 3.3V power output end of the 5V-3.3V DC-DC conversion circuit is connected with

pins

1, 2, 36, 48 and 9 of a main control chip U1, and the 5V-3.3V DC-DC conversion circuit is connected with a 3.3V power indication circuit, a reset circuit and a power filter circuit.

Fig. 4D shows a 3.3V power indicator circuit, which includes a resistor R2 and a light emitting diode D1 connected to the resistor R2, wherein the other end of the light emitting diode D1 is grounded, and the 3.3V power indicator circuit is connected to the 3.3V power output terminal of the 5V-3.3V DC-DC converter circuit.

Fig. 4e shows a 5V-3.3V DC-DC conversion circuit, which includes a control chip U3(LT1117-3.3), a capacitor C3 and a capacitor C4, wherein the pin 1 of the control chip U3 is grounded, the pin 2 is grounded, and the other end of the control chip U3 is grounded, and the pin 3 of the control chip U3 is grounded, such as a capacitor C1 and a capacitor C2. The 3-pin of the control chip U3 is connected with a 5V power supply, and the 2-pin outputs a 3.3V power supply.

Fig. 4f shows a power filter circuit, which includes a capacitor C8 and a capacitor C9 connected in parallel, wherein one end of the capacitors C8 and C9 connected in parallel is connected to the 3.3V power output end of the 5V-3.3V DC-DC converter circuit, and the other end is grounded.

Fig. 4g shows a 5V power-on plug circuit in which pin 1 of connector P1 is connected to a 5V-3.3V DC-DC converter circuit and pin 2 is connected to ground.

Referring to fig. 5, the diagram is a connection circuit diagram of a TRIMBLE SMT-360 BD receiver, the circuit includes a control chip U2, pins 1, 2, 4, 5, 14, 15, 18, 20, 24, 26, and 27 of the control chip U2 are grounded, pin 3 of the control chip U2 is connected to an active antenna, pins 7 to 13, 21 to 23, and 25 of the control chip U2 are hollow pins, pins 16 and 17 of the control chip U2 are connected to a beidou receiver, pin 19 of the control chip U2 is connected to a common-view receiver, pin 27 of the control chip U2 is connected to a power supply, pin 3 of the control chip U2 is further connected to an inductor L1, and the other end of the inductor L1 is connected to the power supply, a capacitor C1, a capacitor C2, a capacitor C1, and the other end of the capacitor C2 is grounded.

The utility model has the advantages that:

1. the original GPS common-view reception-based common-view receiver can be changed, so that the data security of remote common-view wrong in China is improved.

2. The change method is simple, the cost is low, the data security of the national remote co-view comparison can be improved, and the potential benefit is extremely high.

The above description is only for the preferred embodiment of the present invention, and does not limit the present invention. Any technical personnel who belongs to the technical field, in the scope that does not deviate from the technical scheme of the utility model, to the technical scheme and the technical content that the utility model discloses expose do the change such as the equivalent replacement of any form or modification, all belong to the content that does not break away from the technical scheme of the utility model, still belong to within the scope of protection of the utility model.

Claims

1. The utility model provides a structure that carries out BD with GPS common vision method receiver and receives transformation, its includes common vision method receiver, its characterized in that is provided with translation circuit between common vision method receiver and big dipper receiver, translation circuit includes:

the main control chip U1;

pins 1, 24, 36, 48 and 9 of the main control chip U1 are connected with the positive electrode of a 3.3V power supply;

pins 2, 3, 4, 10-11, 14-19, 21-22, 25-29, 32-34 and 37-46 of the main control chip U1 are empty pins;

pins 5 and 6 of the main control chip U1 are connected with a crystal oscillator circuit;

the 7-pin reset circuit of the main control chip U1;

pins 8, 23, 35 and 47 of the main control chip U1 are grounded;

the pin 20 of the main control chip U1 is grounded through a resistor R7;

the pin 44 of the main control chip U1 is grounded through a resistor R6.

2. The structure of claim 1, wherein the main control chip U1 is an STM32F103CBT6 single chip microcomputer.

3. The structure of claim 1, wherein the crystal oscillator circuit comprises: the circuit comprises a crystal oscillator Y, a capacitor C5 and a capacitor C6, wherein the crystal oscillator Y is connected between a pin 5 and a pin 6 of a control chip U1, the capacitor C5 is connected with a pin 5 of a control chip U1, the capacitor C6 is connected with a pin 6 of the control chip, and the other ends of the capacitor C5 and the capacitor C6 are grounded.

4. The structure of claim 1, wherein the reset circuit comprises: the circuit comprises a resistor R1, a capacitor C7 and an RES recovery switch, wherein one end of the resistor R1 is connected with a main control chip U1, the other end of the resistor R1 is connected with a pin 7 of the main control chip U1, the capacitor C7 and the RES recovery switch, and the other ends of the RES recovery switch and the capacitor C7 are grounded.

5. The structure of claim 1, wherein the power circuit connected to the pin 1, the pin 24, the pin 36, the pin 48, and the pin 9 of the main control chip U1 comprises:

a 5V power-on plug circuit;

the 5V-3.3V DC-DC conversion circuit is connected with a 5V electrified plug circuit, the 3.3V power output end of the 5V-3.3V DC-DC conversion circuit is connected with pins 1, 24, 36, 48 and 9 of a main control chip U1, and the 5V-3.3V DC-DC conversion circuit is connected with a 3.3V power indication circuit, a reset circuit and a power filter circuit.