CN210536506U - Device for inhibiting power frequency ripple of digital converter - Google Patents
Device for inhibiting power frequency ripple of digital converter Download PDFInfo
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- CN210536506U CN210536506U CN201921911604.6U CN201921911604U CN210536506U CN 210536506 U CN210536506 U CN 210536506U CN 201921911604 U CN201921911604 U CN 201921911604U CN 210536506 U CN210536506 U CN 210536506U
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Abstract
The utility model provides a device for inhibiting the power frequency ripple of a digital converter; the power frequency ripple control circuit comprises a power frequency ripple sampling circuit module, a voltage control module, a ripple control module, a PWM control module and an isolation driving module. The utility model effectively inhibits the power frequency ripple of the digital converter by improving the method of power frequency ripple extraction and the digital controller, avoids the defect of filtering the power frequency ripple by using a large number of energy storage elements, reduces the design cost and simultaneously reduces the volume of the digital converter; the utility model discloses an improve sampling circuit and carry out accurate extraction to the power frequency ripple to in superposing the power frequency ripple to the voltage given benchmark of voltage ring main control unit, compensate the PI controller can appear the shortcoming of static error when tracking sinusoidal signal, add the ripple control ring that uses quasi-resonance control; the device of the utility model has the advantages of ingenious design, low cost and obvious effect.
Description
Technical Field
The utility model relates to an electronic information field; and more particularly, to an apparatus for suppressing power frequency ripple of a digital converter.
Background
At present, the used power frequency ripple suppression method mainly adopts the method that a filter circuit is added at an output end to filter out power frequency ripples mixed in the output, so that an extra energy storage element is inevitably introduced, and the hardware cost and the volume of the converter are increased. The purpose of the innovation is to provide a method and a device for effectively inhibiting the power frequency ripple of the converter on the premise of not increasing the design cost and the product volume.
The power frequency ripple contained in the output voltage of the digital converter only occupies a very small part relative to the actual output voltage, and the current output voltage sampling can reduce and smooth the voltage multiple on the sampling circuit in order to prevent the sampling overrun and the clutter interference, so that the power frequency ripple is greatly attenuated in the actual sampling circuit, and the phenomenon that the digital converter cannot well extract the power frequency ripple is caused.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a device for restraining digital converter's power frequency ripple.
In a first aspect, the present invention is realized by the following technical solution:
the utility model relates to a device for restraining power frequency ripple of digital converter, including power frequency ripple sampling circuit module, voltage control module, ripple control module, PWM control module and isolation drive module.
Preferably, the ripple control module is a ripple loop control module.
Preferably, the power frequency ripple sampling circuit module and the voltage sampling circuit module are respectively connected with an output voltage end of the digital converter;
the voltage control module, the ripple control module, the PWM control module and the isolation driving module are arranged among the power frequency ripple sampling circuit module, the voltage sampling circuit module and the digital converter.
Preferably, the power frequency ripple sampling circuit module is connected with the ripple control module and is connected with the voltage control module to form a parallel connection, and then is connected with the PWM control module and the isolation driving module.
Preferably, the power frequency ripple sampling circuit module comprises capacitors C1, C2 and C3 and resistors R1, R2, R3, R4, R5 and R6.
Preferably, the capacitor C1 is connected with R1 and R3, the C2 and C3 are connected in parallel, and the C2 is connected with R5 and R6.
Preferably, the band-pass filter composed of R4, C2, C3 and R5 has a bandwidth of 10hz and a center frequency of 50 hz.
Preferably, in the power frequency ripple sampling circuit module, because the power frequency ripple is sampled as an alternating current signal, positive and negative voltages exist, and the dsp can only collect a signal with a positive voltage, a voltage rise of 1.65v needs to be performed on an AD sampling port signal, and finally, the voltage at the Vad port should be a voltage signal of 0-3.3 v.
Preferably, the voltage control adopts PI control, and the power frequency ripple extracted by the power frequency ripple sampling circuit is superposed on the set value of the output voltage in the control process to correct the difference between the sampled output voltage and the set value.
Preferably, the functional formula involved in the ripple control module is:
wherein KRQuasi-resonant controller coefficient, ωcQuasi-resonant controller bandwidth, ω0At a resonance frequency
Discretizing by aligning resonance controller by bilinear transformation method
The discretized time domain difference equation of the ripple ring quasi-resonance controller is as follows:
u(k)＝b0e(k)+b1e(k-1)+b2e(k-2)-a1u(k-1)-a2u(k-2)
wherein G isv(s) is a transfer function of the main control voltage ring, GR(s)For additional ripple quasi-resonant controller transfer function, H1(s) is the transfer function of the existing voltage sampling circuit, H2(s) is the transfer function of the power frequency ripple sampling circuit, VOIs the actual output voltage of the converter, VRippleFor line frequency ripple, V, of the convertersetIs the desired output voltage of the converter.
The utility model discloses an improve sampling circuit and carry out accurate extraction to the power frequency ripple to stack the power frequency ripple in the voltage given reference of voltage ring main control unit. In order to make up for the defect that a static error occurs when a PI controller tracks a sinusoidal signal, a ripple control loop using quasi-resonance control is additionally arranged.
Aiming at the problem that power frequency ripples contained in the output voltage of the digital converter in the prior art only account for a very small part of the actual output voltage, the existing output voltage sampling can reduce and smooth the voltage multiple on a sampling circuit in order to prevent sampling overrun and clutter interference, so that the power frequency ripples are greatly attenuated in the actual sampling circuit, and the phenomenon that the digital converter cannot well extract the power frequency ripples is caused.
The utility model discloses a fine obtaining power frequency ripple sampling, this device at first carries out the alternating current signal sampling to output voltage and amplifies the alternating current content part that obtains in the output voltage with this, secondly adds power frequency band-pass filter on sampling circuit in order to prevent high frequency noise and load sudden change to the interference of voltage, just so can obtain the sampling of purer power frequency ripple.
The method of the utility model has the following advantages:
(1) the utility model effectively inhibits the power frequency ripple of the digital converter by improving the method of power frequency ripple extraction and the digital controller, avoids the defect of filtering the power frequency ripple by using a large number of energy storage elements, reduces the design cost and simultaneously reduces the volume of the digital converter;
(2) in order to achieve the creativity of the utility model, the utility model accurately extracts the power frequency ripple wave by improving the sampling circuit and superimposes the power frequency ripple wave on the voltage given reference of the voltage ring main controller;
(3) in order to further make up for the defect that a static error can occur when a PI controller tracks a sinusoidal signal, the utility model is additionally provided with a ripple wave control loop using quasi-resonance control;
(4) the utility model aims to provide a method and a device for effectively inhibiting the power frequency ripple of a converter on the premise of not increasing the design cost and the product volume;
(5) the device of the utility model has the advantages of ingenious design, low cost and obvious effect.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a block diagram of the present invention;
FIG. 2 is the power frequency ripple sampling circuit of the present invention;
fig. 3 is a control block diagram of the apparatus of the present invention.
Detailed Description
The present invention will be described in detail with reference to the following embodiments. It should be noted that the following examples are only illustrative of the present invention, but the scope of the present invention is not limited to the following examples.
Example 1
The embodiment is realized by the following technical scheme:
the embodiment relates to a device for inhibiting power frequency ripples of a digital converter, which comprises a power frequency ripple sampling circuit module, a voltage control module, a ripple control module, a PWM control module and an isolation driving module. As shown in fig. 1:
the power frequency ripple sampling circuit:
the power frequency ripple contained in the output voltage of the digital converter only occupies a very small part relative to the actual output voltage, and the current output voltage sampling can reduce and smooth the voltage multiple on the sampling circuit in order to prevent the sampling overrun and the clutter interference, so that the power frequency ripple is greatly attenuated in the actual sampling circuit, and the phenomenon that the digital converter cannot well extract the power frequency ripple is caused.
The device firstly samples the alternating current signal of the output voltage and amplifies the alternating current signal to obtain the alternating current content part of the output voltage, and secondly adds power frequency band-pass filtering on a sampling circuit in order to prevent the interference of high-frequency noise and load mutation on the voltage, so that relatively pure power frequency ripple sampling can be obtained.
Preferably, the ripple control module is a ripple loop control module.
Preferably, the power frequency ripple sampling circuit module and the voltage sampling circuit module are respectively connected with an output voltage end of the digital converter;
the voltage control module, the ripple control module, the PWM control module and the isolation driving module are arranged among the power frequency ripple sampling circuit module, the voltage sampling circuit module and the digital converter.
Preferably, the power frequency ripple sampling circuit module is connected with the ripple control module and is connected with the voltage control module to form a parallel connection, and then is connected with the PWM control module and the isolation driving module.
Preferably, the power frequency ripple sampling circuit module comprises capacitors C1, C2 and C3 and resistors R1, R2, R3, R4, R5 and R6.
As shown in fig. 2:
fig. 2 shows a power frequency ripple sampling circuit, in which the capacitor C1 is used to filter out the dc component of the output voltage and sample only the ac component of the output voltage. The collected alternating current sampling part can be amplified by adjusting the resistance values of the resistors R1 and R2 in the operational amplifier circuit, and the threshold value of the actual sampling circuit needs to be considered when the amplification factor is designed to prevent sampling from exceeding the limit. In order to prevent power frequency ripple sampling interference caused by sudden load or output voltage oscillation, a band-pass filter which is composed of R4, C2, C3 and R5 and has the bandwidth of 10hz and the center frequency of 50hz is added. The band-pass filter is used for filtering clutter of other frequency bands and extracting pure power frequency ripple sampling. Because the power frequency ripple wave is sampled into an alternating current signal, positive and negative voltages exist, and the dsp can only collect a signal with a positive voltage, the signal at the AD sampling port needs to be subjected to voltage lifting of 1.65v, and finally the voltage at the Vad port needs to be a voltage signal of 0-3.3 v.
Preferably, the capacitor C1 is connected with R1 and R3, the C2 and C3 are connected in parallel, and the C2 is connected with R5 and R6.
Preferably, the band-pass filter composed of R4, C2, C3 and R5 has a bandwidth of 10hz and a center frequency of 50 hz.
Preferably, in the power frequency ripple sampling circuit module, because the power frequency ripple is sampled as an alternating current signal, positive and negative voltages exist, and the dsp can only collect a signal with a positive voltage, a voltage rise of 1.65v needs to be performed on an AD sampling port signal, and finally, the voltage at the Vad port should be a voltage signal of 0-3.3 v.
Preferably, the voltage control adopts PI control, and the power frequency ripple extracted by the power frequency ripple sampling circuit is superposed on the set value of the output voltage in the control process to correct the difference between the sampled output voltage and the set value.
See FIG. 3 for an illustration: a control block diagram of the device is shown, and the control is used for controlling the voltage loop and the ripple wave
Wherein G isv(s) is a transfer function of the main control voltage ring, GR(s) transfer function for additional ripple quasi-resonant controller, H1(s) is the transfer function of the existing voltage sampling circuit, H2(s) is the transfer function of the power frequency ripple sampling circuit, VOIs the actual output voltage of the converter, VRippleFor line frequency ripple, V, of the convertersetIs the desired output voltage of the converter.
The main control voltage loop:
the voltage loop circuit is mainly used for realizing the voltage stabilizing function of the digital converter and adopts PI control. And in the control process, the power frequency ripple waves extracted by the power frequency ripple wave sampling circuit are superposed on the set value of the output voltage to correct the difference value between the sampled value and the set value of the output voltage.
The ripple ring:
in the conventional voltage closed loop design process, a PI controller is generally adopted in a voltage loop, the PI controller is a first-order controller, and when a voltage feedback value only contains direct current, voltage tracking can be accurately and quickly realized by adopting the PI controller. However, when the voltage feedback value contains the power frequency ripple, because the amplitude margin of the PI controller at the high frequency part is very low, a steady-state error occurs when the power frequency ripple is tracked. In order to realize the non-static control of the power frequency ripple, a ripple ring using a quasi-resonant controller is introduced.
The transfer function of the quasi-resonant controller is:
wherein KRQuasi-resonant controller coefficient, ωcQuasi-resonant controller bandwidth, ω0At a resonance frequency
Discretizing by aligning resonance controller by bilinear transformation method
The discretized time domain difference equation of the ripple ring quasi-resonance controller is as follows:
u(k)＝b0e(k)+b1e(k-1)+b2e(k-2)-a1u(k-1)-a2u(k-2)。
the foregoing description of the specific embodiments of the invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes and modifications may be made by those skilled in the art within the scope of the appended claims without affecting the spirit of the invention.
Claims (7)
1. A device for inhibiting power frequency ripples of a digital converter is characterized by comprising a power frequency ripple sampling circuit module, a voltage control module, a ripple control module, a PWM control module and an isolation driving module, wherein the power frequency ripple sampling circuit module and the voltage sampling circuit module are respectively connected with an output voltage end of the digital converter;
the voltage control module, the ripple control module, the PWM control module and the isolation driving module are arranged among the power frequency ripple sampling circuit module, the voltage sampling circuit module and the digital converter.
2. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the ripple control module is a ripple loop control module.
3. The apparatus according to claim 1, wherein the power frequency ripple sampling circuit module is connected with the ripple control module and the voltage control module, and is connected with the PWM control module and the isolation driving module after being connected in parallel with the ripple control module.
4. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the power frequency ripple sampling circuit module comprises capacitors C1, C2, C3 and resistors R1, R2, R3, R4, R5, R6.
5. The apparatus for suppressing power frequency ripple of a digital converter according to claim 4, wherein the capacitor C1 is connected to R1 and R3, the C2 and C3 are connected in parallel, and the C2 is connected to R5 and R6.
6. The apparatus for suppressing power frequency ripple of a digital converter according to claim 4, wherein the band pass filter consisting of R4, C2, C3 and R5 has a bandwidth of 10hz and a center frequency of 50 hz.
7. The apparatus according to claim 1, wherein in the power frequency ripple sampling circuit module, since the power frequency ripple is sampled as an ac signal and has positive and negative voltages, and the dsp can only collect a signal with a positive voltage, it is necessary to raise the voltage of the AD sampling port by 1.65v, and finally the voltage of the Vad port should be a voltage signal of 0-3.3 v.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201921911604.6U CN210536506U (en) | 2019-11-07 | 2019-11-07 | Device for inhibiting power frequency ripple of digital converter |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921911604.6U CN210536506U (en) | 2019-11-07 | 2019-11-07 | Device for inhibiting power frequency ripple of digital converter |
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| CN210536506U true CN210536506U (en) | 2020-05-15 |
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| CN201921911604.6U Active CN210536506U (en) | 2019-11-07 | 2019-11-07 | Device for inhibiting power frequency ripple of digital converter |
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