CN210444188U

CN210444188U - Power adapter with five groups of independent outputs

Info

Publication number: CN210444188U
Application number: CN201921200826.7U
Authority: CN
Inventors: 宾成
Original assignee: Dongguan Dongsong Electronic Co ltd
Current assignee: Dongguan Dongsong Electronic Co ltd
Priority date: 2019-07-26
Filing date: 2019-07-26
Publication date: 2020-05-01
Anticipated expiration: 2029-07-26

Abstract

The utility model relates to a power adapter with five independent outputs of group, including the adapter body, this internal wiring socket CN1 that is equipped with of adapter, wiring socket CN2 and the commercial power 100V-240V input line that connects gradually and anti thunderbolt circuit, EMI filtering electromagnetism anti-interference circuit, bridge type rectification filter circuit, main power transformer, 3.3V switching on and shutting down auxiliary power supply control scheme, main PWM IC control scheme, positive 48V secondary rectification output scheme, positive 22V secondary rectification output scheme, positive 15V secondary rectification output scheme, negative 15V secondary rectification output scheme, positive 3.3V secondary rectification output scheme, 3.3V switching on and shutting down auxiliary power supply power transformer and 3.3V switching on and shutting down auxiliary power supply IC PWM control scheme.

Description

Power adapter with five groups of independent outputs

The technical field is as follows:

the utility model relates to a power adapter technical field refers in particular to a power adapter who has five independent outputs.

Background art:

the power adapter is a power supply conversion device for small portable electronic equipment and electronic appliances, is widely matched with electronic equipment in various fields, generally comprises a shell and electronic elements such as a transformer, an inductor, a capacitor, a microprocessor and the like, and can convert alternating current into direct current through the power adapter;

because the output voltage value that power adapter designed only accords with corresponding electronic equipment's input voltage range usually, consequently, power adapter can't supply the electronic equipment of different categories to use, along with the electronic equipment that commonly uses constantly increases, the quantity of power adapter also increases along with it, and is pleasing to the eye promptly, also be inconvenient in arrangement.

The utility model has the following contents:

the utility model aims at overcoming the shortcomings of the existing products and providing a power adapter with five groups of independent outputs.

The utility model adopts the technical proposal that: a power adapter with five groups of independent outputs comprises an adapter body, wherein a connection socket CN1, a connection socket CN2, a commercial power 100V-240V input circuit, a lightning-resistant circuit, an EMI filtering electromagnetic anti-interference circuit, a bridge rectification filter circuit, a main power transformer, a 3.3V on-off auxiliary power control circuit, a main PWM IC control circuit, a positive 48V secondary rectification output circuit, a positive 22V secondary rectification output circuit, a positive 15V secondary rectification output circuit, a negative 15V secondary rectification output circuit, a positive 3.3V secondary rectification output circuit, a 3.3V on-off auxiliary power transformer and a 3.3V on-off auxiliary power IC control circuit are arranged in the adapter body;

the commercial power 100V-240V input line and the anti-lightning line comprise a protective tube F1, a thermistor RT1 and a piezoresistor RZ1, wherein the input end of the protective tube F1 is connected with one end of a wiring socket CN1, and the input end of the thermistor RT1 is connected with the other end of the wiring socket CN 1;

the EMI filtering electromagnetic anti-interference circuit comprises an excitation coil LF1, a capacitor YC3, a capacitor YC4, a resistor R1, a resistor R3, a resistor R2, a resistor R4, a capacitor YC5, a capacitor XC1, a ground terminal GND1 and an excitation coil LF2, wherein the excitation coil LF1 and the excitation coil LF2 are respectively provided with an interface 1I, an interface 1 II, an interface 1 III, an interface 1 IV, an interface 2I, an interface 2 II, an interface 2 III and an interface 2 IV;

the interface 1I is connected with the output end of a protective tube F1, the interface 1 II is connected with the output end of a thermistor RT1, the piezoresistor RZ1 is connected in parallel between a connecting line of the interface 1I and the protective tube F1 and a connecting line of the interface 1 II and the thermistor RT1, the interface 1 III is connected with the interface 2 III, the interface 1 IV is connected with the interface 2I, a resistor R1 is connected in series with a resistor R3 and then connected in parallel between a connecting line of the interface 1 III and the interface 2 III and a connecting line of the interface 1 IV and the interface 2I, a resistor R2 is connected in series with a resistor R4 and then connected in parallel between a connecting line of the interface 1 III and the interface 2 III and a connecting line of the interface 1 IV and the interface 2I, a capacitor XC1 is connected in parallel between a connecting line of the interface 1 III and the interface 2 III and a connecting line of the interface 1 IV and the interface 2I, the input end of a, the output end of the capacitor YC3 is grounded, the input end of the capacitor YC4 is connected in parallel with the connecting line of the interface 1 IV and the interface 2I and is connected with the resistor R3, the output end of the capacitor YC4 is connected with a ground terminal GND1, the input end of the capacitor YC5 is connected in parallel with the connecting line of the interface 1 III and the interface 2 III, and the output end of the capacitor YC5 is connected in parallel with the connecting line of the capacitor YC4 and the ground terminal GND 1;

the bridge rectifier filtering circuit comprises a bridge rectifier diode BD1, a polar capacitor C1 and a capacitor C8, wherein the bridge rectifier diode BD1 is provided with an interface 3I, an interface 3 II, an interface 3 III and an interface 3 IV, the interface 3 II is connected with the interface 2 IV, and the interface 3 IV is connected with the interface 2 II;

the main power transformer comprises a transformer T1, a capacitor C7, a resistor R30, a resistor R18, a resistor R17, a resistor R16, a resistor R15 and a diode D2, wherein the transformer T1 is provided with an interface 4I, an interface 4 II, an interface 4 III, an interface 4 IV, an interface 4V and an interface 4 VI, the interface 4I is provided with a connection point 1I and a connection point 2I, the interface 4 II is provided with a connection point 1 II and a connection point 2 II, the interface 4 III is provided with a connection point 1 III, a common connection point I is arranged between the interface 4 III and the interface 4 IV, a common connection point II is arranged between the interface 4 IV and the interface 4V, a common connection point III is arranged between the interface 4V and the interface 4 VI, the connection point 1I is connected with the interface 3 III, the cathode of the diode D2 is connected with the input end of the resistor R15, the output end of the resistor R15 is connected with the input end of the capacitor C7, the output end of the capacitor, the input end of the resistor R30 is connected in parallel with a connecting line between the connection point 1I and the interface 3 III, the output end of the resistor R30 is connected with the input end of the resistor R18, the output end of the resistor R18 is connected in parallel with a connecting line between the diode D2 and the capacitor C7, and the resistor R17 and the resistor R16 are respectively connected in parallel between a connecting line between the resistor R18 and the resistor R30 and a connecting line between the resistor R18 and the diode D2;

the main PWM IC control circuit comprises a triode Q1, a resistor R26, a resistor R31, a resistor R25, a diode D11, a resistor R24, a resistor R23, a microprocessor CPU1, a triode Q2, a polar capacitor C3, a triode Q2, a capacitor C20, a diode D14, a zener diode ZD2, a resistor R20, a resistor R21, a resistor R32, a capacitor C23, a zener diode ZD4, a zener diode ZD1, a resistor R28, a resistor R29, a resistor R27, a thermistor RT2, a capacitor C21, a capacitor C22, a resistor R22, a diode D10, a diode D9, a polar capacitor C2, a zener diode ZD7, a triode Q8, a resistor R80, a resistor R81, a resistor R19 and a ground terminal 2;

the specific model of the microprocessor CPU1 is OB2279CP, the microprocessor CPU1 is connected with the interface 3I, the anode of the polar capacitor C1 and the input end of the capacitor C8 are respectively connected in parallel to a connecting line of the interface 3 III and the connection point 1I, and the cathode of the polar capacitor C1 and the output end of the capacitor C8 are connected and then connected in parallel to a connecting line of the interface 3I and the microprocessor CPU 1;

the base electrode of the triode Q1 is connected with the anode of the diode D2, the connection point 2I is connected in parallel with the connection line of the triode Q1 and the diode D2, the emitter electrode of the triode Q1 is connected with the input end of the resistor R31, the output end of the resistor R31 is grounded, the collector electrode of the triode Q1 is connected with the input end of the resistor R24, the output end of the resistor R24 is connected with the microprocessor CPU1, the input end of the resistor R23 is connected in parallel with the connection line of the resistor R24 and the microprocessor CPU1, the output end of the resistor R23 is connected with the cathode of the diode D11, the anode of the diode D11 is connected with the input end of the resistor R25, the output end of the resistor R25 is connected in parallel with the connection line of the triode Q25 and the resistor R25, the input end of the resistor R25 is connected in parallel with the connection line of the triode Q25 and the resistor R36;

the connection point 1 II is connected with the input end of a resistor R19, the output end of a resistor R19 is connected with the anode of a diode D9, the output end of a diode D9 is connected with the anode of a diode D10, the output end of a diode D10 is connected with the cathode of a diode D14, a diode D14 is connected with the input end of a resistor R20, the output end of a resistor R20 is connected with the input end of a resistor R21, and the output end of a resistor R21 is grounded; the input end of a capacitor C20 is connected with a microprocessor CPU1, the cathode of a polar capacitor C3 is connected with a ground terminal GND2, the anode of a polar capacitor C3 is connected in parallel with a connection line of a capacitor C20 and a microprocessor CPU1, the output end of a capacitor C20 is connected in parallel with a connection line of a polar capacitor C3 and a ground terminal GND2, the cathode of a zener diode ZD2 is connected in parallel with a connection line of a resistor R20 and a diode D14, the anode of a zener diode CD2 is connected in parallel with a connection line of a polar capacitor C3 and a ground terminal GND2, the input end of a capacitor C22 is connected with a microprocessor CPU1, the output end of a capacitor C22 is connected in parallel with a connection line of a polar capacitor C22 and a ground terminal GND 22, the emitter of a triode Q22 is connected in parallel with a connection line of a capacitor C22 and a microprocessor CPU 22, and the base of the;

the anode of a voltage stabilizing diode ZD1 is connected in parallel with a connecting line between a capacitor C22 and a ground end GND2, the cathode of the voltage stabilizing diode ZD1 is connected with the input end of a resistor R28, the output end of the resistor R28 is connected in parallel with a connecting line between a capacitor C22 and a microprocessor CPU1, the input end of a thermistor RT2 is connected in parallel with a connecting line between a capacitor C22 and a microprocessor CPU1, the output end of the thermistor RT2 is connected with the input end of the resistor R27, and the output end of the resistor R27 is connected with a microprocessor CPU 1;

the connection point 2 II is connected with the input end of the resistor R29, the output end of the resistor R29 is connected with the microprocessor CPU1, the input end of the capacitor C21 is connected in parallel with the connection line of the connection point 2 II and the resistor R29, and the output end of the capacitor C21 is connected in parallel with the connection line of the resistor R26 and the microprocessor CPU 1; the input end of a resistor R81 is connected in parallel with a connecting line between a capacitor C22 and a ground end GND2, the output end of the resistor R81 is connected with the input end of a resistor R80, the output end of a resistor R80 is connected with the positive electrode of a zener diode ZD7, the positive electrode of a polar capacitor C2 is connected in parallel with a connecting line between a diode D10 and a diode D9, the negative electrode of a polar capacitor C2 is connected in parallel with a connecting line between a connection point 2 II and a resistor R29, the positive electrode of a zener diode ZD7 is connected in parallel with a connecting line between a polar capacitor C2 and a diode D10, the emitter of a triode Q8 is connected in parallel with a connecting line between a resistor R81 and a capacitor C22, the collector of a triode Q8 is connected in parallel with a connecting line between a resistor R9 and a resistor R81, and the base of a triode Q;

the 3.3V switching auxiliary power supply control circuit comprises a resistor R46, a resistor R45, a resistor R43, a resistor R38, a resistor R37, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a capacitor C27, a voltage-stabilizing source CPU3, a triode Q3, a capacitor C26, a four-end photoelectric photocoupler PC1 and a four-end photoelectric photocoupler PC2, wherein the voltage-stabilizing source CPU3 is TL431 in specific model, and the four-end photoelectric photocoupler PC1 and the four-end photoelectric photocoupler PC2 are respectively provided with an interface 5I, an interface 5 II, an interface 5 III, an interface 5 IV, an interface 9I, an interface 9 II, an interface 9 III and an interface 9 IV;

an interface 5I is connected in parallel with a connecting line of a capacitor C22 and a microprocessor CPU1, an interface 5 III is connected in parallel with a connecting line of a connecting point 2 II and a resistor R29, an interface 9I is connected with an input end of a resistor R22, an output end of a resistor R22 is connected in parallel with a connecting line of a diode D10 and a diode D14, an interface 9 III is connected with a collector of a triode Q2, an input end of a capacitor C23 and a negative electrode of a zener diode ZD4 are respectively connected in parallel with the connecting line of the interface 9 III and the triode Q2, an output end of a capacitor C23 and a positive electrode of a zener diode ZD4 are respectively connected in parallel with the connecting line of a capacitor C22 and a grounding terminal GND2, an input end of a resistor R32 is connected in parallel with the connecting line of the capacitor C23 and the triode Q2, and an;

the positive 48V secondary rectification output line comprises a diode D4, a resistor R56, a capacitor C30, a polar capacitor C14, a resistor R59, a resistor R58, a resistor R57, a resistor R60, a capacitor C35, a resistor R63, a resistor R62, a capacitor C34, a resistor R61, a diode D13, a diode D12, a triode Q6, a capacitor C33, a triode Q5, a zener diode ZD6, a resistor R65, a resistor R68, a resistor R67, a triode Q7, a polar capacitor C19, a ground terminal GND3, a ground terminal GND4 and a resistor R66;

the connection point 1 III is connected with the anode of a diode D4, the cathode of a diode D4 is connected with the input end of a resistor R60, the anode of a polar capacitor C14 is connected in parallel with the connection line of a diode D4 and a resistor R60, the output end of a resistor R60 is connected with the base of a triode Q5, the emitter of a triode Q5 is connected with the input end of a resistor R68, the output end of a resistor R68 is connected with a connection socket CN2, the input end of a resistor R56 is connected in parallel with the connection line of the connection point 1 III and the diode D4, the output end of a resistor R56 is connected with the input end of a capacitor C30, the cathode of a polar capacitor C30 is connected with the input end of the capacitor C30, the output end of the capacitor C30 is connected in parallel with the connection line of the polar capacitor C30 and the diode D30, and the connection lines of the resistors R30, the connection lines, an input end of a capacitor C35 is connected in parallel to a connection line between the resistor R60 and the transistor Q5, an output end of a capacitor C35 is connected in parallel to a connection line between the polar capacitor C14 and the capacitor C34 and then to the ground terminal GND4, an output end of a resistor R62 is connected to an input end of a resistor R63, an input end of a resistor R62 is connected in parallel to a connection line between the resistor R62 and the transistor Q62, an output end of the resistor R62 is connected in parallel to a connection line between the capacitor C62 and the polar capacitor C62, an anode of a diode D62 is connected in parallel to a connection line between the resistor R62 and the resistor R62, an output end of the diode D62 is connected in parallel to a connection line between the diode D62 and the resistor R62, a cathode of the diode D62 is connected to an input end of the resistor R62, an output end of the resistor R62 is connected to a collector of the transistor Q62, an emitter of the transistor Q62 is connected in parallel to a connection line between the, the anode of the diode D13 is connected to the input end of the resistor R61, the output end of the resistor R61 is connected in parallel to the connection line between the resistor R60 and the transistor Q5, the base of the transistor Q6 is connected in parallel to the connection line between the resistor R60 and the transistor Q60, the emitter of the transistor Q60 is connected to the collector of the transistor Q60, the input end of the resistor R60 is connected in parallel to the connection line between the transistor Q60 and the resistor R60, the output end of the resistor R60 is connected in parallel to the connection line between the resistor R60 and the transistor Q60, the input end of the resistor R60 is connected in parallel to the connection line between the resistor R60 and the resistor R60, the cathode of the polar capacitor C60 is connected to the GND terminal 60, and the output end of the resistor R60 is connected in parallel to the connection line between the polar capacitor C60 and the GND terminal 60;

the positive 22V secondary pole rectification output circuit comprises a diode D1, a resistor R55, a resistor R52, a resistor R54, a resistor R53, a capacitor C31, a polar capacitor C11, a resistor R70, a resistor R71, a resistor R72, a zener diode ZD 72, a polar capacitor C72, an excitation coil LF 72 and a polar capacitor C72, wherein the positive pole of the diode D72 is connected with a common connection point I, the negative pole of the diode D72 is connected with an interface 6I, the interface 6 II is connected with a connection socket CN 72, the interface 6 III is connected with the connection line of the capacitor C72 and a ground terminal GND 72 in parallel, the negative pole of the polar capacitor C72 is connected with the interface 6 III after being connected with the connection line of the capacitor C72 and the ground terminal GND 72 in parallel, the positive pole of the polar capacitor C72 is connected with the connection line CN 72 in parallel, the connection line of the interface C72 and the input end of the diode D72 in parallel, the output end of the capacitor C31 is connected with the input end of the resistor R53, the output end of the resistor R53 is connected with the input end of the resistor R52, the output end of the resistor R52 is connected in parallel with a connecting line of the common connecting point I and the diode D1, and after being connected in series with the resistor R55 and the resistor R54, the output end of the resistor R31 is connected in parallel between a connecting line of the common connecting point I and the resistor R52 and a connecting line of the capacitor C31 and the resistor R53; the resistor R70, the resistor R71, the resistor R72, the resistor R77, the resistor R78 and the resistor R79 are connected in parallel between a connecting line of the interface 6I and the diode D1 and a connecting line of the polar capacitor C11 and the interface 6 III, the cathode of the zener diode ZD3 and the anode of the polar capacitor C12 are respectively connected in parallel on the connecting line of the interface 6I and the diode D1, the anode of the zener diode ZD3 and the cathode of the polar capacitor C12 are respectively connected in parallel on the connecting line of the polar capacitor C11 and the interface 6 III, the anode of the polar capacitor C13 is connected in parallel on the connecting line of the interface 6 II and the connection socket CN2, and the cathode of the polar capacitor C13 is connected in parallel on the connecting line of the interface 6 IV and the connection socket CN 2;

the interface 5 II is connected with the input end of a resistor R40, the output end of the resistor R40 is connected in parallel with a connection line between the interface 6I and the diode D1, the interface 9 II is grounded, the interface 9 IV is connected with the base of a triode Q3, the emitter of a triode Q3 is connected with the input end of a resistor R43, the output end of a resistor R43 is connected with the input end of a resistor R45, the output end of a resistor R45 is connected with the input end of a resistor R46, the output end of a resistor R46 is connected with a connection socket CN2, the collector of a triode Q3 is connected in parallel with the connection line between a resistor R45 and a resistor R43, a capacitor C26 is connected in parallel with a connection line between a triode Q3 and a resistor R45 and a connection line between the triode Q3 and the resistor R3, the output end of the resistor R3 is connected with the input end of the resistor R3, the output end of the resistor R3 is connected in parallel with the connection line between, the interface 5 IV is connected with the input end of a voltage stabilizing source CPU3, the output end of the voltage stabilizing source CPU3 is connected in parallel with a connecting line of a resistor R38 and a resistor R37, the input end of a resistor R42 is connected with the output end of a capacitor C27, the output end of a resistor R42 is connected in parallel with a connecting line of the interface 5 IV and a voltage stabilizing source CPU3, the input end of a capacitor C27 is connected in parallel with a connecting line of a voltage stabilizing source CPU3 and a resistor R38, a resistor R39 is connected in parallel between a connecting line of a resistor R40 and an interface 6I and a connecting line of a voltage stabilizing source CPU3 and a resistor R38, and a resistor R41 is connected in parallel between a connecting line of an interface 5 II and a resistor R40 and;

the positive 15V secondary rectification output circuit and the negative 15V secondary rectification output circuit respectively comprise a diode D5, a resistor R49, a capacitor C29, a polar capacitor C15, a resistor R35, an operational amplifier U4, a polar capacitor C17, a thermistor RT4, an excitation coil LF5, a polar capacitor C37, a resistor R48, a capacitor C28, a diode D6, a polar capacitor C16, a resistor R34, an operational amplifier U5, a polar capacitor C18, a thermistor RT3 and a polar capacitor C36, and the excitation coil LF5 is provided with an interface 7I, an interface 7 II, an interface 7 III and an interface 7 IV;

the anode of the diode D5 is connected with a common connection point II, the cathode of the diode D5 is connected with the anode of an operational amplifier U4, the output end of the operational amplifier U4 is connected with the input end of a thermistor RT4, the output end of the thermistor RT4 is connected with an interface 7I, the interface 7 II is connected with a connection socket CN2, a common connection point III penetrates through an excitation coil LF5 and then is connected in parallel with a connection line of an interface 6 IV and a connection socket CN2, a connection point 1 VI is connected with the cathode of a diode D6, the anode of a diode D6 is connected with the cathode of an operational amplifier U5, the anode of an operational amplifier U5 and the cathode of an operational amplifier U4 are respectively connected in parallel with the connection line of the common connection point III and the interface 6 IV, the anode of the operational amplifier U5 is connected with the cathode of the operational amplifier U4, the output end of the operational amplifier U5 is connected with the input end of the thermistor RT3, and the output, the interface 7 IV is connected with a connection socket CN2, the output end of a resistor R49 is connected with the input end of a capacitor C29, the input end of a resistor R49 is connected in parallel with a connection line of a common connection point II and a diode D5, the output end of a capacitor C29 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the anode of a polar capacitor C15 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the cathode of a polar capacitor C15 is connected in parallel with a connection line of a common connection point III and an interface 6 IV, the input end of a resistor R35 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the output end of a resistor R35 is connected in parallel with a connection line of a common connection point III and an interface 6 IV, the anode of a polar capacitor C17 is connected in parallel with a connection line of an operational amplifier U4 and a thermistor RT4, the cathode of a polar, the positive electrode of the polar capacitor C37 is connected in parallel with a connecting line between the interface 7 II and the connection socket CN2, and the negative electrode of the polar capacitor C37 is connected in parallel with a connecting line between the common connection point III and the interface 6 IV;

the output end of a resistor R48 is connected with the input end of a capacitor C28, the input end of a resistor R48 is connected in parallel with the connecting line between a connection point 1 VI and a diode D6, the output end of a capacitor C28 is connected in parallel with the connecting line between a diode D6 and an operational amplifier U5, the anode of a polar capacitor C16 is connected in parallel with the connecting line between a common connection point III and an interface 6 IV, the anode of a polar capacitor C16 is connected with the cathode of a polar capacitor C15, the cathode of a polar capacitor C16 is connected in parallel with the connecting line between a diode D6 and an operational amplifier U5, the input end of a resistor R34 is connected in parallel with the connecting line between the common connection point III and the interface 6 IV, the input end of a resistor R34 is connected with the output end of a resistor R III 8, the output end of a resistor R34 is connected in parallel with the connecting line between a diode D6 and the operational amplifier U5, the anode of a polar capacitor C36, the anode of the polar capacitor C18 is connected with the cathode of the polar capacitor C17, the cathode of the polar capacitor C18 is connected in parallel with the connecting line of the diode D6 and the operational amplifier U5, the anode of the polar capacitor C36 is connected in parallel with the connecting line of the common connecting point III and the interface 6 IV, the anode of the polar capacitor C36 is connected with the cathode of the polar capacitor C37, and the cathode of the polar capacitor C36 is connected in parallel with the connecting line of the interface 7 IV and the connection socket CN 2;

the positive 3.3V secondary pole rectification output circuit comprises a polar capacitor C10, a magnet exciting coil LF6, a resistor R50, a resistor R44, a polar capacitor C9, a capacitor C32, a resistor R51 and a diode D3, wherein the magnet exciting coil LF6 is provided with an interface 8I, an interface 8 II, an interface 8 III and an interface 8 IV, the interface 8 II is connected with a wiring socket CN2, the positive pole of the polar capacitor C10 is connected in parallel with a connection line between the interface 8 II and the wiring socket CN2, and the negative pole of the polar capacitor C10 is grounded and connected with the interface 8 IV;

the 3.3V power transformer for the switching on and switching off auxiliary power supply comprises a resistor R51, a transformer T2, a diode D7, a resistor R9, a capacitor C6, a resistor R10, a resistor R11, a resistor R12 and a diode D8, wherein a transformer T2 is provided with an interface 4 VII, an interface 4 VIII and an interface 4 IX, and the interface 4 VII, the interface 4 VIII and the interface 4 IX are respectively provided with a connection point 1 VII, a connection point 2 VII, a connection point 1 VIII, a connection point 2 VIII, a connection point 1 IX and a connection point 2 IX;

a connection point 1 VII is connected with the anode of a diode D3, the cathode of a diode D3 is connected with an interface 8I, a connection point 2 VII is grounded and connected with an interface 8 III, the anode of a polar capacitor C9, the input end of a resistor R44 and the input end of a resistor R50 are respectively connected in parallel on a connection line of a diode D3 and the interface 8I, the cathode of a polar capacitor C9 and the output end of a resistor R50 are respectively connected in parallel on a connection line of the interface 8 III and the connection point 2 VII, the output end of a resistor R44 is grounded, the output end of a resistor R51 is connected with the input end of a capacitor C32, the input end of a resistor R51 is connected in parallel on a connection line of the connection point VII and a diode D3, and the output end of a capacitor C32 is connected in parallel on a connection line of the diode;

the 3.3V switch auxiliary power supply IC PWM control circuit comprises a resistor R5, a resistor R6, a polar capacitor C5, a capacitor C24, a microprocessor CPU2, a resistor R8, a resistor R7, a resistor R13, a resistor R14, a resistor R33, a polar capacitor C4 and an HV end, wherein the specific model of the microprocessor CPU2 is OB2512, a connection point 1 VIII is connected with the HV end, a connection point 2 VIII is connected with the microprocessor CPU2, a connection point 1 IX is connected with the input end of the resistor R12, the output end of the resistor R12 is connected with the anode of a diode D8, the cathode of the diode D8 is connected with the microprocessor CPU 8, a connection point 2 IX is connected with a ground terminal GND 8, the anode of the diode D8 is connected in parallel with a connection line of the connection point VIII 2 and the microprocessor CPU 8, the cathode of the diode D8 is connected with the input end of the resistor R8, the output end of the resistor R8 is connected with the input end of the capacitor C8 in parallel with the HV end of the HV circuit, the resistor R8 and the input end of the capacitor C8, the output end of the resistor R11 is connected in parallel with the connecting line of the resistor R9 and the capacitor C6, and the output end of the resistor R10 is connected in parallel with the connecting line of the resistor R11 and the capacitor C6;

the output end of a resistor R5 is connected with the input end of a resistor R6, the input end of a resistor R5 is connected in parallel with a connecting line between a connecting point 1 VIII and an HV end, the output end of a resistor R6 is connected in parallel with a connecting line between a diode D8 and a microprocessor CPU2, the anode of a polar capacitor C5 is connected in parallel with a connecting line between a diode D8 and a microprocessor CPU2, the cathode of a polar capacitor C5 is connected in parallel with a connecting line between a connecting point 2 IX and a ground terminal GND5, a capacitor C24 is connected in parallel between a connecting line between a diode D8 and a microprocessor CPU2 and a connecting line between a connecting point 2 IX and a ground terminal GND5, the input end of a resistor R8 is connected in parallel with a connecting line between a connecting point 2 IX and a ground terminal GND5, the output end of a resistor R8 is connected with a microprocessor 2, the input end of a resistor R7 is connected in parallel with a connecting point 2 IX and a connecting line between a, the output end of a resistor R33 is connected with a microprocessor CPU2, the input end of a resistor R33 is connected in parallel with a connection line of a resistor R12 and a diode D8, the input end of a resistor R13 is connected in parallel with a connection line of a resistor R33 and a resistor R12, the output end of a resistor R13 is connected in parallel with a connection line of a resistor R33 and a microprocessor CPU2, the input end of a resistor R14 is connected in parallel with a connection line of a resistor R33 and a microprocessor CPU2 and is connected with the output end of a resistor R13, the output end of a resistor R14 is connected in parallel with a connection line of a connection point 2 IX and a GND ground terminal 5, the positive electrode of a polar capacitor C4 is connected in parallel with a connection line of a connection point 1 VIII and an HV terminal, and the negative electrode of a polar capacitor C4.

The utility model discloses power adapter changes the voltage of incoming line respectively and delivers to 48V time tight rectification output line through transformer T1, positive 22V time utmost point rectification output line, behind positive 15V time utmost point rectification output line and the negative 15V time utmost point rectification output line, turn into corresponding magnitude of voltage with transmission voltage by above circuit, then transmit through connection socket CN2, controllable accurate constant voltage power supply turns into the voltage of incoming line and transmits through connection socket CN2 behind the corresponding magnitude of voltage of positive 3.3V time utmost point rectification output line, consequently this power adapter can provide five different input voltage range electronic equipment uses simultaneously respectively, can the effectual quantity that reduces different output voltage value power adapters, effectual improvement convenience, also can improve electronic equipment's charge efficiency simultaneously.

Description of the drawings:

fig. 1 is a circuit structure diagram of the power adapter of the present invention;

FIG. 2 is a schematic block diagram of the power adapter of the present invention;

fig. 3 is a circuit structure diagram of a field coil LF1 in the power adapter of the present invention;

fig. 4 is a circuit structure diagram of the field coil LF2 in the power adapter of the present invention;

fig. 5 is a circuit structure diagram of the bridge rectifier diode BD1 in the power adapter of the present invention;

fig. 6 is a circuit structure diagram of a transformer T1 in the power adapter of the present invention;

fig. 7 is a circuit diagram of a four-terminal photoelectric photocoupler PC1 in the power adapter of the present invention;

fig. 8 is a circuit diagram of a four-terminal photoelectric photocoupler PC2 in the power adapter of the present invention;

fig. 9 is a circuit configuration diagram of a field coil LF3 in the power adapter of the present invention;

fig. 10 is a circuit configuration diagram of a field coil LF5 in the power adapter of the present invention;

fig. 11 is a circuit configuration diagram of a field coil LF6 in the power adapter of the present invention;

fig. 12 is a circuit configuration diagram of the transformer T2 in the power adapter of the present invention.

In the figure: the power supply control circuit comprises a commercial power 100V-240V input circuit and lightning-resistant circuit 1, an EMI (electro-magnetic interference) filtering electromagnetic anti-jamming circuit 2, a bridge rectifier filter circuit 3, a main power transformer 4, a 3.3V switching auxiliary power supply control circuit 5, a main PWM IC (pulse-width modulation) control circuit 6, a positive 48V secondary rectifier output circuit 7, a positive 22V secondary rectifier output circuit 8, a positive 15V secondary rectifier output circuit 9, a negative 15V secondary rectifier output circuit 10, a positive 3.3V secondary rectifier output circuit 11, a 3.3V switching auxiliary power supply power transformer 12, a 3.3V switching auxiliary power supply IC PWM (integrated circuit) control circuit 13, an interface 1I 11, an interface 1 II 12, an interface 1 III 13, an interface 1 IV 14, an interface 2I 21, an interface 2 II 22, an interface 2 III 23, an interface 2 IV 24, an interface 3I 31, an interface 3 II 32, an interface 3 III 33, an interface 3 IV 34, an interface 4I 41, a connection point 1I 411, a connection point, The device comprises a connection point 2I 412, an interface 4 II 42, a connection point 1 II 421, a connection point 2 II 422, an interface 4 III 43, a connection point 1 III 431, an interface 4 IV 44, a common connection point I01, an interface 4V 45, a common connection point II 02, an interface 4 VI 46, a common connection point III 03, an interface 4 VII 47, an interface 4 VIII 48, an interface 4 IX 49, an interface 5I 51, an interface 5 II 52, an interface 5 III 53, an interface 5 IV 54, an interface 6I 61, an interface 6 II 62, an interface 6 III 63, an interface 6 IV 64, an interface 7I 71, an interface 7 II 72, an interface 7 III 73, an interface 7 IV 74, an interface 8I 81, an interface 8 II 82, an interface 8 III 83, an interface 8 IV 84, an interface 9I 91, an interface 9 II 92, an interface 9 III 93 and an interface 9 IV 94.

The specific implementation mode is as follows:

the present invention will be further described with reference to the following specific embodiments and accompanying drawings.

As shown in fig. 1 to 12, a power adapter with five groups of independent outputs includes an adapter body, in which a connection socket CN1, a connection socket CN2, a commercial power 100V-240V input line and a lightning-resistant line 1, an EMI filter electromagnetic anti-interference line 2, a bridge rectifier filter line 3, a main power transformer 4, a 3.3V on-off auxiliary power control line 5, a main PWM IC control line 6, a positive 48V secondary rectifier output line 7, a positive 22V secondary rectifier output line 8, a positive 15V secondary rectifier output line 9, a negative 15V secondary rectifier output line 10, a positive 3.3V secondary rectifier output line 11, a 3.3V on-off auxiliary power transformer 12, and a 3.3V on-off auxiliary power IC PWM control line 13 are arranged;

the commercial power 100V-240V input line and the anti-lightning line 1 comprise a protective tube F1, a thermistor RT1 and a piezoresistor RZ1, wherein the input end of the protective tube F1 is connected with one end of a wiring socket CN1, and the input end of the thermistor RT1 is connected with the other end of the wiring socket CN 1;

the EMI filtering electromagnetic anti-interference circuit 2 comprises an excitation coil LF1, a capacitor YC3, a capacitor YC4, a resistor R1, a resistor R3, a resistor R2, a resistor R4, a capacitor YC5, a capacitor XC1, a ground terminal GND1 and an excitation coil LF2, wherein the excitation coil LF1 and the excitation coil LF2 are respectively provided with an interface 1I 11, an interface 1 II 12, an interface 1 III 13, an interface 1 IV 14, an interface 2I 21, an interface 2 II 22, an interface 2 III 23 and an interface 2 IV 24;

the interface 1I 11 is connected with the output end of a fuse F1, the interface 1 II 12 is connected with the output end of a thermistor RT1, the piezoresistor RZ1 is connected in parallel between the connection line of the interface 1I 11 and the fuse F1 and the connection line of the interface 1 II 12 and the thermistor RT1, the interface 1 III 13 is connected with the interface 2 III 23, the interface 1 IV 14 is connected with the interface 2I 21, the resistor R1 is connected in series with the resistor R3 and then connected in parallel between the connection line of the interface 1 III 13 and the interface 2 III 23 and the connection line of the interface 1 IV 14 and the interface 2I 21, the resistor R2 is connected in series with the resistor R4 and then connected in parallel between the connection line of the interface 1 III 13 and the interface 2 III 23 and the connection line 1 IV 14 and the interface 2I 21, the capacitor XC1 is connected in parallel between the connection line of the interface 1 III 13 and the interface 2 III 23 and the connection line of the interface 1 IV 14 and the interface 2I 21, the input end of the capacitor YC3 is connected, the output end of the capacitor YC3 is grounded, the input end of the capacitor YC4 is connected in parallel with the connection line of the interface 1 IV 14 and the interface 2I 21 and is connected with the resistor R3, the output end of the capacitor YC4 is connected with a ground terminal GND1, the input end of the capacitor YC5 is connected in parallel with the connection line of the interface 1 III 13 and the interface 2 III 23, and the output end of the capacitor YC5 is connected in parallel with the connection line of the capacitor YC4 and the ground terminal GND 1;

the bridge rectifier filter circuit 3 comprises a bridge rectifier diode BD1, a polar capacitor C1 and a capacitor C8, wherein the bridge rectifier diode BD1 is provided with an interface 3I 31, an interface 3 II 32, an interface 3 III 33 and an interface 3 IV 34, the interface 3 II 32 is connected with an interface 2 IV 24, and the interface 3 IV 34 is connected with an interface 2 II 22;

the main power transformer 4 comprises a transformer T1, a capacitor C7, a resistor R30, a resistor R18, a resistor R17, a resistor R16, a resistor R15 and a diode D2, the transformer T1 is provided with an interface 4I 41, an interface 4 II 42, an interface 4 III 43, an interface 4 IV 44, an interface 4V 45 and an interface 4 VI 46, the interface 4I 41 is provided with a connection point 1I 411 and a connection point 2I 412, the interface 4 II 42 is provided with a connection point 1 II 421 and a connection point 2 II 422, the interface 4 III 43 is provided with a connection point 1 III 431, a common connection point I01 is arranged between the interface 4 III 43 and the interface 4 IV 44, a common connection point II 02 is arranged between the interface 4 IV 44 and the interface 4V 45, a common connection point III 03 is arranged between the interface 4V 45 and the interface 4 VI 46, the connection point 1I 411 is connected with the interface 3 III 33, the cathode of the diode D2 is connected with the input end of the resistor R15, the output end of the resistor R15 is, the output end of the capacitor C7 is connected in parallel with a connection line between the connection point 1I 411 and the interface 3 III 33, the input end of the resistor R30 is connected in parallel with a connection line between the connection point 1I 411 and the interface 3 III 33, the output end of the resistor R30 is connected with the input end of the resistor R18, the output end of the resistor R18 is connected in parallel with a connection line between the diode D2 and the capacitor C7, and the resistor R17 and the resistor R16 are respectively connected in parallel between a connection line between the resistor R18 and the resistor R30 and a connection line between the resistor R18 and the diode D2;

the main PWM IC control circuit 6 comprises a triode Q1, a resistor R26, a resistor R31, a resistor R25, a diode D11, a resistor R24, a resistor R23, a microprocessor CPU1, a triode Q2, a polar capacitor C3, a triode Q2, a capacitor C20, a diode D14, a zener diode ZD2, a resistor R20, a resistor R21, a resistor R32, a capacitor C23, a zener diode ZD4, a zener diode ZD1, a resistor R28, a resistor R29, a resistor R27, a thermistor RT2, a capacitor C21, a capacitor C22, a resistor R22, a diode D10, a diode D9, a polar capacitor C2, a zener diode 7, a triode Q8, a resistor GND 80, a resistor R81, a resistor R19 and a ground terminal ZD 2;

the specific model of the microprocessor CPU1 is OB2279CP, the microprocessor CPU1 is connected with the interface 3I 31, the anode of the polar capacitor C1 and the input end of the capacitor C8 are respectively connected in parallel on a connecting line of the interface 3 III 33 and the connection point 1I 411, and the cathode of the polar capacitor C1 and the output end of the capacitor C8 are connected and then connected in parallel on a connecting line of the interface 3I 31 and the microprocessor CPU 1;

the base electrode of the triode Q1 is connected with the anode of the diode D2, the connection point 2I 412 is connected in parallel with the connection line between the triode Q1 and the diode D2, the emitter electrode of the triode Q1 is connected with the input end of the resistor R31, the output end of the resistor R31 is grounded, the collector electrode of the triode Q1 is connected with the input end of the resistor R24, the output end of the resistor R24 is connected with the microprocessor CPU1, the input end of the resistor R23 is connected in parallel with the connection line between the resistor R24 and the microprocessor CPU1, the output end of the resistor R23 is connected with the cathode of the diode D11, the anode of the diode D11 is connected with the input end of the resistor R25, the output end of the resistor R25 is connected in parallel with the connection line between the triode Q25 and the resistor R25, the input end of the resistor R25 is connected in parallel with the connection line between the triode Q25 and the resistor R36;

the connection point 1 II 421 is connected with the input end of a resistor R19, the output end of a resistor R19 is connected with the anode of a diode D9, the output end of a diode D9 is connected with the anode of a diode D10, the output end of a diode D10 is connected with the cathode of a diode D14, a diode D14 is connected with the input end of a resistor R20, the output end of a resistor R20 is connected with the input end of a resistor R21, and the output end of a resistor R21 is grounded; the input end of a capacitor C20 is connected with a microprocessor CPU1, the cathode of a polar capacitor C3 is connected with a ground terminal GND2, the anode of a polar capacitor C3 is connected in parallel with a connection line of a capacitor C20 and a microprocessor CPU1, the output end of a capacitor C20 is connected in parallel with a connection line of a polar capacitor C3 and a ground terminal GND2, the cathode of a zener diode ZD2 is connected in parallel with a connection line of a resistor R20 and a diode D14, the anode of a zener diode CD2 is connected in parallel with a connection line of a polar capacitor C3 and a ground terminal GND2, the input end of a capacitor C22 is connected with a microprocessor CPU1, the output end of a capacitor C22 is connected in parallel with a connection line of a polar capacitor C22 and a ground terminal GND 22, the emitter of a triode Q22 is connected in parallel with a connection line of a capacitor C22 and a microprocessor CPU 22, and the base of the;

the connection point 2 II is connected with the input end of the resistor R29, the output end of the resistor R29 is connected with the microprocessor CPU1, the input end of the capacitor C21 is connected in parallel with the connection line of the connection point 2 II 422 and the resistor R29, and the output end of the capacitor C21 is connected in parallel with the connection line of the resistor R26 and the microprocessor CPU 1; the input end of a resistor R81 is connected in parallel with a connecting line between a capacitor C22 and a ground end GND2, the output end of the resistor R81 is connected with the input end of a resistor R80, the output end of a resistor R80 is connected with the positive electrode of a zener diode ZD7, the positive electrode of a polar capacitor C2 is connected in parallel with a connecting line between a diode D10 and a diode D9, the negative electrode of a polar capacitor C2 is connected in parallel with a connecting line between a connection point 2 II 422 and a resistor R29, the positive electrode of a zener diode ZD7 is connected in parallel with a connecting line between a polar capacitor C2 and a diode D10, the emitter of a triode Q8 is connected in parallel with a connecting line between a resistor R81 and a capacitor C22, the collector of a triode Q8 is connected in parallel with a connecting line between a resistor R80 and a resistor R81, and the base of a triode;

the 3.3V switching auxiliary power supply control circuit 5 comprises a resistor R46, a resistor R45, a resistor R43, a resistor R38, a resistor R37, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a capacitor C27, a voltage-stabilizing source CPU3, a triode Q3, a capacitor C26, a four-end photoelectric photocoupler PC1 and a four-end photoelectric photocoupler PC2, wherein the voltage-stabilizing source CPU3 is TL431 in specific model, and the four-end photoelectric photocoupler PC1 and the four-end photoelectric photocoupler PC2 are respectively provided with an interface 5I 51, an interface 5 II 52, an interface 5 III 53, an interface 5 IV 54, an interface 9I 91, an interface 9 II 92, an interface 9 III 93 and an interface 9 IV 94;

the interface 5I 51 is connected in parallel with a connecting line of a capacitor C22 and a microprocessor CPU1, the interface 5 III 53 is connected in parallel with a connecting line of a connecting point 2 II 422 and a resistor R29, the interface 9I 91 is connected with an input end of a resistor R22, an output end of the resistor R22 is connected in parallel with a connecting line of a diode D10 and a diode D14, the interface 9 III 93 is connected with a collector of a triode Q2, an input end of the capacitor C23 and a negative electrode of a zener diode ZD4 are respectively connected in parallel with the connecting line of the interface 9 III 93 and the triode Q2, an output end of the capacitor C23 and a positive electrode of the zener diode 4 are respectively connected in parallel with the connecting line of a capacitor C22 and a grounding terminal GND2, an input end of the resistor R32 is connected in parallel with the connecting line of the capacitor C23 and the triode Q2, and an output end;

the positive 48V secondary rectification output line 7 comprises a diode D4, a resistor R56, a capacitor C30, a polar capacitor C14, a resistor R59, a resistor R58, a resistor R57, a resistor R60, a capacitor C35, a resistor R63, a resistor R62, a capacitor C34, a resistor R61, a diode D13, a diode D12, a triode Q6, a capacitor C33, a triode Q5, a zener diode ZD6, a resistor R65, a resistor R68, a resistor R67, a triode Q7, a polar capacitor C19, a ground terminal GND3, a ground terminal GND4 and a resistor R66;

a connection point 1 III 431 is connected with the anode of a diode D4, the cathode of a diode D4 is connected with the input end of a resistor R60, the anode of a polar capacitor C14 is connected in parallel with a connection line of a diode D4 and a resistor R60, the output end of a resistor R60 is connected with the base of a triode Q5, the emitter of a triode Q5 is connected with the input end of a resistor R68, the output end of a resistor R68 is connected with a connection socket CN2, the input end of a resistor R56 is connected in parallel with the connection line of the connection point 1 III 431 and a diode D4, the output end of a resistor R56 is connected with the input end of a capacitor C30, the cathode of the polar capacitor C30 is connected with the input end of the capacitor C30, the output end of the capacitor C30 is connected in parallel with the connection line of the polar capacitor C30 and the diode D30, and the connection line of the polar capacitor C30, the resistors R30, the connection lines of the polar capacitor C, an input end of a capacitor C35 is connected in parallel to a connection line between the resistor R60 and the transistor Q5, an output end of a capacitor C35 is connected in parallel to a connection line between the polar capacitor C14 and the capacitor C34 and then to the ground terminal GND4, an output end of a resistor R62 is connected to an input end of a resistor R63, an input end of a resistor R62 is connected in parallel to a connection line between the resistor R62 and the transistor Q62, an output end of the resistor R62 is connected in parallel to a connection line between the capacitor C62 and the polar capacitor C62, an anode of a diode D62 is connected in parallel to a connection line between the resistor R62 and the resistor R62, an output end of the diode D62 is connected in parallel to a connection line between the diode D62 and the resistor R62, a cathode of the diode D62 is connected to an input end of the resistor R62, an output end of the resistor R62 is connected to a collector of the transistor Q62, an emitter of the transistor Q62 is connected in parallel to a connection line between the, the anode of the diode D13 is connected to the input end of the resistor R61, the output end of the resistor R61 is connected in parallel to the connection line between the resistor R60 and the transistor Q5, the base of the transistor Q6 is connected in parallel to the connection line between the resistor R60 and the transistor Q60, the emitter of the transistor Q60 is connected to the collector of the transistor Q60, the input end of the resistor R60 is connected in parallel to the connection line between the transistor Q60 and the resistor R60, the output end of the resistor R60 is connected in parallel to the connection line between the resistor R60 and the transistor Q60, the input end of the resistor R60 is connected in parallel to the connection line between the resistor R60 and the resistor R60, the cathode of the polar capacitor C60 is connected to the GND terminal 60, and the output end of the resistor R60 is connected in parallel to the connection line between the polar capacitor C60 and the GND terminal 60;

the positive 22V secondary rectification output line 8 comprises a diode D1, a resistor R55, a resistor R52, a resistor R54, a resistor R53, a capacitor C31, a polar capacitor C11, a resistor R70, a resistor R71, a resistor R72, a zener diode ZD 72, a polar capacitor C72, an excitation coil LF 72 and a polar capacitor C72, wherein the positive pole of the diode D72 is connected with a common connection point i 01, the negative pole of the diode D72 is connected with the interface 6 i 61, the interface 6 ii 62 is connected with the connection socket CN 72, the interface 6 iii 63 is connected in parallel with a connection line between the capacitor C72 and a ground terminal GND 72, the negative pole of the polar capacitor C72 is connected with the interface 6 i 63 after being connected in parallel with a connection line between the capacitor C72 and the ground terminal GND 72, the positive pole of the polar capacitor C72 is connected with the connection line iv of the interface 6 i, and the interface 3664 of the diode D72 are connected in parallel with the connection line of the interface 3664, and the interface 72. The output end of the capacitor C31 is connected with the input end of the resistor R53, the output end of the resistor R53 is connected with the input end of the resistor R52, the output end of the resistor R52 is connected in parallel with a connecting line of the common connecting point I01 and the diode D1, and after being connected in series with the resistor R55 and the resistor R54, the output end of the resistor R31 is connected in parallel between a connecting line of the common connecting point I01 and the resistor R52 and a connecting line of the capacitor C31 and the resistor R53; the resistor R70, the resistor R71, the resistor R72, the resistor R77, the resistor R78 and the resistor R79 are connected in parallel between a connecting line of the interface 6I 61 and the diode D1 and a connecting line of the polar capacitor C11 and the interface 6 III 63, the cathode of the zener diode ZD3 and the anode of the polar capacitor C12 are respectively connected in parallel to a connecting line of the interface 6I 61 and the diode D1, the anode of the zener diode ZD3 and the cathode of the polar capacitor C12 are respectively connected in parallel to a connecting line of the polar capacitor C11 and the interface 6 III 63, the anode of the polar capacitor C13 is connected in parallel to a connecting line of the interface 6 II 62 and the connection socket CN2, and the cathode of the polar capacitor C13 is connected in parallel to a connecting line of the interface 6 IV 64 and the connection socket CN 2;

the interface 5 ii 52 is connected to an input terminal of the resistor R40, an output terminal of the resistor R40 is connected in parallel to a connection line between the interface 6 i 61 and the diode D1, the interface 9 ii 92 is grounded, the interface 9 iv 94 is connected to a base of the transistor Q3, an emitter of the transistor Q3 is connected to an input terminal of the resistor R43, an output terminal of the resistor R43 is connected to an input terminal of the resistor R45, an output terminal of the resistor R45 is connected to an input terminal of the resistor R46, an output terminal of the resistor R46 is connected to the connection socket CN2, a collector of the transistor Q3 is connected in parallel to a connection line between the resistor R45 and the resistor R43, the capacitor C26 is connected in parallel to a connection line between the transistor Q3 and the resistor R45 and a connection line between the transistor Q3 and the resistor R3, an output terminal of the resistor R3 is connected to an input terminal of the resistor R3, an output terminal of the resistor R3 is connected in parallel to a connection line between the transistor R3 and, the interface 5 IV 54 is connected with the input end of a voltage-stabilizing source CPU3, the output end of the voltage-stabilizing source CPU3 is connected in parallel with a connecting circuit of a resistor R38 and a resistor R37, the input end of a resistor R42 is connected with the output end of a capacitor C27, the output end of a resistor R42 is connected in parallel with a connecting circuit of the interface 5 IV 54 and a voltage-stabilizing source CPU3, the input end of a capacitor C27 is connected in parallel with a connecting circuit of a voltage-stabilizing source CPU3 and a resistor R38, a resistor R39 is connected in parallel between a connecting circuit of a resistor R40 and an interface 6I 61 and a connecting circuit of a voltage-stabilizing source CPU3 and a resistor R38, and a resistor R41 is connected in parallel between a connecting circuit of an interface 5 II 52 and a resistor;

the positive 15V secondary rectification output line 9 and the negative 15V secondary rectification output line 10 respectively comprise a diode D5, a resistor R49, a capacitor C29, a polar capacitor C15, a resistor R35, an operational amplifier U4, a polar capacitor C17, a thermistor RT4, an excitation coil LF5, a polar capacitor C37, a resistor R48, a capacitor C28, a diode D6, a polar capacitor C16, a resistor R34, an operational amplifier U5, a polar capacitor C18, a thermistor RT3 and a polar capacitor C36, and the excitation coil LF5 is provided with an interface 7I 71, an interface 7 II 72, an interface 7 III 73 and an interface 7 IV 74;

the anode of the diode D5 is connected with the common connection point II 02, the cathode of the diode D5 is connected with the anode of the operational amplifier U4, the output end of the operational amplifier U4 is connected with the input end of the thermistor RT4, the output end of the thermistor RT4 is connected with the interface 7I 71, the interface 7 II 72 is connected with the connection socket CN2, the common connection point III 03 passes through the excitation coil LF5 and then is connected in parallel with the connection line of the interface 6 IV 64 and the connection socket CN2, the connection point 1 VI 461 is connected with the cathode of the diode D6, the anode of the diode D6 is connected with the cathode of the operational amplifier U5, the anode of the operational amplifier U5 and the cathode of the operational amplifier U4 are respectively connected in parallel with the connection line of the common connection point III 03 and the interface 6 IV 64, the anode of the operational amplifier U5 is connected with the cathode of the operational amplifier U4, the output end of the operational amplifier U5 is connected with the input end, the output end of a thermistor RT3 is connected with an interface 7 III 73, an interface 7 IV 74 is connected with a connection socket CN2, the output end of a resistor R49 is connected with the input end of a capacitor C29, the input end of a resistor R49 is connected in parallel with a connection line of a common connection point II 02 and a diode D5, the output end of a capacitor C29 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the anode of a polar capacitor C15 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the cathode of a polar capacitor C15 is connected in parallel with a connection line of a common connection point III and an interface 6 IV, the input end of a resistor R35 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the output end of a resistor R35 is connected in parallel with a connection line of a common connection point III 03 and an interface 6 IV, the anode of a polar capacitor C17 is connected in parallel with a connection line of an operational amplifier U42 and a thermistor 46RT 27, the cathode of a polar, the positive pole of the polar capacitor C37 is connected in parallel with the connecting line of the interface 7 II 72 and the connection socket CN2, and the negative pole of the polar capacitor C37 is connected in parallel with the connecting line of the common connection point III 03 and the interface 6 IV 64;

the output end of a resistor R48 is connected with the input end of a capacitor C28, the input end of a resistor R48 is connected in parallel with a connecting line between a connecting point 1 VI 461 and a diode D6, the output end of a capacitor C28 is connected in parallel with a connecting line between a diode D6 and an operational amplifier U5, the anode of a polar capacitor C16 is connected in parallel with a connecting line between a common connecting point III 03 and an interface 6 IV 64, the anode of a polar capacitor C16 is connected with the cathode of a polar capacitor C15, the cathode of a polar capacitor C16 is connected in parallel with a connecting line between a diode D6 and an operational amplifier U5, the input end of a resistor R34 is connected in parallel with a connecting line between the common connecting point III 03 and the interface 6 IV 64, the input end of the resistor R34 is connected with the output end of the resistor R35, the output end of the resistor R34 is connected in parallel with a connecting line between the diode D6 and the operational amplifier U5, the anode of a polar capacitor C18 is connected in, the anode of the polar capacitor C18 is connected with the cathode of the polar capacitor C17, the cathode of the polar capacitor C18 is connected in parallel with the connecting line of the diode D6 and the operational amplifier U5, the anode of the polar capacitor C36 is connected in parallel with the connecting line of the common connecting point III 03 and the interface 6 IV 64, the anode of the polar capacitor C36 is connected with the cathode of the polar capacitor C37, and the cathode of the polar capacitor C36 is connected in parallel with the connecting line of the interface 7 IV 74 and the connection socket CN 2;

the positive 3.3V secondary pole rectification output circuit 11 comprises a polar capacitor C10, an excitation coil LF6, a resistor R50, a resistor R44, a polar capacitor C9, a capacitor C32, a resistor R51 and a diode D3, wherein the excitation coil LF6 is provided with an interface 8I 81, an interface 8 II 82, an interface 8 III 83 and an interface 8 IV 84, the interface 8 II 82 is connected with a wiring socket CN2, the positive pole of the polar capacitor C10 is connected in parallel to a connection line between the interface 8 II 82 and the wiring socket CN2, and the negative pole of the polar capacitor C10 is grounded and connected with the interface 8 IV 84;

the 3.3V switching-on/off auxiliary power supply power transformer 12 comprises a resistor R51, a transformer T2, a diode D7, a resistor R9, a capacitor C6, a resistor R10, a resistor R11, a resistor R12 and a diode D8, wherein the transformer T2 is provided with an interface 4 VII 47, an interface 4 VIII 48 and an interface 4 IX 49, and the interface 4 VII 47, the interface 4 VIII 48 and the interface 4 IX 49 are respectively provided with a connection point 1 VII 471, a connection point 2 VII 472, a connection point 1 VIII 481, a connection point 2 VIII 482, a connection point 1 IX 491 and a connection point 2 IX 492;

a connection point 1 VII 471 is connected with the anode of a diode D3, the cathode of a diode D3 is connected with an interface 8I 81, a connection point 2 VII 472 is grounded and connected with an interface 8 III 83, the anode of a polar capacitor C9, the input end of a resistor R44 and the input end of a resistor R50 are respectively connected in parallel with a connection line of a diode D3 and the interface 8I 81, the cathode of a polar capacitor C9 and the output end of a resistor R50 are respectively connected in parallel with a connection line of the interface 8 III 83 and the connection point 2 VII 472, the output end of a resistor R44 is grounded, the output end of a resistor R51 is connected with the input end of a capacitor C32, the input end of a resistor R51 is connected in parallel with the connection line of the connection point 1 VII 471 and a diode D3, and the output end of a capacitor C32 is connected in parallel with the connection line of the;

the 3.3V switching auxiliary power supply IC PWM control circuit 13 comprises a resistor R5, a resistor R6, a polar capacitor C5, a capacitor C24, a microprocessor CPU2, a resistor R8, a resistor R7, a resistor R13, a resistor R14, a resistor R33, a polar capacitor C4 and an HV end, wherein the specific model of the microprocessor CPU2 is OB2512, a connection point 1 VIII 481 is connected with the HV end, a connection point 2 VIII is connected with a microprocessor CPU2, a connection point 1 IX 491 is connected with an input end of a resistor R12, an output end of the resistor R12 is connected with an anode of a diode D8, a cathode of a diode D8 is connected with a microprocessor CPU2, a connection point 2 IX is connected with a ground end GND5, an anode of a diode D7 is connected in parallel with a connection line of a connection point 2 482 VIII and a microprocessor CPU2, a cathode of a diode D7 is connected with an input end of the resistor R7, an output end of the resistor R7 is connected with an input end of the capacitor C7, and, The input end of the resistor R11 and the input end of the resistor R10 are respectively connected in parallel to a connecting line between the connection point 1 VIII 481 and the HV end, the output end of the resistor R11 is connected in parallel to a connecting line between the resistor R9 and the capacitor C6, and the output end of the resistor R10 is connected in parallel to a connecting line between the resistor R11 and the capacitor C6;

the output end of a resistor R5 is connected with the input end of a resistor R6, the input end of a resistor R5 is connected in parallel with the connecting line of the connecting point 1 VIII 481 and the HV end, the output end of a resistor R6 is connected in parallel with the connecting line of a diode D8 and a microprocessor CPU2, the anode of a polar capacitor C5 is connected in parallel with the connecting line of a diode D8 and a microprocessor CPU2, the cathode of a polar capacitor C5 is connected in parallel with the connecting line of a connecting point 2 IX 492 and a ground terminal GND5, a capacitor C24 is connected in parallel between the connecting line of a diode D8 and a microprocessor CPU2 and the connecting line of a connecting point 2 IX 492 and a ground terminal GND5, the input end of a resistor R8 is connected in parallel with the connecting line of a connecting point 2 IX 492 and a ground terminal GND5, the output end of a resistor R8 is connected with a microprocessor CPU2, the input end of a resistor R9 is connected in parallel with the connecting line of a connecting point 2 IX 492 and a, the output end of a resistor R33 is connected with a microprocessor CPU2, the input end of a resistor R33 is connected in parallel with a connection line of a resistor R12 and a diode D8, the input end of a resistor R13 is connected in parallel with a connection line of a resistor R33 and a resistor R12, the output end of a resistor R13 is connected in parallel with a connection line of a resistor R33 and a microprocessor CPU2, the input end of a resistor R14 is connected in parallel with a connection line of a resistor R33 and a microprocessor CPU2 and is connected with the output end of a resistor R13, the output end of a resistor R14 is connected in parallel with a connection line of a connection point 2 IX 492 and a ground terminal GND5, the positive electrode of a polar capacitor C4 is connected in parallel with a connection line of a connection point 1 VIII 481 and an HV terminal, and the negative electrode of a polar capacitor C4 is.

In summary, after the power adapter changes and transmits the voltage of the input line to the 48V-time tight rectification output line 7, the positive 22V-time negative rectification output line 8, the positive 15V-time negative rectification output line 9 and the negative 15V-time negative rectification output line 10 through the transformer T1, the transmission voltage is converted into corresponding voltage values by the above lines, and then transmitted through the connection socket CN2, and the controllable precision voltage-stabilized power supply converts the voltage of the input line into a voltage value corresponding to the positive 3.3V-time negative rectification output line 11 and then transmits the voltage value through the connection socket CN2, so that the power adapter can provide five kinds of electronic devices with different input voltage ranges for use at the same time, can effectively reduce the number of power adapters with different output voltage values, effectively improve convenience, and can also improve the charging efficiency of the electronic devices.

Claims

1. A power adapter with five groups of independent outputs comprises an adapter body and is characterized in that a connection socket CN1, a connection socket CN2, a commercial power 100V-240V input circuit, a lightning-resistant circuit, an EMI (electro-magnetic interference) filtering electromagnetic anti-interference circuit, a bridge rectifier filter circuit, a main power transformer, a 3.3V on-off auxiliary power control circuit, a main PWM (pulse-width modulation) IC (integrated circuit) control circuit, a positive 48V secondary rectifier output circuit, a positive 22V secondary rectifier output circuit, a positive 15V secondary rectifier output circuit, a negative 15V secondary rectifier output circuit, a positive 3.3V secondary rectifier output circuit, a 3.3V on-off auxiliary power transformer and a 3.3V on-off auxiliary power IC (integrated circuit) control circuit are arranged in the adapter body;

the interface 1I is connected with the output end of a fuse F1, the interface 1 II is connected with the output end of a thermistor RT1, the piezoresistor RZ1 is connected in parallel between the connecting line of the interface 1I and the fuse F1 and the connecting line of the interface 1 II and the thermistor RT1, the interface 1 III is connected with the interface 2 III, the interface 1 IV is connected with the interface 2I, a resistor R1 is connected in series with a resistor R3 and then connected in parallel between the connecting line of the interface 1 III and the interface 2 III and the connecting line of the interface 1 IV and the interface 2I, a resistor R2 is connected in series with a resistor R4 and then connected in parallel between the connecting line of the interface 1 III and the interface 2 III and the connecting line of the interface 1 IV and the interface 2I, a capacitor XC1 is connected in parallel between the connecting line of the interface 1 III and the interface 2 III and the connecting line of the interface 1 IV and the interface 2I, the input end of a capacitor YC3 is connected in parallel to the, the input end of a capacitor YC4 is connected in parallel with a connecting line of the interface 1 IV and the interface 2I and is connected with a resistor R3, the output end of a capacitor YC4 is connected with a grounding terminal GND1, the input end of a capacitor YC5 is connected in parallel with the connecting line of the interface 1 III and the interface 2 III, and the output end of a capacitor YC5 is connected in parallel with the connecting line of a capacitor YC4 and the grounding terminal GND 1;

a connection point 1 iii is connected to an anode of a diode D4, a cathode of a diode D4 is connected to an input terminal of a resistor R60, an anode of a polar capacitor C14 is connected in parallel to a connection line between a diode D4 and a resistor R60, an output terminal of the resistor R60 is connected to a base of a transistor Q60, an emitter of the transistor Q60 is connected to an input terminal of the resistor R60, an output terminal of the resistor R60 is connected to a connection line between the connection point 1 iii and the diode D60, an output terminal of the resistor R60 is connected to an input terminal of the capacitor C60, a cathode of the polar capacitor C60 is connected to an input terminal of the capacitor C60, an output terminal of the capacitor C60 is connected in parallel to a connection line between the polar capacitor C60 and the diode D60, the resistors R60, R60 and R60 are respectively connected in parallel to a connection line between the diode D60 and the resistor R60, and the connection line between the polar capacitor C60, and the transistor Q60, and the connection line between the capacitor C60. An output end of the capacitor C35 is connected to a ground terminal GND4 after being connected in parallel to a connection line between the polar capacitor C14 and the capacitor C34, an output end of the resistor R4 is connected to an input end of the resistor R4, an input end of the resistor R4 is connected in parallel to a connection line between the resistor R4 and the transistor Q4, an output end of the resistor R4 is connected in parallel to a connection line between the capacitor C4 and the polar capacitor C4, an anode of the diode D4 is connected in parallel to a connection line between the resistor R4 and the resistor R4, an output end of the capacitor C4 is connected in parallel to a connection line between the diode D4 and the resistor R4, a cathode of the diode D4 is connected to an input end of the resistor R4, an output end of the resistor R4 is connected to a collector of the transistor Q4, an emitter of the transistor Q4 is connected in parallel to a connection line between the resistor R4 and the connection socket CN 4, a base of the transistor Q4 is connected to a cathode of the diode D4, an anode of the diode D4 is connected to an input, the base of a triode Q6 is connected in parallel with a connection line between a resistor R60 and a triode Q5, the emitter of a triode Q6 is connected with the collector of a triode Q5, the input end of a resistor R65 is connected in parallel with a connection line between a triode Q5 and a resistor R68, the output end of a resistor R65 is connected in parallel with a connection line between a resistor R64 and a triode Q7, the input end of a resistor R67 is connected in parallel with a connection line between a resistor R65 and a resistor R68, the output end of a resistor R67 is connected in parallel with a connection line between a triode Q7 and a resistor R68, the positive electrode of a polar capacitor C19 and the input end of a resistor R66 are respectively connected in parallel with a connection line between a resistor R68 and a connection socket CN2, the negative electrode of a polar capacitor C19 is connected with a ground terminal GND 19, and the output end of the resistor R19;

the anode of the diode D5 is connected with a common connection point II, the cathode of the diode D5 is connected with the anode of an operational amplifier U4, the output end of the operational amplifier U4 is connected with the input end of a thermistor RT4, the output end of the thermistor RT4 is connected with an interface 7I, the interface 7 II is connected with a wiring socket CN2, a common connection point III penetrates through an excitation coil LF5 and then is connected in parallel with a connection line of an interface 6 IV and a wiring socket CN2, a connection point 1 VI is connected with the cathode of a diode D6, the anode of a diode D6 is connected with the cathode of an operational amplifier U5, the anode of an operational amplifier U5 and the cathode of an operational amplifier U4 are respectively connected in parallel with the connection line of the common connection point III and the interface 6 IV, the anode of the operational amplifier U5 is connected with the cathode of the operational amplifier U4, the output end of the operational amplifier U5 is connected with the input end of the thermistor RT3, the output end of, the interface 7 IV is connected with a connection socket CN2, the output end of a resistor R49 is connected with the input end of a capacitor C29, the input end of a resistor R49 is connected in parallel with a connection line of a common connection point II and a diode D5, the output end of a capacitor C29 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the anode of a polar capacitor C15 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the cathode of a polar capacitor C15 is connected in parallel with a connection line of a common connection point III and an interface 6 IV, the input end of a resistor R35 is connected in parallel with a connection line of a diode D5 and an operational amplifier U4, the output end of a resistor R35 is connected in parallel with a connection line of a common connection point III and an interface 6 IV, the anode of a polar capacitor C17 is connected in parallel with a connection line of an operational amplifier U4 and a thermistor RT4, the cathode of a polar, the positive electrode of the polar capacitor C37 is connected in parallel with a connecting line between the interface 7 II and the connection socket CN2, and the negative electrode of the polar capacitor C37 is connected in parallel with a connecting line between the common connection point III and the interface 6 IV;