CN210427738U - Verification system for testing parameters of semiconductor chip - Google Patents

Verification system for testing parameters of semiconductor chip Download PDF

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Publication number
CN210427738U
CN210427738U CN201921246018.4U CN201921246018U CN210427738U CN 210427738 U CN210427738 U CN 210427738U CN 201921246018 U CN201921246018 U CN 201921246018U CN 210427738 U CN210427738 U CN 210427738U
Authority
CN
China
Prior art keywords
workbench
upper side
bottom end
plate
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201921246018.4U
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Chinese (zh)
Inventor
罗佳文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Lingsu Electronic Technology Co ltd
Original Assignee
Suzhou Lingsu Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Lingsu Electronic Technology Co ltd filed Critical Suzhou Lingsu Electronic Technology Co ltd
Priority to CN201921246018.4U priority Critical patent/CN210427738U/en
Application granted granted Critical
Publication of CN210427738U publication Critical patent/CN210427738U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses a verification system for testing parameters of a semiconductor chip, which comprises a workbench; the improved automatic detection device is characterized in that an air cylinder is arranged at one end of the upper side of the workbench, a piston rod is arranged at the front end of the air cylinder, a movable plate is arranged at the front end of the piston rod, pins are arranged at the bottom end of the movable plate, supports are arranged at two ends of the sliding groove, a sliding rod is arranged on the upper side of the supports, a driving disc is sleeved on the upper side of the sliding rod, an electric telescopic rod is arranged at the bottom end of the driving disc, a data collector is installed at the bottom end of the electric telescopic rod, a probe is installed at the bottom end of the data collector, the output end of the probe is electrically connected with the input end. The utility model discloses a when testing semiconductor chip, can place a plurality of semiconductor chip in the inside that holds the board upside and hold the groove, conveniently carry out the material loading.

Description

Verification system for testing parameters of semiconductor chip
Technical Field
The utility model relates to a race unmanned aerial vehicle chip test technical field specifically is a semiconductor chip tests verification system of parameter.
Background
The racing unmanned aerial vehicle realizes real-time experience by utilizing VR equipment and controls flight by utilizing remote control equipment. The semiconductor chip is a semiconductor device which is manufactured by etching and wiring on a semiconductor wafer and can realize a certain function. The test device is not only a silicon chip, but also comprises gallium arsenide (gallium arsenide is toxic, so some poor circuit boards do not decompose the gallium arsenide) and germanium and other semiconductor materials, the semiconductor chip needs to be tested in the production process, the existing test device is very complex in material loading, and the use is very inconvenient.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a verification system of semiconductor chip test parameter to solve the very complicacy of the current testing arrangement material loading that provides in the above-mentioned background art, use very inconvenient problem.
In order to achieve the above object, the utility model provides a following technical scheme: a verification system for testing parameters of a semiconductor chip comprises a workbench; the device comprises a workbench, a cylinder, a piston rod, a movable plate, a pin, a chute, a driving disc, an electric telescopic rod, a data collector, a probe, a data collector and a data collector, wherein the cylinder is arranged at one end of the upper side of the workbench, the bottom end of the cylinder is fixedly arranged on one side of the upper end of the workbench through a bolt, the piston rod is arranged at the front end of the cylinder, the movable plate is arranged at the front end of the piston rod, the pin is arranged at the bottom end of the movable plate, the pin is slidably connected with the chute, the chute is arranged on the upper side of the workbench, brackets are arranged at two ends of the chute, the bottom end of each bracket is welded on the upper side of the workbench, a sliding rod is arranged on the upper side of each, the utility model discloses a storage device, including workstation, movable plate, finished product, storage board, data collector output and display input electric connection, the display is installed in workstation upper end one side, the workstation upper end is kept away from cylinder one side and is provided with the finished product and places the district and wait to detect and place the district, movable plate, finished product are placed the district and are waited to detect and place the district upside and all can place the holding board, a plurality of grooves that hold have been placed to the holding board upside, and a plurality of grooves neatly arranged is holding the board upside.
Preferably, hold board one side and be provided with the handle, and the handle welding holds board one side.
Preferably, hold inslot portion and be provided with the bullet pad, and the bullet pad is through the sticky subsides of bonding inside holding the inslot portion.
Preferably, the finished product placing area and the to-be-detected placing area are all provided with baffles, and the bottom ends of the baffles are welded on the upper side of the workbench.
Preferably, a limiting plate is arranged on one side of the moving plate, and the bottom end of the limiting plate is welded on the upper side of the workbench.
Compared with the prior art, the beneficial effects of the utility model are that: the utility model discloses a when testing semiconductor chip, can place a plurality of semiconductor chip and hold the inside that the groove was held to the board upside, conveniently carry out the material loading, the person of facilitating the use that sets up of handle will hold the board and lift up, be convenient for remove holding the board, the bullet pad has certain elasticity, place semiconductor chip when holding inslot portion, the bullet pad can clip semiconductor chip, avoid appearing rocking when the motion, the setting of baffle can cross the semiconductor chip restriction in certain extent, avoid appearing semiconductor chip and place chaotic phenomenon.
Drawings
Fig. 1 is a schematic view of the overall structure of the present invention;
fig. 2 is the schematic view of the plate-containing structure of the present invention.
In the figure: 1. a work table; 2. a display; 3. a cylinder; 4. a probe; 5. a data collector; 6. An electric telescopic rod; 7. a drive disc; 8. a slide rod; 9. a support; 10. moving the plate; 11. a pin; 12. a finished product placement area; 13. a baffle plate; 14. a chute; 15. a placement area to be detected; 16. a holding plate; 17. A piston rod; 18. a limiting plate; 19. a containing groove; 20. a spring pad; 21. a handle.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1-2, the present invention provides an embodiment: a verification system for testing parameters of a semiconductor chip comprises a workbench 1; an air cylinder 3 is arranged at one end of the upper side of a workbench 1, the bottom end of the air cylinder 3 is fixedly arranged at one side of the upper end of the workbench 1 through a bolt, a piston rod 17 is arranged at the front end of the air cylinder 3, a movable plate 10 is arranged at the front end of the piston rod 17, a pin 11 is arranged at the bottom end of the movable plate 10, the bottom end of the pin 11 is in sliding connection with a chute 14, the chute 14 is positioned at the upper side of the workbench 1, brackets 9 are arranged at two ends of the chute 14, the bottom end of each bracket 9 is welded at the upper side of the workbench 1, a slide rod 8 is arranged at the upper side of each bracket 9, two ends of each slide rod 8 are welded at the upper side of each bracket 9, a driving disc 7 is sleeved at the upper side of each slide rod 8, an electric telescopic rod 6, 5 outputs of data collector and 2 input electric connection of display, display 2 is installed in 1 upper end one side of workstation, and 1 upper end of workstation is kept away from cylinder 3 one side and is provided with the finished product and places district 12 and wait to detect and place district 15, and movable plate 10, finished product are placed district 12 and are waited to detect and place 15 upsides of district and all can have placed and hold board 16, hold board 16 upside and have placed a plurality of grooves 19 that hold, and a plurality of grooves 19 neatly arranged hold board 16 upside.
Further, one side of the containing plate 16 is provided with a handle 21, and the handle 21 is welded on one side of the containing plate 16, so that the handle 21 is convenient for a user to lift the containing plate 16, and the containing plate 16 is convenient to move.
Further, hold inside the 19 that is provided with of groove bullet pad 20, and bullet pad 20 is holding 19 insides of groove through the sticky subsides of bonding, and bullet pad 20 has certain elasticity, places semiconductor chip and when holding 19 insides of groove, and bullet pad 20 can clip semiconductor chip, avoids appearing rocking when the motion.
Further, district 12 is placed to the finished product and 15 are all provided with baffle 13 all around to wait to detect and place the district, and the welding of 13 bottom ends of baffle is at 1 upside of workstation, and the setting up of baffle 13 can be crossed and semiconductor chip restriction in certain extent, avoids appearing semiconductor chip and places chaotic phenomenon.
Further, a limiting plate 18 is arranged on one side of the moving plate 10, the bottom end of the limiting plate 18 is welded on the upper side of the workbench 1, and the limiting plate 18 can limit the moving range of the moving plate 10.
The working principle is as follows: during the use with semiconductor chip neatly place holding 19 upsides, will hold board 16 and place in movable plate 10 top again, cylinder 3 drives piston rod 17 and moves, movable plate 10 is moved forward by piston rod 17's drive, push away movable plate 10 to probe 4 under, electric telescopic handle 6 moves down, drive probe 4 and test holding 19 inside semiconductor chip, data collector 5 shows and contrasts with the information transmission to display 2 upsides that probe 4 surveyed through display 2.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims (5)

1. A verification system for testing parameters of a semiconductor chip comprises a workbench (1); the method is characterized in that: the automatic lifting device is characterized in that a cylinder (3) is arranged at one end of the upper side of the workbench (1), the bottom end of the cylinder (3) is fixedly installed on one side of the upper end of the workbench (1) through a bolt, a piston rod (17) is arranged at the front end of the cylinder (3), a movable plate (10) is arranged at the front end of the piston rod (17), a pin (11) is arranged at the bottom end of the movable plate (10), the bottom end of the pin (11) is in sliding connection with a sliding groove (14), the sliding groove (14) is located on the upper side of the workbench (1), supports (9) are arranged at two ends of the sliding groove (14), a driving disc (7) is sleeved at the upper side of the sliding rod (8), an electric telescopic rod (6) is arranged at the bottom end of the driving disc (7), the upper side of the electric telescopic rod (6) fixes the bottom end of the driving disk (7) through a bolt, the bottom end of the electric telescopic rod (6) is provided with a data collector (5), the bottom end of the data collector (5) is provided with a probe (4), the output end of the probe (4) is electrically connected with the input end of the data collector (5), the output end of the data collector (5) is electrically connected with the input end of the display (2), the display (2) is arranged on one side of the upper end of the workbench (1), a finished product placing area (12) and a to-be-detected placing area (15) are arranged on one side of the upper end of the workbench (1) far away from the cylinder (3), the upper sides of the moving plate (10), the finished product placing area (12) and the placing area to be detected (15) can be respectively provided with a placing plate (16), a plurality of containing grooves (19) are arranged on the upper side of the containing plate (16), and the containing grooves (19) are arranged on the upper side of the containing plate (16) in order.
2. The system of claim 1, wherein the system comprises: a handle (21) is arranged on one side of the containing plate (16), and the handle (21) is welded on one side of the containing plate (16).
3. The system of claim 1, wherein the system comprises: hold groove (19) inside and be provided with bullet pad (20), and bullet pad (20) are inside holding groove (19) through the sticky subsides of bonding.
4. The system of claim 1, wherein the system comprises: baffle plates (13) are arranged on the periphery of the finished product placing area (12) and the to-be-detected placing area (15), and the bottom ends of the baffle plates (13) are welded on the upper side of the workbench (1).
5. The system of claim 1, wherein the system comprises: and a limiting plate (18) is arranged on one side of the moving plate (10), and the bottom end of the limiting plate (18) is welded on the upper side of the workbench (1).
CN201921246018.4U 2019-08-03 2019-08-03 Verification system for testing parameters of semiconductor chip Expired - Fee Related CN210427738U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921246018.4U CN210427738U (en) 2019-08-03 2019-08-03 Verification system for testing parameters of semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921246018.4U CN210427738U (en) 2019-08-03 2019-08-03 Verification system for testing parameters of semiconductor chip

Publications (1)

Publication Number Publication Date
CN210427738U true CN210427738U (en) 2020-04-28

Family

ID=70386234

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201921246018.4U Expired - Fee Related CN210427738U (en) 2019-08-03 2019-08-03 Verification system for testing parameters of semiconductor chip

Country Status (1)

Country Link
CN (1) CN210427738U (en)

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GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20200428

Termination date: 20210803