CN210405365U - Multi-protocol aggregation transmission device and system - Google Patents
Multi-protocol aggregation transmission device and system Download PDFInfo
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- CN210405365U CN210405365U CN201921306497.4U CN201921306497U CN210405365U CN 210405365 U CN210405365 U CN 210405365U CN 201921306497 U CN201921306497 U CN 201921306497U CN 210405365 U CN210405365 U CN 210405365U
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Abstract
The utility model provides a multi-protocol polymerization transmission device and system, the device is including polymerization engine circuit and configuration circuit, polymerization engine circuit has a plurality of communication ports for communicate with a plurality of agreements through a plurality of communication ports according to configuration information, and with the data polymerization of a plurality of agreements to single polymerization channel in transmit, a plurality of agreements include heterogeneous agreement and/or isomorphic agreement; configuration circuitry to store one or more of the configuration information corresponding to the aggregation engine circuitry. The utility model provides a multiprotocol polymerization transmission device and system realizes according to configuration information through polymerization engine circuit a plurality of communication ports communicate with a plurality of heterogeneous agreements and/or isomorphic agreement to transmit in aggregating the single polymerization channel with the data polymerization of a plurality of agreements from a plurality of channels, accomplish for all the data by the polymerization agreement provide the transmission connection facility, reduce channel quantity, reduce equipment complexity and reduce and possess the resource volume.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to a multi-protocol polymerization transmission device and system.
Background
Modern electronic devices or computer systems are comprised of multiple components that communicate with each other for the purpose of controlling and/or transferring data. Communication between these components may involve several different protocols and channels.
System designers are continually demanding more and more functions from the technology platform, while the industrial design and market trend for mobile devices is more modular. These modular designs bring with them the need for a diverse connection of data and control, and today's interconnections need to be simple, reliable, cost effective, and support light, thin and fashionable industrial designs.
In some application scenarios, the simultaneous presence of multiple communication protocols may lead to a situation where multiple channels are required to transmit corresponding protocol data between two physically separated regions of the system. At this time, the number and complexity of the connection channels increase.
SUMMERY OF THE UTILITY MODEL
To the problem that prior art exists, the utility model provides a multiprotocol polymerization transmission device and system.
The utility model provides a multi-protocol polymerization transmission device, including polymerization engine circuit and configuration circuit, wherein:
the aggregation engine circuit is provided with a plurality of communication ports and is used for communicating with a plurality of protocols through the plurality of communication ports according to configuration information and aggregating data from the plurality of protocols into a single aggregation channel for transmission, wherein the plurality of protocols comprise heterogeneous protocols and/or homogeneous protocols;
the configuration circuit is configured to store one or more of the configuration information corresponding to the aggregation engine circuit.
Optionally, the aggregation engine circuit is specifically configured to:
in the configuration learning process of the aggregation channel, transmitting/receiving configuration information through the aggregation channel according to the configuration information;
and in the process of carrying out protocol communication by the communication port, detecting the port state of the communication port according to the configuration information, and transmitting the port state in the aggregation channel, wherein the port states of a plurality of communication ports correspond to data of a plurality of corresponding protocols.
Optionally, the aggregation engine circuit communicates with the aggregation channel using a preset transmission mode, where the preset transmission mode is a synchronous mode, an asynchronous mode, or a pseudo-synchronous mode.
Optionally, the plurality of protocols comprises a digital signal protocol and an analog signal protocol.
The utility model provides a multi-protocol polymerization transmission system, which comprises a first polymerization device and a second polymerization device, wherein the first polymerization device and the second polymerization device are both the multi-protocol polymerization transmission device;
the aggregated channel of the first aggregation device is coupled with the aggregated channel of the second aggregation device via one or more communication channels;
the first aggregation device is used for sending configuration information to the second aggregation device through an aggregation channel and a communication channel corresponding to the first aggregation device;
the first aggregation device is used for sending data to the second aggregation device through an aggregation channel and a communication channel corresponding to the first aggregation device;
the second aggregation device is used for storing and/or executing the configuration information received from the aggregation channel corresponding to the second aggregation device;
and the second aggregation device is used for de-aggregating the data received from the aggregation channel corresponding to the second aggregation device and then sending the data to the external equipment.
Alternatively,
the first polymerization apparatus is specifically configured to:
in the parameter learning process of the first aggregation device, sending the configuration information to the aggregation channel for transmission; detecting the port state of the communication port according to the configuration information in the protocol communication process of the communication port, and transmitting the port state in the aggregation channel;
the second polymerization device is used in particular for:
storing and/or executing configuration information received through an aggregation channel in the second aggregation device parameter learning process;
in the process of protocol communication of the communication port, the port state received from the aggregation channel is sent to external equipment through the communication port according to the configuration information;
wherein the port states of the plurality of communication ports correspond to data of the corresponding plurality of protocols.
Optionally, the first aggregation device and the second aggregation device perform a clock training procedure, establishing one or more clock modes for the transmission connection between the first aggregation device and the second aggregation device.
Optionally, the clock mode comprises a synchronous mode, an asynchronous mode, or a pseudo-synchronous mode.
Optionally, the first aggregation device and the second aggregation device perform a link discovery procedure to detect whether a communication channel link exists between the first aggregation device and the second aggregation device.
Optionally, the first aggregation device and the second aggregation device define the behavior of the multi-protocol aggregation transmission system according to the configuration information.
Optionally, an aggregation channel between the first aggregation device and the second aggregation device transmits multi-protocol data in a time division multiplexing manner.
Optionally, the communication channel includes a physical channel and a logical channel.
The utility model provides a multiprotocol polymerization transmission device and system realizes according to configuration information through polymerization engine circuit a plurality of communication ports communicate with a plurality of agreements to transmit in aggregating the data polymerization to single polymerization channel from a plurality of agreements, accomplish to make same channel for all by the data of polymerization agreement provide the transmission connection facility, reduce the dedicated channel quantity, reduce equipment complexity and reduce and possess the resource volume.
Drawings
In order to more clearly illustrate the technical solutions of the present invention or the prior art, the following briefly introduces the drawings required for the embodiments or the prior art descriptions, and obviously, the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a structural diagram of an embodiment of the multi-protocol aggregation transmission apparatus of the present invention;
fig. 2 is a structural diagram of an embodiment of the multi-protocol aggregation transmission system of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the accompanying drawings in the embodiments of the present invention are combined below to clearly and completely describe the technical solutions in the embodiments of the present invention, and obviously, the described embodiments are some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Fig. 1 shows a multi-protocol aggregation transmission apparatus provided in an embodiment of the present invention, which includes an aggregation engine circuit 11 and a configuration circuit 12, where:
the aggregation engine circuit 11 has a plurality of communication ports, and is configured to communicate with a plurality of protocols through the plurality of communication ports according to configuration information, and aggregate data from the plurality of protocols into a single aggregation channel for transmission, where the plurality of protocols include heterogeneous protocols and/or homogeneous protocols;
the configuration circuit 12 is configured to store one or more of the configuration information corresponding to the aggregation engine circuit 11.
The aggregation engine circuit 11 sends the configuration information in the configuration circuit 12 to an aggregation channel for transmission to other aggregation devices.
The aggregation engine circuit 11 stores and/or executes configuration information received from the aggregated channels in the configuration circuit 12.
In the embodiment of the present invention, it should be noted that, in the communication process between the devices, different protocol types may be adopted to complete the communication. Such as Universal Serial Bus (USB), integrated circuit interconnect (I2C) bus, serial bus, integrated circuit built-in audio bus (I2S), Serial Peripheral Interface (SPI), system management bus (SMBus), sony/philips digital interface format (SPDIF), power transfer Protocol (PD), displayport, High Definition Multimedia Interface (HDMI), and/or general purpose input/output (GPIO) and custom protocol signals that conform to the convergence device bandwidth specification, among other digital and/or analog signal based protocols. The types of protocols described above are given for illustrative purposes, but are not limited thereto. Therefore, different protocol types are needed between the devices to specify the data configuration so as to complete data transmission. Involving several different protocols and dedicated channels also increases the complexity of the device and increases the amount of occupied resources. To this end, the present invention provides an aggregation device capable of communicating with different protocol types and aggregating data from a plurality of protocols into a single aggregation channel for transmission. It is not dependent on protocol type, namely can be suitable for the data transmission of multiple protocols.
In the embodiment of the present invention, it should be noted that, in the aggregation communication process of multiple protocols, different protocol configurations are corresponding to different ports, and the configuration information transmitted between the first aggregation device and the second aggregation device in the parameter learning process contains the configuration information corresponding to the ports and the protocols, so that the port function of the aggregation device is dynamically changed and the protocol type is dynamically defined and supported.
For communication between different devices and with different protocol types, the aggregated channel may transmit multi-protocol data in a time division multiplexing manner. Time division multiplexing is the transmission of different data signals in different time periods of the same communication channel, and can also achieve the purpose of multiplex transmission.
In an embodiment of the invention, the configuration circuit is configured to configure and store one or more of the configuration information corresponding to the aggregation engine circuit. The configuration information includes whether the port is enabled, delay parameters, whether interference is prevented, whether time stretching is performed, jitter management, whether certain special protocols are strengthened, whether periodic signals are supported, whether open drain is supported, whether open set is supported, whether analog signals are supported, and the like. The configuration information is used to direct the operational behavior of the aggregation engine circuitry.
The embodiment of the utility model provides a multi-protocol polymerization transmission device realizes according to configuration information through polymerization engine circuit a plurality of communication ports communicate with a plurality of heterogeneous agreements and/or isomorphic agreement to transmit in gathering the channel alone with the data polymerization from a plurality of agreements, accomplish to make same channel for all by the data of polymerization agreement provide the transmission connection facility, reduce dedicated channel quantity, reduce equipment complexity and reduce and possess the resource volume.
An embodiment of the utility model provides a multiprotocol polymerization transmission device, including polymerization engine circuit and configuration circuit, wherein:
the aggregation engine circuit is provided with a plurality of communication ports and is used for detecting the port states of the communication ports according to the configuration information and transmitting the port states in the aggregation channel in the process of protocol communication of the communication ports, wherein a plurality of protocols can comprise heterogeneous protocols and/or homogeneous protocols;
the configuration circuit is configured to store one or more of the configuration information corresponding to the aggregation engine circuit.
In the embodiment of the present invention, the code elements of the physical layer of any bit protocol type are discrete digital signals, and are composed of 0 and/or 1. The conventional data transmission is performed after the complete data segment is received. For example: the beginning and end of a data segment needs to be detected, and the beginning and end of the data segment needs to be analyzed for the type of protocol the data segment follows. The protocol type is analyzed, a dedicated channel is adopted for data transmission, and the method can be only used for a preset specific protocol.
The device according to the embodiment of the present invention not only performs data transmission in units of data packets, but also can be configured to perform data transmission in units of 0 and/or 1. The method realizes that 1bit data is transmitted when the 1bit data is received, and does not need a large buffer space.
Since the data transmission can be configured in units of 0 and/or 1, the data transmission can be performed without depending on which protocol type the data follows, so that the data transmission method is suitable for any digital protocol type, and data from different protocols can be transmitted under the same aggregation channel.
In the embodiment of the present invention, the change of the high and low levels can be detected at the communication port position. The high level and the low level may be defined, for example, the high level is 1, and the low level is 0, in which case the port status signals and the data signal symbols are associated, that is, the port statuses of the plurality of communication ports and the data symbols of the corresponding plurality of protocols are associated. Therefore, in the process of protocol communication of the communication port, the port state of the communication port is detected according to the configuration information, and the port state is transmitted in the aggregation channel.
The embodiment of the utility model provides an in, the polymerization engine circuit adopts and predetermines transmission mode and polymerization channel communication, predetermine transmission mode and be synchronous mode, asynchronous mode or pseudo-synchronous mode.
In an embodiment of the invention, the configuration circuit is configured to configure and store one or more of the configuration information corresponding to the aggregation engine circuit. The configuration information includes whether the port is enabled, delay parameters, whether interference is prevented, whether time stretching is performed, whether certain special protocols are supported or strengthened, whether periodic signals are supported, whether open drain is supported, whether open set is supported, whether analog signals are supported, and the like. The configuration information is used to direct the operational behavior of the aggregation engine circuitry.
The embodiment of the utility model provides a multi-protocol polymerization transmission device is in through polymerization engine circuit the communication port carries out the agreement communication in-process, according to configuration information detects the port state of communication port will the port state is in transmit in the polymerization channel, accomplish to make same channel for all by the data of polymerization agreement provide the transmission connection facility, reduce dedicated channel quantity, reduce equipment complexity and reduce and possess the resource quantity.
Fig. 2 shows a multi-protocol aggregation transmission system according to an embodiment of the present invention, which includes a first aggregation device 21 and a second aggregation device 22, where the first aggregation device 21 and the second aggregation device 22 are the multi-protocol aggregation transmission devices according to the above embodiments;
the aggregation channels of the first aggregation device 21 and the aggregation channels of the second aggregation device 22 are coupled via one or more communication channels;
the first aggregation device 21 is configured to send configuration information to the second aggregation device 22 through an aggregation channel and a communication channel corresponding to the first aggregation device;
the first aggregation device 21 is configured to send data to the second aggregation device 22 through an aggregation channel and a communication channel corresponding to the first aggregation device;
the second aggregation device 22 is configured to store and/or execute configuration information received from an aggregation channel corresponding to the second aggregation device;
the second aggregation device 22 is configured to disaggregate the data received from the aggregation channel corresponding to the second aggregation device and send the data to the external device.
The first polymerization device 21 is specifically configured to:
detecting the port state of the communication port according to the configuration information in the protocol communication process of the communication port, and transmitting the port state in the aggregation channel, wherein the port states of a plurality of communication ports correspond to data of a plurality of corresponding protocols;
the second polymerization device 22 is used in particular for:
and sending the port state to external equipment through the communication port according to the configuration information.
In an embodiment of the present invention, the aggregation channel of the first aggregation device 21 is coupled to the aggregation channel of the second aggregation device 22 via one or more communication channels. Here, the communication channel may use a simplex mode, a half duplex mode, a full duplex mode, regardless of transmission media, a wired or wireless channel, a physical channel, or a logical channel.
The embodiment of the utility model provides an in, data communication between two equipment is first equipment and second equipment respectively. The first device transmits data to the second device. And the first aggregation device is connected with the corresponding communication port of the first equipment, detects the port state of the communication port according to the configuration information and transmits the port state in the aggregation channel. And the port state information is transmitted to an aggregation channel of a second aggregation device through a communication channel by an aggregation channel, and the port state is sent to the second equipment through the communication port according to the configuration information.
In an embodiment of the present invention, in the multiprotocol aggregation transmission system, the device for transmitting data is a first aggregation device, and the device for receiving data is a second aggregation device. Therefore, there are the following cases:
A. in the multi-protocol aggregation transmission system, the first aggregation device is one, the second aggregation device is one or more, and the second aggregation device is provided with the capability of receiving data from the first aggregation device.
B. In the multi-protocol aggregation transmission system, one or more first aggregation devices can realize that each first aggregation device transmits data in turn, and one or more second aggregation devices are used for receiving data from the first aggregation devices. The first aggregation device configured to transmit data may specify, based on the configuration information, that all of the second aggregation devices receive data, and may also specify, based on the configuration information, that some of the second aggregation devices receive data.
In the embodiment of the present invention, the aggregation device and the aggregation channel can operate in the following communication modes:
A. in simplex communication mode, a first aggregation device transmits aggregated data and one or more second aggregation devices receive aggregated data. In this case, unidirectional polymerization is supported
B. In the half-duplex communication mode, a plurality of aggregation devices occupy a communication channel in turn to send aggregated data, and the other aggregation devices receive the aggregated data, so that bidirectional aggregation is supported.
C. In the full-duplex communication mode, a plurality of aggregation devices transmit aggregation data through respective corresponding communication channels, and the other aggregation devices receive the aggregation data, so that bidirectional aggregation is supported.
In an embodiment of the present invention, it is further explained that, before data transmission, the first aggregation device and the second aggregation device perform a clock training procedure, establishing one or more clock modes for connection between the first aggregation device and the second aggregation device. The clock mode includes a synchronous mode, an asynchronous mode, and a pseudo-synchronous mode. As shown in fig. 2:
1) a synchronous mode: in an embodiment of the present invention, the aggregation engine circuits of the first aggregation device and the second aggregation device operate on the same logic clock. In the synchronous mode embodiment, the common clock signal is transmitted via an aggregated channel.
The first aggregation apparatus 21 further includes a local clock generator 211, and the second aggregation apparatus 22 further includes a local clock generator 221. The local clock generator 211 of the first aggregation means 21 is configured to generate a local reference clock signal CLKA in order to synchronize or control different parts of the first aggregation means 21 (e.g. the aggregation engine circuitry and the configuration circuitry). The local clock generator 221 of the second aggregation device 22 is configured to generate a local reference clock signal CLKB to synchronize or control different portions (e.g., aggregation engine circuitry and configuration circuitry) of the second aggregation device 22.
In this embodiment, the local clock generator 211 of the first aggregation means 21 is configured to send the local reference clock signal CLKA to the second aggregation means 22 via the aggregation channel. The second aggregation means 22 is further configured to measure the received reference clock signal CLKA of the first aggregation means and to adjust the local clock generator 221 based on the difference between the local reference clock signals CLKB and CLKA to match the frequency of the reference clock signal CLKA of the first aggregation means.
The first aggregation means 21 continuously transmits the local reference clock signal CLKA at the agreed time in order to allow the second aggregation means 22 sufficient time to match the clock. At the completion of the clock training process, the first aggregation means 21 queries the second aggregation means 22 by sending a request over the aggregation channel in order to determine the clock training completion status. Based on the response from the second aggregation means 22, one or more operational modes that the link may use can be indicated.
In an embodiment of the present invention, the local reference clock signal CLKA of the first aggregation device may be derived from a device external clock signal. Various reference clock signal sources are within the scope of embodiments of the present invention.
2) Asynchronous mode: in an embodiment of the present invention, the first aggregation means 21 and the second aggregation means 22 are configured to operate with local or external reference clock signals CLKA and CLKB of independent frequencies. Under these conditions, asynchronous mode is enabled.
The first aggregation means 21 and the second aggregation means 22 are further configured to perform a Clock Data Recovery (CDR) operation in order to recover the data bits from the aggregated channels and to search for the start of the data. In certain embodiments, the start of a data bit is determined by pattern matching. For example, the first aggregation apparatus 21 or the second aggregation apparatus 22 transmits a preamble at the start of each transmission in order to identify the start of data. The data, length, polarity, and matching requirements of the preamble are programmable. In an embodiment, the preamble is also used for recovering the data bits. If the preamble patterns match, it is determined that the data sent to the aggregation engine circuitry is normal.
In an embodiment of the present invention, the first aggregation device 21 includes a CDR circuit 212, and the second aggregation device 22 includes a CDR circuit 222. CDR circuits 212 and 222 are configured to perform the CDR operations discussed above. The CDR circuit 221 may be integrated in the aggregation engine circuit 11 of the first aggregation device 21, and the CDR circuit 222 may be integrated in the aggregation engine circuit 11 of the second aggregation device 22. In other words, in these embodiments, the CDR operation may be performed by the aggregation engine circuits of the first aggregation device 21 and the second aggregation device 22.
3) Pseudo-synchronous mode: in pseudo-sync mode, the second aggregation means 22 is configured to continuously adjust the frequency of the local clock reference signal CLKB to match the frequency of the local clock reference signal CLKA of the first means 21. Pseudo synchronous mode operation may be performed by local clock generators 211 and 221 along with CDR circuits 212 and 222, although the invention is not limited thereto. In an embodiment, when operating in pseudo-sync mode, a clock compensation event is allowed when there is a slight difference between CLKA and CLKB.
In an embodiment of the present invention, further explaining, before data transmission, the first aggregation device and the second aggregation device perform a link discovery process to detect whether the first aggregation device is connected to the second aggregation device through a communication link.
In an embodiment of the present invention, the multi-protocol aggregation transmission system as shown in fig. 2 adopts a resistor termination scheme to facilitate the link discovery process. For example, when in the idle state, the first aggregation device 21 receives logic "1" data indicating an idle value on the aggregation channel. Therefore, whenever the second aggregation apparatus 22 is connected to the aggregation channel, the idle value received by the first aggregation apparatus 21 changes from logic "1" to logic "0". Then, the first aggregation apparatus 21 can find the second aggregation apparatus 22 according to the idle value change.
With this arrangement, the first aggregation means 21 may further comprise a low power circuit 213. The low power circuitry 213 is configured to monitor the aggregated channel to wake up (enable) the aggregation engine circuitry if the idle value transitions from a logic "1" to a logic "0". In an embodiment, the second aggregation means 22 further comprises a low power circuit 223. The low power circuit 223 is configured to monitor the aggregated channel in order to detect any activity.
In an embodiment of the present invention, the resistor terminal scheme is implemented by a pull-up circuit and a pull-down circuit. The pull-up circuit is used to pull up the aggregate channel level in the first aggregate unit 21 to a high voltage in order to generate an idle value of logic "1". Alternatively, the pull-down circuit is used to pull down the aggregate channel level in the second aggregation means 22 to a low voltage in order to generate an idle value of logic "0".
The above is an example implementation of the resistive termination scheme given for illustrative purposes. Various embodiments of the resistive termination scheme are within the contemplation of the present invention.
In the embodiment of the present invention, before data transmission, a configuration learning process is required. This process is used to set the operational behavior of the aggregation device. As shown in fig. 2, the configuration circuit 12 is used to store configuration information related to the aggregation engine circuit 11 and the plurality of protocol behaviors. In an embodiment of the present invention, the configuration circuit is implemented by a register. The register stores one or more register values RS indicating settings of the aggregation engine circuit. These register values may be used to specify the properties of the communication channel interconnect (latency, simplex, half-duplex or full-duplex, current external transceiver, etc.), clocks (asynchronous, pseudo-synchronous, source synchronous), link level properties (preamble length, packet gap, idle value, etc.) and other configurations, as well as the number and type of protocols to be aggregated.
For example, a register may be used to specify that certain pins are implemented as open drain I/O, while certain other pins are considered high bandwidth inputs from the first aggregation device 21 to the second aggregation device 22, then another pair of inputs is processed as low jitter inputs from the second aggregation device 22 to the first aggregation device 21, and the last set of pins is used to carry auxiliary channels and hot plug detect signals. In this way, the entire set of protocols can be defined to determine how (or if) they are to be aggregated on the aggregated channel. In an embodiment, the configuration information is transferred from one aggregation device to another aggregation device during an initialization and parameter training process.
In a non-limiting example, the training process includes transferring a set of register values from the first aggregation means 21 to the second aggregation means 22. The set of register values may be stored in a register of the configuration circuit. The set of register values is copied from the first aggregation means 21 to the second aggregation means 22 or from the second aggregation means 22 to the first aggregation means 21.
For example: if the number of register values is assumed to be 32. Each register (numbers 0-31) is transferred as follows:
the first aggregation means 21 sequentially transmits a first byte indicating a learning index (0-31), a second byte indicating a learning value (0-255), and a third byte indicating a CRC (cyclic redundancy check) covering the first and second bytes. If the bytes sent from the first aggregation means 21 are correctly received by the second aggregation means 22 (CRC match), the second aggregation means 22 then writes the learned value into the register of the corresponding learned index.
Thereafter, the second aggregation means 22 reads the register and sequentially transmits the first byte of the learning index received from the first aggregation means 21, the second byte of the read back value, and the third byte indicating a CRC (cyclic redundancy check) covering the first and second bytes. If the first aggregation means 21 receives these 3 bytes correctly (CRC match), the first aggregation means 21 continues to the next learned index and repeats the same process until the final learned index is sent and successfully looped back. Finally, the first aggregation means 21 transmits an index indicating the end of learning to the second aggregation means 22, so that the learning process is completed.
If a CRC error is detected in the learning process from the second aggregation means 22, the second aggregation means 22 rejects the new learned index and responds with the same learned index of the previously correctly received sequence. If the first aggregation means 21 detects a CRC error during the learning process, the first aggregation means 21 stops sending the next learning index and retransmits the previous training sequence. If the learning process is complete, the links are enabled for aggregation.
The foregoing has presented an example implementation of a configuration learning scheme for illustrative purposes. Various embodiments of the configuration learning scheme are within the contemplation of the present invention.
In the embodiment of the present invention, after the connection is started, the first aggregation device 21 and the second aggregation device 22 mutually transmit aggregation and de-aggregation of data. In the aggregation/de-aggregation process, data of a plurality of protocols is transmitted to an aggregation engine circuit of an aggregation device in a time division multiplexing mode, and the data of the plurality of protocols are coded and transmitted in different time slots of a single aggregation channel through the aggregation engine circuit.
The aggregation engine circuitry contains one or more communication interfaces capable of requesting data to be sent at any time. The aggregation engine circuit selects a port for protocol 1-protocol N that asserts a request upon entering a time division multiplexed duty cycle. Thus, the selected port is determined to correspond to the time slot. The aggregation engine circuit then accepts the data transmitted from the selected port and transmits the data in the corresponding time slot.
In this embodiment, once the selected port has sent all the data bits, the aggregation engine circuit further selects the next port from protocol 1-protocol N to perform similar operations as discussed above. The aggregation engine circuitry repeats this process until every requested port has sent all the data. By effectively utilizing the operations discussed above, data from protocol 1-protocol N is aggregated onto an aggregated channel.
In the depolymerization process, the operation of the depolymerization process is symmetrical to the operation of the polymerization process. The aggregation engine circuit of a receiving device (e.g., a second aggregation device) selects a corresponding port among the protocols 1-protocol N on its side when entering a time slot. Thus, the time slot corresponding to the selected port is determined. If the selected port requests to receive more bits of data, the selected port continues to maintain its request until the last bit of data is received. Once the selected port has received all the bits of data, the aggregation engine circuit selects the next port from protocol 1-protocol N to perform similar operations as discussed above. The aggregation engine circuitry repeats this process until each port has received all of the data. Through the operations discussed above, data on the aggregated channel is disaggregated by the aggregation engine circuitry and received by the corresponding device.
In this embodiment, the aggregation engine circuit may be implemented with, but is not limited to, an arbiter. In these embodiments, the aggregation engine circuitry is configured to progressively send requests (i.e.; protocol 1-protocol N) through each port on one side and to progressively receive requests at each port on the other side at the same time. Each of protocol 1-protocol N waits for authorization and sends/receives data until completion. The appropriate number of data bits is sent and declared for each protocol (protocol 1-protocol N) configuration.
In the embodiment of the present invention, for the programmable bandwidth setting, in the normal mode, each input port (protocol) is sampled once per ring period (timeslot), and the sampled data is sent to the other end of the aggregation channel, and then placed on the de-aggregation output of the aggregation device. In the normal mode, the sampling rate is equal to the time division multiplex loop frequency. To support higher bandwidth protocols, the sampling rate may be increased. For example; the input is sampled multiple times in each time division multiplexed ring period so that the sampled inputs are sent to the de-aggregation means (second aggregation means) on the other side of the aggregated link at a rate that is a fraction of the ring period. Alternatively, to support low bandwidth signals, the input may be sampled at a rate of every N loop cycles, where N is greater than 1. With the bandwidth settings discussed above, the sampling rate of each port (protocol) is optimized to accommodate the required transmission rate while minimizing the ring size.
In the embodiment of the present invention, configurable anti-interference processing is implemented on a port (protocol), so as to eliminate signal glitches, for example, a level that lasts for more than a specific time period is determined as a trusted signal. In addition, corresponding port pins in the aggregation engine circuitry may be configured to be in an open drain/set state, depending on the external device (protocol requirements).
In the embodiment of the present invention, there are different processing conditions and modes in the aggregation process for different signals:
(1) analog signal aggregation
The embodiment of the utility model provides an in, can correspond the port to outside analog signal and implement signal sampling and use ADC (analog-digital converter) to convert digital signal, then polymerization transmission reduces through DAC (digital-analog converter) to the polymerization device depolymerization of the other end after to realize the polymerization transmission to analog signal.
(2) Time stretch signal polymerization
In the embodiment of the present invention, when there is an open/close/gather requirement, in some external device (protocol) requirements, it is configurable to allow time stretching, when being pulled down/high by the aggregation client corresponding to the port level, the aggregation engine circuit of the second aggregation device 22 corresponds to the port output driver in addition to the drive output, in order to prevent the unexpected edge inversion by the aggregation signal, after waiting for the preconfigured time, the aggregation engine circuit of the second aggregation device 22 detects whether there is time stretching, and transmits the stretching signal to the first aggregation device 21.
(3) Periodic signal aggregation
In an embodiment of the present invention, for a clock (or periodic) mode, reproduction of a high frequency signal is allowed. In order to aggregate high frequency periodic signals having a frequency higher than the aggregation channel carrying bandwidth, a periodic wave generator may be employed in the aggregation device. The periodic wave generator is configured to be programmable to generate a signal having a waveform of arbitrary frequency and duty cycle. In an embodiment, these signals may be used to provide local clock resources if they are not used for aggregation.
A mechanism for the aggregate transmission of periodic signals from the inputs to the outputs is explained herein. First, the corresponding port is in "clock" mode. The input side enters acquisition mode and the output side enters standby mode to receive commands from the link partner. During acquisition, the input signal is continuously sampled for edges, where the rising edges carry frequency information and the falling edges carry information that can be used to set the duty cycle. In the acquisition phase, the aim is to provide the periodic wave generator with starting values for the high period and the low period. A simple implementation of the acquisition phase is to run a counter on the internal clock and this periodic signal. After running these counters for a predetermined time, the ratio of the relative frequencies of the two clocks can be obtained and is also the ratio used for programming the periodic clock generator. To set the initial duty cycle, different approaches may be taken based on the relative frequencies of the input signal and the aggregation engine circuit 11. If the input signal is relatively slow, the setting of the low period and the setting of the high period can be used directly. For higher frequency inputs, a sub-periodic sampling approach may be employed, similar to the logic used in the dither pattern. In some applications, at very high frequencies, the duty cycle is less important and may be configured to have a user selectable duty cycle (e.g., 50%).
And after the acquisition stage is completed, entering an initialization stage. After acquisition, the high and low cycle settings of the waveform generator are determined. The device on the input side transmits these values to the device on the output side via the aggregated channel and programs the waveform generator. The input side device is responsible for controlling the waveform generator to align it with the input phase. At this point the waveform generator has been programmed with the correct settings and the periodic signal on the input side is being reproduced on the output side. Technically, the signal does not pass through the aggregate channel, only the information needed to reproduce the signal is transmitted. With this mode, aggregation of periodic signals having a frequency higher than that of the aggregated channel is allowed.
In an embodiment of the present invention, for a periodic analog signal, such as a sine wave, first, the port is configured as a sine wave aggregation, the input signal is collected with frequency and amplitude, and the device on the output side uses a programmable waveform generator to generate a sine wave signal of the same amplitude and frequency.
(4) Low jitter signal aggregation
In an embodiment of the invention, for the dither pattern, timing information is transmitted with the data value. For example; if the input is sampled every clock cycle and the input changes from a logical value of 0 for cycle 11 to a logical value of 1 for cycle 12, respectively. In the next transmission, instead of transmitting data, information about the transition is transmitted, and the fact that the 0-to-1 transition occurred in the cycle 12 is transmitted. The link partner will then drive this 0 to 1 transition to the output during cycle 12 of the next ring. If there are no transitions (e.g., 16 cycles) during the detection of a given loop, a flag indicating "no transitions" is sent. The remaining bits, which typically carry edge location information (i.e., transitions of the signal), can be used to send the current value of the signal. With this arrangement, each edge from the near side to the far side can be reproduced with the accuracy of one cycle. By sampling and reproducing the edges with sub-period accuracy, even lower jitter can be achieved.
(5) Transaction signal aggregation
In some protocols, where multi-bit data is obtained using a data sampler and buffered and then aggregated for transmission to an aggregation partner on the other side for reproduction, for example, in another non-limiting example of a Display Port (DP) auxiliary channel (AUX) and Hot Plug Detect (HPD) protocol, the data sampler and data buffer of the DP AUX protocol may be used. The data sampler is used to capture each data unit on an AUX (auxiliary channel) channel of the DP protocol as data for aggregation. The data buffer has a capacity to store a plurality of bits of data, and is used to store data sampled by the data sampler. The data buffer is also used to monitor the data content to detect preambles and edges. Each HPD event is similarly captured as a set of events on the receive side and sent over a channel and reproduced on the drive side.
In another non-limiting example of using the full-speed and/or low-speed USB protocols among the protocols, a retimer of the USB protocol is used. The retimer transparently passes data from/upstream (host) to/from downstream (device) through the aggregation process, allowing devices to maintain communication during aggregation without impacting system software or the USB hierarchy. (6) General purpose input output signal aggregation
In embodiments of the present invention, the aggregation engine circuitry may cooperate with certain functions and/or circuitry of the physical layer interface to perform corresponding operations. To illustrate, in the case of adopting a GPIO (general purpose input output) protocol, a read function and a drive function of the GPIO protocol may be used. The read function is used to sample the input and the drive function is used to drive the signal to the corresponding link partner. For GPIO, any protocol may be aggregated if the protocol can tolerate the delay and jitter of a particular implementation of a multi-protocol aggregated transmission system. Further, with regard to GPIOs, one or more settings may be employed, including programmable bandwidth settings, open drain/gather mode, time stretch settings, jitter mode, and clock (or periodic) mode, among others. In this embodiment, although the signal driving direction in the aggregated protocol is known, in order to implement the requirements independently of the protocol, configurable driving direction control/indication is provided for the corresponding GPIO, by which the driving direction can be configured independently of the protocol. Therefore, settings such as switching aggregate driving direction and switching time can also be configured.
The embodiment of the utility model provides a multiprotocol polymerization transmission system is in through polymerization engine circuit the communication port carries out the agreement communication in-process, according to configuration information detects the port state of communication port will the port state is in transmit in the polymerization channel, accomplish to make same channel provide the transmission connection facility for the data of all polymerization agreements, reduce the dedicated channel quantity, reduce equipment complexity and reduce and possess the resource volume.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (12)
1. A multi-protocol aggregation transmission apparatus comprising an aggregation engine circuit and a configuration circuit, wherein:
the aggregation engine circuit is provided with a plurality of communication ports and is used for communicating with a plurality of protocols through the plurality of communication ports according to configuration information and aggregating data from the plurality of protocols into a single aggregation channel for transmission, wherein the plurality of protocols comprise heterogeneous protocols and/or homogeneous protocols;
the configuration circuit is configured to store one or more of the configuration information corresponding to the aggregation engine circuit.
2. The multi-protocol aggregation transmission device according to claim 1, wherein the aggregation engine circuit is specifically configured to:
in the configuration learning process of the aggregation channel, transmitting/receiving configuration information through the aggregation channel according to the configuration information;
and in the process of carrying out protocol communication by the communication port, detecting the port state of the communication port according to the configuration information, and transmitting the port state in the aggregation channel, wherein the port states of a plurality of communication ports correspond to data of a plurality of corresponding protocols.
3. The multi-protocol aggregation transmission device according to claim 1, wherein the aggregation engine circuit communicates with the aggregation channel using a preset transmission mode, and the preset transmission mode is a synchronous mode, an asynchronous mode, or a pseudo-synchronous mode.
4. The multi-protocol aggregate transmission of claim 1, wherein the plurality of protocols comprises a digital signal protocol and an analog signal protocol.
5. A multiprotocol convergence transmission system comprising a first convergence device and a second convergence device, wherein the first convergence device and the second convergence device are the multiprotocol convergence transmission device of any one of the claims 1 to 4;
the aggregated channel of the first aggregation device is coupled with the aggregated channel of the second aggregation device via one or more communication channels;
the first aggregation device is used for sending configuration information to the second aggregation device through an aggregation channel and a communication channel corresponding to the first aggregation device;
the first aggregation device is used for sending data to the second aggregation device through an aggregation channel and a communication channel corresponding to the first aggregation device;
the second aggregation device is used for storing and/or executing the configuration information received from the aggregation channel corresponding to the second aggregation device;
and the second aggregation device is used for de-aggregating the data received from the aggregation channel corresponding to the second aggregation device and then sending the data to the external equipment.
6. The multiprotocol aggregation transmission system of claim 5, characterized in that,
the first polymerization apparatus is specifically configured to:
in the parameter learning process of the first aggregation device, sending the configuration information to the aggregation channel for transmission; detecting the port state of the communication port according to the configuration information in the protocol communication process of the communication port, and transmitting the port state in the aggregation channel;
the second polymerization device is used in particular for:
storing and/or executing configuration information received through an aggregation channel in the second aggregation device parameter learning process;
in the process of protocol communication of the communication port, the port state received from the aggregation channel is sent to external equipment through the communication port according to the configuration information;
wherein the port states of the plurality of communication ports correspond to data of the corresponding plurality of protocols.
7. The multi-protocol aggregation transmission system of claim 5, wherein the first aggregation device and the second aggregation device perform a clock training procedure to establish one or more clock modes for the transmission connection between the first aggregation device and the second aggregation device.
8. The multiprotocol aggregation transmission system according to claim 7, wherein the clock mode comprises a synchronous mode, an asynchronous mode or a pseudo-synchronous mode.
9. The multiprotocol aggregation transmission system according to claim 5, wherein the first aggregation device and the second aggregation device perform a link discovery procedure to detect whether there is a communication channel link between the first aggregation device and the second aggregation device.
10. The multiprotocol aggregate transport system according to claim 5, characterized in that the first aggregation means and the second aggregation means define the behavior of the multiprotocol aggregate transport system according to the configuration information.
11. The multiprotocol aggregate transmission system according to claim 5, wherein the aggregate channel between the first aggregation means and the second aggregation means transmits the multiprotocol data in a time division multiplex manner.
12. The multiprotocol aggregation transmission system according to claim 5, wherein the communication channels comprise physical channels and logical channels.
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Effective date of registration: 20200907 Address after: California, USA Patentee after: Spectrum Technology Co.,Ltd. Address before: 400039 Kowloon Po District, Chongqing City, 60 Kecheng Road, Kangtan West Jinyi Building, 12 Floors Patentee before: Ruisi Semiconductor (Chongqing) Co.,Ltd. |