CN210405083U - Control circuit of double-inductance bridgeless booster circuit - Google Patents
Control circuit of double-inductance bridgeless booster circuit Download PDFInfo
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- CN210405083U CN210405083U CN201921332085.8U CN201921332085U CN210405083U CN 210405083 U CN210405083 U CN 210405083U CN 201921332085 U CN201921332085 U CN 201921332085U CN 210405083 U CN210405083 U CN 210405083U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model provides a two inductance bridgeless boost circuit's control circuit, when first switch tube and second switch tube turn-offs, sampling output current compensates output signal and reference signal's error respectively in input voltage's positive and negative half cycle to make output signal reach expected value. The utility model discloses can make the input voltage equal at the output current of positive, negative half cycle or output voltage.
Description
Technical Field
The utility model relates to a power electronics field, in particular to no bridge boost circuit's of two inductances control circuit.
Background
For high power (pf) applications, the dual-inductor bridgeless boost circuit scheme is widely used because of high efficiency, no common mode leakage, balanced heating of components, and simple driving (one way driving can be shared).
In the positive and negative periods of the power grid, the two MOS tubes work alternately, in the prior art, the control scheme of the double-inductance bridgeless booster circuit needs to arrange current sampling resistors at the drain electrodes of the two MOS tubes, so that the impedance of current flowing back to the power grid circuit is increased, and the system efficiency is reduced; in addition, two current sampling circuits are needed, so that the complexity of the system is increased; in addition, the traditional current sampling mode is to sample the current of the MOS tube, a current sensor is needed, and the system cost is high. And due to the deviation of the two inductance values, the output current in the positive and negative half periods of the input voltage is different (large wavelet) by the conventional constant on-time control (COT control), so that the output voltage ripple becomes large, and for an LED load, the LED flicker at low frequency can be caused; the traditional control scheme with the multiplier can ensure that the peak currents output in the positive half period and the negative half period of the input voltage are equal, but because of the influence of factors such as frequency limit, inconsistent on-off delay of an MOS (metal oxide semiconductor), and the like, the average currents in the positive half period and the negative half period are still different, and LED flicker is easily caused.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a double-inductance bridgeless boost circuit's control circuit for solve the problem that prior art exists at the output current or the voltage inequality of the positive, negative half cycle of input voltage.
In order to achieve the above object, the present invention provides a control circuit of a dual-inductor bridgeless boost circuit, which comprises a period determination module, which receives an input voltage sampling signal or an output current sampling signal, and determines when the input voltage enters a positive half period and when the input voltage enters a negative half period;
and the compensation module receives the errors of the output signal and the reference signal, respectively compensates the errors of the output signal and the reference signal in positive and negative half periods of the input voltage according to the period judgment of the period judgment module on the input voltage, so that the output signal reaches an expected value.
Optionally, the compensation module includes a first compensator and a second compensator, where the first compensator and the second compensator respectively receive a difference between the output signal and the reference signal, and respectively output a first control signal and a second control signal;
during the positive half period of the input voltage, the first compensator works, the output of the second compensator is kept unchanged, and the first control signal controls the conduction time of the first switching tube and the second switching tube;
during the negative half period of the input voltage, the output of the first compensator is kept unchanged, the second compensator works, and the second control signal controls the conduction time of the first switching tube and the second switching tube.
Optionally, the period judging module receives an input voltage sampling signal and outputs a first enable signal; when the input voltage sampling signal falls to a first threshold value, representing that the input voltage enters a negative half period, and controlling the enabling of a second compensator by the first enabling signal; and when the input voltage sampling signal rises to a second threshold value on the rising edge of the input voltage, the input voltage is characterized to enter a positive half period, and the first enable signal controls the first compensator to enable.
Optionally, the period judging module receives the output current sampling signal and outputs a second enable signal; when the peak current in one switching period falls to a third threshold value, the second enabling signal controls the first compensator to enable; in the next period, when the peak current in one switching period falls to a third threshold value, the second enable signal controls the second compensator to enable, and so on, the first compensator and the second compensator are switched to enable.
Optionally, the first compensator includes a first integrating circuit, a first capacitor, and a first comparator, and the first integrating circuit integrates a difference between the output signal and the reference signal and outputs a first voltage; a first current charges the first capacitor, a first input end of the first comparator receives the first voltage, a second input end of the first comparator receives the first capacitor voltage, and the first comparator outputs a first control signal; when the first capacitor voltage reaches the first voltage, the first control signal controls the first switch tube and the second switch tube to be switched off.
Optionally, the second compensator includes a second integrating circuit, a second capacitor, and a second comparator, the second integrating circuit integrates a difference between the output signal and the reference signal, and outputs a second voltage, a second current charges the second capacitor, a first input terminal of the second comparator receives the second voltage, a second input terminal of the second comparator receives the second capacitor voltage, and the second comparator outputs a second control signal; when the second capacitor voltage reaches the second voltage, the second control signal controls the first switch tube and the second switch tube to be switched off.
Optionally, the output signal is an output current sampling signal or an output voltage sampling signal.
Compared with the prior art, the utility model has the advantages of it is following: when the first switching tube and the second switching tube are turned off, the output current is sampled, and in the positive half period and the negative half period of the input voltage, the errors of the output signal and the reference signal are respectively compensated, so that the output signal is equal to the reference signal. The utility model discloses can make input voltage's the output current or the output voltage of positive, negative half cycle equal.
Drawings
FIG. 1 is a schematic diagram of a dual-inductor bridgeless boost circuit of the present invention;
FIG. 2 is a schematic diagram of a control circuit of the dual-inductor bridgeless boost circuit of the present invention;
FIG. 3 is a waveform diagram of the operation of the cycle judging module of the present invention;
fig. 4 is a schematic circuit diagram of a compensator according to the present invention;
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to only these embodiments. The present invention covers any alternatives, modifications, equivalents, and alternatives falling within the spirit and scope of the present invention.
In the following description of the preferred embodiments of the present invention, specific details are set forth in order to provide a thorough understanding of the present invention, and it will be apparent to those skilled in the art that the present invention may be practiced without these specific details.
The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the drawings are simplified and in non-precise proportion, so as to facilitate and clearly assist in explaining the embodiments of the present invention.
As shown in fig. 1, illustrating the present inventionNovel double-inductance bridgeless booster circuit schematic diagram comprising an AC input power supply VACA first inductor LB1A second inductor LB2The switch comprises a first switch tube M1, a second switch tube M2, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4 and an output capacitor CBLoad RLAnd a sampling resistor RCS. First inductance LB1The first end is connected with an input power supply VACOne end, the second end of which is connected with the anode of a first diode D1; second inductance LB2The first end is connected with an input power supply VACThe other end of the second diode is connected with the anode of a second diode D2; the cathodes of the first diode D1 and the second diode D2 are connected with an output capacitor CBA first end of the first switch tube M1 is connected to the anode of the first diode D1, a first end of the second switch tube M2 is connected to the anode of the second diode D2, and second ends of the first switch tube M1 and the second switch tube M2 pass through the sampling resistor RCSConnecting output capacitor CBA second end; the cathode of the third diode D3 is connected with the input power supply VACOne end of the fourth diode D4 is connected with an input power supply VACThe anodes of the third diode D3 and the fourth diode D4 are connected to the second ends of the first switch tube M1 and the second switch tube M2; load RLConnected in parallel to an output capacitor CBTwo ends.
At an AC input VACPositive half-cycle of (1), first inductance LB1And the first switch tube M1 works in a boosting mode, and current flows through the fourth diode D4, the anti-parallel diode of the second switch tube M2 and the second inductor LB2The current flows back to the power grid; at an AC input VACNegative half period of (1), second inductance LB2And the second switch tube M2 works in a boosting mode, and current flows through the third diode D3, the anti-parallel diode of the first switch tube M1 and the first inductor LB2And (4) flowing back to the power grid.
As shown in fig. 2, the control circuit schematic diagram of the dual-inductor bridgeless boost circuit of the present invention is illustrated, including the period determination module U01, the compensation module U04, the compensation module includes a subtractor, a first compensator U02, a second compensator U03, and switches S1, S2, S3, S4. The subtracter receives the reference signal Vref and the output signal, and outputs a difference signalAnd e, the output signal is an output current sampling signal Vcs or an output voltage sampling signal Vo. When the first switch tube M1 and the second switch tube M2 are turned off, the voltage of the sampling resistor Rcs is detected to obtain an output current sampling signal Vcs, i.e., a sampling signal of the current flowing through the diodes D1 and D2. Load resistance RLThe upper voltage is divided to obtain an output voltage sampling signal. The first compensator U02 is connected with the output end of the subtracter through a switch S1, and the second compensator U03 is connected with the output end of the subtracter through a switch S2; the output end of the first compensator U02 is connected with the input end of a driver U04 through a switch S3, the output end of the second compensator U03 is connected with the input end of a driver U04 through a switch S4, and the driver U04 outputs a driving signal. The period judgment module U01 judges the input power supply VACWhen entering a positive half period and when entering a negative half period, outputting an enable signal EN; input power supply VACWhen the voltage of the first switch tube and the second switch tube is in a positive half period, the enable signal EN controls the switch S1 and the switch S3 to be conducted, the first compensator U02 works, the output signal of the first compensator U02 controls the conduction time of the first switch tube and the second switch tube, and the output of the second compensator U03 is kept unchanged; input power supply VACWhen the voltage enters a negative half cycle, the enable signal EN controls the switch S2 and the switch S4 to be conducted, the output signal of the second compensator U03 controls the conduction time of the first switch tube and the second switch tube, and the output of the first compensator U02 is kept unchanged.
As shown in fig. 3, the present invention is a waveform diagram of the operation of the period determination module, wherein the Vcs waveform is an output current envelope diagram, when the peak current in a switching period drops to a threshold a (corresponding to a in the output current Vcs waveform, a is close to 0), the switches S1 and S3 are enabled, the first compensator U02 operates, and the output of the second compensator U03 remains unchanged; in the next period, the current sampling signal V is outputCSWhen the peak current in one switching period falls to the threshold a, the switches S2 and S4 are enabled, the second compensator U03 operates, and the output of the first compensator U02 remains unchanged. Similarly, the period determination module may also sample the input voltage, and when the input voltage drops to the first threshold, the input voltage is characterized to enter a negative half period, the switches S2 and S4 are enabled, and the second compensator U03 operates(ii) a When the input voltage rises to the second threshold, the switches S1, S3 are enabled and the first compensator U02 operates.
As shown in fig. 4, a schematic circuit diagram of a compensator according to the present invention is illustrated, and the compensator is assumed to be a first compensator U02, and the compensator includes an integrating circuit U101, a current source I1, a capacitor C, a switch k, and a comparator U102. The integral control circuit U01 receives the difference e, integrates the difference e during the on-time of the first switch tube M1, and outputs a first voltage V1. The first current source I1 and the switch k are respectively connected in parallel with the capacitor C, and during the on-time of the first switch tube M1, the first current source I1 outputs current to charge the capacitor C. The non-inverting input terminal of the comparator U102 receives the first voltage V1, and the inverting input terminal thereof receives the capacitor voltage VC and outputs a control signal. When the capacitor voltage VC reaches the first voltage V1, the control signal controls the first switch tube M1 and the second switch tube M2 to turn off, and the switch k turns on, and the first capacitor discharges. Eventually, the output voltage or the output current is brought to the desired output voltage or the desired output current. The circuit schematic of the second compensator U03 is the same as the circuit schematic of the first compensator U02.
Although the embodiments have been described and illustrated separately, it will be apparent to those skilled in the art that some common techniques may be substituted and integrated between the embodiments, and reference may be made to one of the embodiments not explicitly described, or to another embodiment described.
The above-described embodiments do not limit the scope of the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the above-described embodiments should be included in the protection scope of the technical solution.
Claims (7)
1. A control circuit of a double-inductance bridgeless booster circuit is characterized in that: comprises that
The period judging module is used for receiving the input voltage sampling signal or the output current sampling signal and judging when the input voltage enters a positive half period and when the input voltage enters a negative half period;
and the compensation module receives the errors of the output signal and the reference signal, respectively compensates the errors of the output signal and the reference signal in positive and negative half periods of the input voltage according to the period judgment of the period judgment module on the input voltage, so that the output signal reaches an expected value.
2. The control circuit of the dual-inductor bridgeless boost circuit of claim 1, wherein: the compensation module comprises a first compensator and a second compensator, wherein the first compensator and the second compensator respectively receive the difference value of the output signal and the reference signal and respectively output a first control signal and a second control signal;
during the positive half period of the input voltage, the first compensator works, the output of the second compensator is kept unchanged, and the first control signal controls the conduction time of the first switching tube and the second switching tube;
during the negative half period of the input voltage, the output of the first compensator is kept unchanged, the second compensator works, and the second control signal controls the conduction time of the first switching tube and the second switching tube.
3. The control circuit of the dual-inductor bridgeless boost circuit of claim 2, wherein: the period judging module receives an input voltage sampling signal and outputs a first enabling signal; when the input voltage sampling signal falls to a first threshold value, representing that the input voltage enters a negative half period, and controlling the enabling of a second compensator by the first enabling signal; and when the input voltage sampling signal rises to a second threshold value on the rising edge of the input voltage, the input voltage is characterized to enter a positive half period, and the first enable signal controls the first compensator to enable.
4. The control circuit of the dual-inductor bridgeless boost circuit of claim 2, wherein: the period judging module receives the output current sampling signal and outputs a second enabling signal; when the peak current in one switching period falls to a third threshold value, the second enabling signal controls the first compensator to enable; in the next period, when the peak current in one switching period falls to a third threshold value, the second enable signal controls the second compensator to enable, and so on, the first compensator and the second compensator are switched to enable.
5. The control circuit of the dual-inductor bridgeless boost circuit of claim 2, wherein: the first compensator comprises a first integrating circuit, a first capacitor and a first comparator, wherein the first integrating circuit integrates the difference value of the output signal and the reference signal and outputs a first voltage; a first current charges the first capacitor, a first input end of the first comparator receives the first voltage, a second input end of the first comparator receives the first capacitor voltage, and the first comparator outputs a first control signal; when the first capacitor voltage reaches the first voltage, the first control signal controls the first switch tube and the second switch tube to be switched off.
6. The control circuit of the dual-inductor bridgeless boost circuit of claim 2, wherein: the second compensator comprises a second integrating circuit, a second capacitor and a second comparator, the second integrating circuit integrates the difference value of the output signal and the reference signal and outputs a second voltage, a second current charges the second capacitor, a first input end of the second comparator receives the second voltage, a second input end of the second comparator receives the second capacitor voltage, and the second comparator outputs a second control signal; when the second capacitor voltage reaches the second voltage, the second control signal controls the first switch tube and the second switch tube to be switched off.
7. The control circuit of any one of the dual-inductor bridgeless boost circuits of claims 1-6, wherein: the output signal is an output current sampling signal or an output voltage sampling signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921332085.8U CN210405083U (en) | 2019-08-16 | 2019-08-16 | Control circuit of double-inductance bridgeless booster circuit |
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| CN201921332085.8U CN210405083U (en) | 2019-08-16 | 2019-08-16 | Control circuit of double-inductance bridgeless booster circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110474528A (en) * | 2019-08-16 | 2019-11-19 | 杰华特微电子（杭州）有限公司 | The control circuit and control method of double inductance Bridgeless boost circuits |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110474528A (en) * | 2019-08-16 | 2019-11-19 | 杰华特微电子（杭州）有限公司 | The control circuit and control method of double inductance Bridgeless boost circuits |
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Address after: Room 901-23, 9 / F, west 4 building, Xigang development center, 298 Zhenhua Road, Sandun Town, Xihu District, Hangzhou City, Zhejiang Province, 310030 Patentee after: Jiehuate Microelectronics Co.,Ltd. Address before: Room 901-23, 9 / F, west 4 building, Xigang development center, 298 Zhenhua Road, Sandun Town, Xihu District, Hangzhou City, Zhejiang Province, 310030 Patentee before: JOULWATT TECHNOLOGY (HANGZHOU) Co.,Ltd. |
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