CN210327788U

CN210327788U - Online recording and broadcasting system

Info

Publication number: CN210327788U
Application number: CN201921858034.9U
Authority: CN
Inventors: 梁红波; 区英杰; 刘绍焕
Original assignee: Guangzhou Embedded Machine Tech Co ltd
Current assignee: Guangzhou Embedded Machine Tech Co ltd
Priority date: 2019-10-31
Filing date: 2019-10-31
Publication date: 2020-04-14
Anticipated expiration: 2029-10-31

Abstract

The utility model discloses an online recording and broadcasting system, which comprises a processor, a camera, an HDMI controller, a SWITCH controller, a BT1120 controller and a VGA controller, wherein a video encoder, a video decoder and a GMAC controller are integrated in the processor; the system comprises a video encoder, a video decoder, a first display, a BT1120 controller and a VGA controller, wherein more than one camera is respectively connected with the video encoder through an HDMI controller; the output ends of the BT1120 controller and the VGA controller are respectively connected with a second display and a third display; the GMAC controller is connected with more than one electric port through a SWITCH controller; the SWITCH controller is also connected with an optical module, and the processor is also connected with a serial port controller. The utility model can realize sharing and remote monitoring; and after being decoded by a video decoder, the recorded video data are synchronously output to a plurality of paths of display screens, so that the playing function is realized.

Description

Online recording and broadcasting system

Technical Field

The utility model relates to a video recorded broadcast field, in particular to online recorded broadcast system.

Background

In an existing video recording and playing system, a recording and playing device usually uses a camera (or a video source) to collect video data and then displays images through a display. This approach has three disadvantages: first, the number of cameras is limited. In many cases, only one camera or capture terminal is not able to meet the requirements of video recording. Second, the video input and output interface types are limited. The traditional camera or camera mainly adopts an MIPI-CIS interface, an SDI interface, a CVBS interface and the like, and uses less HDMI interfaces. In a common scene, if a mobile phone records important videos or related pictures in a personal notebook computer need to be projected and displayed on a large screen, an HDMI interface is needed. And when the number of the HDMI interfaces needs to be at least 2 or more, the current recording and broadcasting technology display is difficult to meet the requirement. In general, a recording and playing device has only 1 HDMI 2.0 output interface to display video data. If a plurality of display screens need to be displayed simultaneously, the conventional recording and playing device is limited in function and cannot meet the current multi-screen requirements. And thirdly, the resource sharing performance of the video data is poor. A common recording and playing device generally records and compresses video data acquired by a camera, a mobile phone, a notebook computer, and other terminals, and then stores the video data in a local hard disk. When the video data needs to be checked, a video storage path is manually opened and then played through the display. Meanwhile, the recording and broadcasting mode only has a simple video recording function and does not have a subsequent data processing function. The key point is that video data cannot be accessed by other terminals in real time, and resource sharing cannot be realized.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome prior art's shortcoming and not enough, provide an online recorded broadcast system, this system installation is in public places such as market, school and government.

The purpose of the utility model is realized through the following technical scheme:

an online recording and broadcasting system comprises a processor, a camera, an HDMI controller, a SWITCH controller, a BT1120 controller and a VGA controller; a video encoder, a video decoder and a GMAC controller are integrated in the processor; the system comprises a video encoder, a video decoder, a first display, a BT1120 controller and a VGA controller, wherein more than one camera is respectively connected with the video encoder through an HDMI controller; the output ends of the BT1120 controller and the VGA controller are respectively connected with a second display and a third display; the GMAC controller is connected with more than one electric port through a SWITCH controller; the SWITCH controller is also connected with an optical module, and the processor is also connected with a serial port controller.

The processor is of the type HI3531D of Hisilicon.

The model of the HDMI controller is IT6801 FN.

The HDMI controller is mainly used for converting other video input interfaces into HDMI interfaces, inputting the HDMI interfaces into a video encoder in the processor, and the HDMI controller 1 to the HDMI controller 4 all have the same function. The HDMI controller comprises a chip U5, resistors R19-R31, exclusion RNs 5-RN 8, capacitors C30-C56, magnetic beads FB 10-FB 18 and crystals Y2; one end of each capacitor C49-C54 is grounded after being connected in parallel, and the other end of each capacitor is divided into two paths: the first path is connected with the magnetic beads FB18 to 1.2V, and the second path is connected with

pins

7, 15, 43, 48, 64 and 71 of the chip U5; the

pins

36, 22, 23 and 37 of the chip U5 are divided into two paths: one path is connected to the magnetic beads FB 14-FB 17 to 1.2V, and the other path is respectively connected to the capacitors C44-C48 to the ground; one end of the capacitors C37-C43 is grounded after being connected in parallel, and the other end is divided into two paths: one path is connected with the magnetic bead FB13, and the other path is connected with

pins

76, 70, 63, 55, 50, 6 and 20 of the chip U5; one end of the magnetic bead FB10 is connected with 3.3V, and the other end is divided into two paths, namely a first path is connected with a pin 25, a pin 30 and a pin 35 of the chip U5; the second path is respectively connected with the capacitors C31-C34 to the ground; pins 40 of the chip U5 are respectively connected with a magnetic bead FB11 and a capacitor C35, and pins 24 of the chip U5 are respectively connected with a magnetic bead FB12 and a capacitor C36; after being grounded in parallel, R20 and C30 are divided into two paths: the resistor R19 is connected with one circuit, and the pin 18 of the chip U5 is connected with the other circuit; the resistor R21 is connected to the pin 75 of the chip U15 in series; pins 1-4 of the exclusion RN5 are respectively connected with pins 69-66 of the chip U5; pins 1-4 of the exclusion RN6 are respectively connected with pins 65, 62-60 of the chip U5; pins 1-4 of the exclusion RN7 are respectively connected with pins 59-56 of the chip U5; pins 1-4 of the exclusion RN8 are respectively connected with pins 54-51 of the chip U5; the resistors R22-R29 are respectively connected in series with the

pins

47, 12, 13, 14, 49, 46, 45 and 42 of the chip U5;

pins

1 and 3 of the crystal Y2 are respectively connected with capacitors C55 and C56 to the ground, and

pins

2 and 4 of the crystal Y2 are grounded; resistor R30 is connected to pin 38 of chip U5.

The model of the BT1120 controller is SII 9022A.

The BT1120 controller is configured to convert data of the processor video output interface VOU1120 into HDMI output; the BT1120 controller comprises a chip U14, resistors R62-R73, capacitors C113-C129 and magnetic beads FB 37-FB 39; one end of the capacitor C113 is grounded, and the other end is respectively connected with the resistor R62 and the pin 51 of the chip U14; one end of the resistor R63 is connected with the pin 56 of the chip U14, and the other end is grounded; the resistor R64 is connected to the pin 54 of the chip U14 in series; one end of the resistor R65 is connected with the pin 50 of the chip U14, and the other end is grounded; the resistors R66-R68 are respectively connected in series with pin 52, pin 1 and pin 2 of the chip U14; one end of the resistor R69 is respectively connected with the pin 3, the pin 21 and the pin 46 of the chip U14, and the other end is connected with the pin 72 of the chip U14; one ends of the resistors R70 and R71 are respectively connected with the pin 70 and the pin 55 of the chip U14 in series, and the other ends are grounded;

pins

73, 43, 63 and 57 of the chip U14 are all grounded; one end of the resistor R72 is grounded, and the other end is connected with the pin 72 of the chip U14 and the resistor R69; one end of each of the capacitors C114-C115 is grounded after being connected in parallel, and the other end is connected to the magnetic bead FB 37; one end of each of the capacitors C116-C119 is grounded after being connected in parallel, and the other end is connected to the magnetic bead FB 37; one end of each capacitor C120-C122 is grounded after being connected in parallel, and the other end is connected to the magnetic bead FB 38; one end of each capacitor C123-C124 is grounded after being connected in parallel, and the other end is connected with the magnetic bead FB39 and the voltage of 1.2V; capacitors C125-C129 are connected in parallel, one end of each capacitor is grounded, and the other end of each capacitor is connected with a magnetic bead FB 39.

The model of the VGA controller is MS 9282.

The VGA controller is used for converting the VGA signal output by the processor into an HDMI signal and outputting the HDMI signal; the VGA controller comprises a chip U15, a crystal Y5, resistors R74-R87, capacitors C137-C150 and magnetic beads FB 40-FB 43; one end of each capacitor C137-C139 is grounded after being connected in parallel, and the other end of each capacitor is divided into two paths: the first path is connected with the magnetic bead FB42, and the second path is connected with the

pins

15, 33 and 48 of the chip U15; one end of the capacitors C130-C134 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with the magnetic bead FB40, and the second path is connected with

pins

1, 23, 29, 55 and 61 of the chip U15; one end of the capacitors C140-C144 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with a magnetic bead FB43, and the second path is connected with a pin 17, a pin 49, a pin 52, a pin 58 and a pin 63 of the chip U15; one end of the capacitors C135-C136 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with the magnetic bead FB41, and the second path is connected with the

pins

9 and 40 of the chip U15; one end of the resistor R80 is grounded, and the other end is connected with the pin 19 of the chip U15; one end of the resistor R87 is grounded, and the other end is connected with the 16 pins of the chip U15; the resistors R81-R82 and R85-R86 are respectively connected in series with the pin 13, the pin 12, the pin 39 and the pin 38 of the chip U15; resistors R75-R76 are respectively connected in series with a pin 47 and a pin 46 of the chip U15; after the resistor R84 is pulled up to 3.3V, the voltage reaches the pin 37 of the chip U15 through the resistor R84; one ends of the resistors R77-R79 are grounded after being connected in parallel, and the other ends are respectively connected in series with the capacitors C146-C148 and then connected to the pin 53, the pin 59 and the pin 64 of the chip U15; the capacitor C145 is connected to a pin 57 of the chip U15;

pins

1 and 3 of the crystal Y5 are respectively connected with

pins

34 and 35 of the chip U15, and then respectively connected with capacitors C149 and C150 to the ground;

pins

2 and 4 of crystal Y5 are grounded.

The SWITCH controller is model RTL8370 MB.

The SWITCH controller comprises a chip U16, resistors R88-R106, capacitors C151-C154 and a crystal Y6; wherein, the resistor R90 is connected in series with the 128 pin of the chip U16, and the resistor R91 is connected in series with the 129 pin of the chip U16; the resistor R88 is connected in series with the 135 pin of the chip U16, and the resistor R89 is connected in series with the 136 pin of the chip U16; the resistor R93 is connected in series with the 19 pin of the chip U16, and the resistor R94 is connected in series with the R94 pin of the chip U16; the resistor R96 is pulled down from the 10 pin of the chip U16 to ground; resistors R97-R100 are respectively pulled down to the ground from

pins

21, 22, 23 and 25 of the chip U16; the 1 pin and the 3 pin of the crystal Y6 are divided into two paths, wherein the first path is connected to the ground through capacitors C151 and C152, and the second path is connected to the 132 pin and the 131 pin of the chip U16;

pins

2 and 4 of the crystal Y6 are grounded; the capacitor C153 is connected to the pin 99 of the chip U16 in series, and the capacitor C154 is connected to the pin 100 of the chip U16 in series; the resistors R101 to R106 are respectively connected to pins 88 to 83 of the chip U16 in series; two ends of the resistor R95 are respectively connected with the pin 131 and the pin 132 of the chip U16.

The working process of the utility model is as follows:

the camera provides video monitoring input through a video encoder inside the processor. The video input adopts 4 paths of HDMI synchronous independent input. The display screen is connected to a video decoder in the processor, and after decoding, a 3-path HDMI output interface is used for providing a video output channel and displaying the video on the corresponding display screen.

The online recording and broadcasting system integrates an 8-port SWITCH (SWITCH) module, can be accessed by 8 network terminals at the same time, and realizes the sharing of related resources.

After startup, the processor runs the software. The recorded video can be watched through the display, and the data processed by the video data analysis technology is transmitted through the SWITCH module integrated in the device.

It should be noted that, the above working process uses the direction of signal as clue to further explain the connection relationship of each component of the online video recording system of the present invention, so that the technicians in this field can more clearly and conveniently implement the present invention, but does not represent the improvement point of the technical scheme of the present invention on software, the improvement point of the technical scheme of the present invention lies in the whole architecture of the whole device, although the technical scheme involves a processor and other controllers, the implementation is all the conventional operations (such as inputting 4 paths of HDMI video source signals simultaneously, after processing, outputting video data by 3 paths of HDMI, displaying the image on the display screen), the selected components of the present invention are also the existing components (also giving specific models), the technical scheme of the present invention lies in how to build the existing devices, namely, the invention is characterized in structure, thus belonging to the protection object of the utility model patent.

Compared with the prior art, the utility model, following advantage and beneficial effect have:

1. online recorded broadcast system, can support 4 way HDMI interfaces to input simultaneously, still can carry out analysis processes to 4 way cameras or acquisition terminal's data, then the carving is at local hard disk, realizes carving when the multichannel. The requirements of terminals such as a camera, a mobile phone or a notebook computer and the like on the HDMI input interface are met.

2. The utility model discloses to the video data who has recorded, can pass through 3 HDMI output interfaces simultaneously, show video data on line in step on a plurality of screens. And the related data can be fed back to the background control center in time.

3. The utility model discloses the giga SWITCH who has integrateed an 8 mouthfuls (wherein 2 net gapuses do and reserve the extension), can be with the data of gathering, other control center or terminal are given in more direct ground network transmission, realize resource sharing. In addition, also influence little if the public network disconnection, the utility model discloses its own is exactly a VLAN network, has more powerful network adaptation function, prevents losing of important data, strengthens resource sharing's validity.

Drawings

Fig. 1 is a schematic structural diagram of an online recording and broadcasting system according to the present invention.

Fig. 2 is a circuit diagram of the HDMI controller according to the present invention; wherein the HDMI controller is IT6801FN in model.

Fig. 3 is a circuit diagram of the BT1120 controller of the present invention; wherein the BT1120 controller employs SII 9022A.

Fig. 4 is a circuit diagram of the VGA controller of the present invention; wherein, the VGA controller adopts MS 9282.

Fig. 5 is a circuit diagram of the SWITCH controller of the present invention; wherein the SWITCH controller is RTL8370 MB.

Detailed Description

The present invention will be described in further detail with reference to the following examples and drawings, but the present invention is not limited thereto.

As shown in fig. 1-5, an online recording and broadcasting system includes a processor, a camera, an HDMI controller, a SWITCH controller, a BT1120 controller, and a VGA controller; a video encoder, a video decoder and a GMAC controller are integrated in the processor; the system comprises a video encoder, a video decoder, a first display, a BT1120 controller and a VGA controller, wherein more than one camera is respectively connected with the video encoder through an HDMI controller; the output ends of the BT1120 controller and the VGA controller are respectively connected with a second display and a third display; the GMAC controller is connected with more than one electric port through a SWITCH controller; the SWITCH controller is also connected with an optical module, and the processor is also connected with a serial port controller.

The processor is of the type HI3531D of Hisilicon.

The model of the HDMI controller is IT6801 FN.

pins

7, 15, 43, 48, 64 and 71 of the chip U5; the

pins

47, 12, 13, 14, 49, 46, 45 and 42 of the chip U5;

pins

The model of the BT1120 controller is SII 9022A.

pins

The model of the VGA controller is MS 9282.

The VGA controller is used for converting the VGA signal output by the processor into an HDMI signal and outputting the HDMI signal; the VGA controller comprises a chip U15, a crystal Y5, resistors R74-R87, capacitors C137-C150 and magnetic beads FB 40-FB 43; one end of each capacitor C137-C139 is grounded after being connected in parallel, and the other end of each capacitor is divided into two paths: the first path is connected with the magnetic bead FB42, and the second path is connected with the pins 15, 33 and 48 of the chip U15; one end of the capacitors C130-C134 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with the magnetic bead FB40, and the second path is connected with pins 1, 23, 29, 55 and 61 of the chip U15; one end of the capacitors C140-C144 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with a magnetic bead FB43, and the second path is connected with a pin 17, a pin 49, a pin 52, a pin 58 and a pin 63 of the chip U15; one end of the capacitors C135-C136 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with the magnetic bead FB41, and the second path is connected with the pins 9 and 40 of the chip U15; one end of the resistor R80 is grounded, and the other end is connected with the pin 19 of the chip U15; one end of the resistor R87 is grounded, and the other end is connected with the 16 pins of the chip U15; the resistors R81-R82 and R85-R86 are respectively connected in series with the pin 13, the pin 12, the pin 39 and the pin 38 of the chip U15; resistors R75-R76 are respectively connected in series with a pin 47 and a pin 46 of the chip U15; after the resistor R84 is pulled up to 3.3V, the voltage reaches the pin 37 of the chip U15 through the resistor R84; one ends of the resistors R77-R79 are grounded after being connected in parallel, and the other ends are respectively connected in series with the capacitors C146-C148 and then connected to the pin 53, the pin 59 and the pin 64 of the chip U15; the capacitor C145 is connected to a pin 57 of the chip U15; pins 1 and 3 of the crystal Y5 are respectively connected with pins 34 and 35 of the chip U15, and then respectively connected with capacitors C149 and C150 to the ground; pins 2 and 4 of crystal Y5 are grounded.

The SWITCH controller is model RTL8370 MB.

The SWITCH controller comprises a chip U16, resistors R88-R106, capacitors C151-C154 and a crystal Y6; wherein, the resistor R90 is connected in series with the 128 pin of the chip U16, and the resistor R91 is connected in series with the 129 pin of the chip U16; the resistor R88 is connected in series with the 135 pin of the chip U16, and the resistor R89 is connected in series with the 136 pin of the chip U16; the resistor R93 is connected in series with the 19 pin of the chip U16, and the resistor R94 is connected in series with the R94 pin of the chip U16; the resistor R96 is pulled down from the 10 pin of the chip U16 to ground; resistors R97-R100 are respectively pulled down to the ground from pins 21, 22, 23 and 25 of the chip U16; the 1 pin and the 3 pin of the crystal Y6 are divided into two paths, wherein the first path is connected to the ground through capacitors C151 and C152, and the second path is connected to the 132 pin and the 131 pin of the chip U16; pins 2 and 4 of the crystal Y6 are grounded; the capacitor C153 is connected to the pin 99 of the chip U16 in series, and the capacitor C154 is connected to the pin 100 of the chip U16 in series; the resistors R101 to R106 are respectively connected to pins 88 to 83 of the chip U16 in series; two ends of the resistor R95 are respectively connected with the pin 131 and the pin 132 of the chip U16.

The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be equivalent replacement modes, and all are included in the scope of the present invention.

Claims

1. An online recording and broadcasting system is characterized in that: the device comprises a processor, a camera, an HDMI controller, a SWITCH controller, a BT1120 controller and a VGA controller; a video encoder, a video decoder and a GMAC controller are integrated in the processor; the system comprises a video encoder, a video decoder, a first display, a BT1120 controller and a VGA controller, wherein more than one camera is respectively connected with the video encoder through an HDMI controller; the output ends of the BT1120 controller and the VGA controller are respectively connected with a second display and a third display; the GMAC controller is connected with more than one electric port through a SWITCH controller; the SWITCH controller is also connected with an optical module, and the processor is also connected with a serial port controller.

2. The online recording and broadcasting system as claimed in claim 1, wherein: the processor is of the type HI3531D of Hisilicon.

3. The online recording and broadcasting system as claimed in claim 1, wherein: the model of the HDMI controller is IT6801 FN.

4. The online recording and broadcasting system as claimed in claim 3, wherein: the HDMI controller is used for converting other video input interfaces into HDMI interfaces and inputting the HDMI interfaces into a video encoder in the processor; the HDMI controller comprises a chip U5, resistors R19-R31, exclusion RNs 5-RN 8, capacitors C30-C56, magnetic beads FB 10-FB 18 and crystals Y2; one end of each capacitor C49-C54 is grounded after being connected in parallel, and the other end of each capacitor is divided into two paths: the first path is connected with the magnetic beads FB18 to 1.2V, and the second path is connected with pins 7, 15, 43, 48, 64 and 71 of the chip U5; the pins 36, 22, 23 and 37 of the chip U5 are divided into two paths: one path is connected to the magnetic beads FB 14-FB 17 to 1.2V, and the other path is respectively connected to the capacitors C44-C48 to the ground; one end of the capacitors C37-C43 is grounded after being connected in parallel, and the other end is divided into two paths: one path is connected with the magnetic bead FB13, and the other path is connected with pins 76, 70, 63, 55, 50, 6 and 20 of the chip U5; one end of the magnetic bead FB10 is connected with 3.3V, and the other end is divided into two paths, namely a first path is connected with a pin 25, a pin 30 and a pin 35 of the chip U5; the second path is respectively connected with the capacitors C31-C34 to the ground; pins 40 of the chip U5 are respectively connected with a magnetic bead FB11 and a capacitor C35, and pins 24 of the chip U5 are respectively connected with a magnetic bead FB12 and a capacitor C36; after being grounded in parallel, R20 and C30 are divided into two paths: the resistor R19 is connected with one circuit, and the pin 18 of the chip U5 is connected with the other circuit; the resistor R21 is connected to the pin 75 of the chip U15 in series; pins 1-4 of the exclusion RN5 are respectively connected with pins 69-66 of the chip U5; pins 1-4 of the exclusion RN6 are respectively connected with pins 65, 62-60 of the chip U5; pins 1-4 of the exclusion RN7 are respectively connected with pins 59-56 of the chip U5; pins 1-4 of the exclusion RN8 are respectively connected with pins 54-51 of the chip U5; the resistors R22-R29 are respectively connected in series with the pins 47, 12, 13, 14, 49, 46, 45 and 42 of the chip U5; pins 1 and 3 of the crystal Y2 are respectively connected with capacitors C55 and C56 to the ground, and pins 2 and 4 of the crystal Y2 are grounded; resistor R30 is connected to pin 38 of chip U5.

5. The online recording and broadcasting system as claimed in claim 1, wherein: the model of the BT1120 controller is SII 9022A.

6. The online recording and broadcasting system as claimed in claim 5, wherein: the BT1120 controller is configured to convert data of the processor video output interface VOU1120 into HDMI output; the BT1120 controller comprises a chip U14, resistors R62-R73, capacitors C113-C129 and magnetic beads FB 37-FB 39; one end of the capacitor C113 is grounded, and the other end is respectively connected with the resistor R62 and the pin 51 of the chip U14; one end of the resistor R63 is connected with the pin 56 of the chip U14, and the other end is grounded; the resistor R64 is connected to the pin 54 of the chip U14 in series; one end of the resistor R65 is connected with the pin 50 of the chip U14, and the other end is grounded; the resistors R66-R68 are respectively connected in series with pin 52, pin 1 and pin 2 of the chip U14; one end of the resistor R69 is respectively connected with the pin 3, the pin 21 and the pin 46 of the chip U14, and the other end is connected with the pin 72 of the chip U14; one ends of the resistors R70 and R71 are respectively connected with the pin 70 and the pin 55 of the chip U14 in series, and the other ends are grounded; pins 73, 43, 63 and 57 of the chip U14 are all grounded; one end of the resistor R72 is grounded, and the other end is connected with the pin 72 of the chip U14 and the resistor R69; one end of each of the capacitors C114-C115 is grounded after being connected in parallel, and the other end is connected to the magnetic bead FB 37; one end of each of the capacitors C116-C119 is grounded after being connected in parallel, and the other end is connected to the magnetic bead FB 37; one end of each capacitor C120-C122 is grounded after being connected in parallel, and the other end is connected to the magnetic bead FB 38; one end of each capacitor C123-C124 is grounded after being connected in parallel, and the other end is connected with the magnetic bead FB39 and the voltage of 1.2V; capacitors C125-C129 are connected in parallel, one end of each capacitor is grounded, and the other end of each capacitor is connected with a magnetic bead FB 39.

7. The online recording and broadcasting system as claimed in claim 1, wherein: the model of the VGA controller is MS 9282.

8. The online recording and broadcasting system as claimed in claim 7, wherein: the VGA controller is used for converting the VGA signal output by the processor into an HDMI signal and outputting the HDMI signal; the VGA controller comprises a chip U15, a crystal Y5, resistors R74-R87, capacitors C137-C150 and magnetic beads FB 40-FB 43; one end of each capacitor C137-C139 is grounded after being connected in parallel, and the other end of each capacitor is divided into two paths: the first path is connected with the magnetic bead FB42, and the second path is connected with the pins 15, 33 and 48 of the chip U15; one end of the capacitors C130-C134 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with the magnetic bead FB40, and the second path is connected with pins 1, 23, 29, 55 and 61 of the chip U15; one end of the capacitors C140-C144 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with a magnetic bead FB43, and the second path is connected with a pin 17, a pin 49, a pin 52, a pin 58 and a pin 63 of the chip U15; one end of the capacitors C135-C136 is grounded after being connected in parallel, and the other end is divided into two paths: the first path is connected with the magnetic bead FB41, and the second path is connected with the pins 9 and 40 of the chip U15; one end of the resistor R80 is grounded, and the other end is connected with the pin 19 of the chip U15; one end of the resistor R87 is grounded, and the other end is connected with the 16 pins of the chip U15; the resistors R81-R82 and R85-R86 are respectively connected in series with the pin 13, the pin 12, the pin 39 and the pin 38 of the chip U15; resistors R75-R76 are respectively connected in series with a pin 47 and a pin 46 of the chip U15; after the resistor R84 is pulled up to 3.3V, the voltage reaches the pin 37 of the chip U15 through the resistor R84; one ends of the resistors R77-R79 are grounded after being connected in parallel, and the other ends are respectively connected in series with the capacitors C146-C148 and then connected to the pin 53, the pin 59 and the pin 64 of the chip U15; the capacitor C145 is connected to a pin 57 of the chip U15; pins 1 and 3 of the crystal Y5 are respectively connected with pins 34 and 35 of the chip U15, and then respectively connected with capacitors C149 and C150 to the ground; pins 2 and 4 of crystal Y5 are grounded.

9. The online recording and broadcasting system as claimed in claim 1, wherein: the SWITCH controller is model RTL8370 MB.

10. The online recording and broadcasting system of claim 9, wherein: the SWITCH controller comprises a chip U16, resistors R88-R106, capacitors C151-C154 and a crystal Y6; wherein, the resistor R90 is connected in series with the 128 pin of the chip U16, and the resistor R91 is connected in series with the 129 pin of the chip U16; the resistor R88 is connected in series with the 135 pin of the chip U16, and the resistor R89 is connected in series with the 136 pin of the chip U16; the resistor R93 is connected in series with the 19 pin of the chip U16, and the resistor R94 is connected in series with the R94 pin of the chip U16; the resistor R96 is pulled down from the 10 pin of the chip U16 to ground; resistors R97-R100 are respectively pulled down to the ground from pins 21, 22, 23 and 25 of the chip U16; the 1 pin and the 3 pin of the crystal Y6 are divided into two paths, wherein the first path is connected to the ground through capacitors C151 and C152, and the second path is connected to the 132 pin and the 131 pin of the chip U16; pins 2 and 4 of the crystal Y6 are grounded; the capacitor C153 is connected to the pin 99 of the chip U16 in series, and the capacitor C154 is connected to the pin 100 of the chip U16 in series; the resistors R101 to R106 are respectively connected to pins 88 to 83 of the chip U16 in series; two ends of the resistor R95 are respectively connected with the pin 131 and the pin 132 of the chip U16.